mip 291
Abstract: mip 290
Text: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025 – AUGUST 1998 D D D D D D D D D D D D D Single-Chip Parallel Multiple Instruction / Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second Master Processor (MP)
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SMJ320C80
SGUS025
32-Bit
IEEE-754
64-Bit
TMS320C8X
SPRA269
mip 291
mip 290
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Untitled
Abstract: No abstract text available
Text: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second
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SMJ320C80
SGUS025B
32-Bit
IEEE-754
64-Bit
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Untitled
Abstract: No abstract text available
Text: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second
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SMJ320C80
SGUS025B
32-Bit
IEEE-754
64-Bit
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C8050
Abstract: AB32 AB34 TMS320C80
Text: TMS320C80 Digital Signal Processor Data Sheet 1997 Digital Signal Processing Solutions Printed in U.S.A., October 1997 SPRS023B Book Type Data Sheet TMS320C80 DSP 1997 TMS320C80 DIGITAL SIGNAL PROCESSOR SPRS023B – JULY 1994 – REVISED OCTOBER 1997 D D D
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TMS320C80
SPRS023B
TMS320C80
32-Bit
IEEE-754
64-Bit
C8050
AB32
AB34
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SPNB086
Abstract: TMS470R1A256 SPNU199 SPNU189 100-PIN A256 J1850 SPNU212 0x00007fff SE470
Text: TMS470R1A256 16/32-Bit RISC Flash Microcontroller www.ti.com • • • • • • • High-Performance Static CMOS Technology TMS470R1x 16/32-Bit RISC Core ARM7TDMI – 24-MHz System Clock (48-MHz Pipeline Mode) – Independent 16/32-Bit Instruction Set
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TMS470R1A256
16/32-Bit
TMS470R1x
24-MHz
48-MHz
256K-Byte
12K-Byte
32-Bit
SPNB086
TMS470R1A256
SPNU199
SPNU189
100-PIN
A256
J1850
SPNU212
0x00007fff
SE470
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RCA15
Abstract: 0x01000800 NTH44
Text: TMS320C82 DIGITAL SIGNAL PROCESSOR SPRS048 — APRIL 1998 • • • • • GGP PACKAGE BOTTOM VIEW Single Chip Parallel MIMD DSP Over 1.5 Billion RISC-like Operations per Second Master Processor (MP) − 32-Bit RISC Processor − IEEE-754 Floating Point
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TMS320C82
SPRS048
32-Bit
IEEE-754
64-Bit
480M-Byte/s
RCA15
0x01000800
NTH44
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Untitled
Abstract: No abstract text available
Text: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second
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SMJ320C80
SGUS025B
32-Bit
IEEE-754
64-Bit
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structure processor pentium3
Abstract: laptops power ic S5U1C33001H S1C33000 S1C33L01 S5U1C33001C em 328 epson S1C33 BT 342 project 29LV800te
Text: CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S5U1C33001C Manual C/C+ Compiler Package for S1C33 Family (Ver. 3.3.0) NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not
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32-BIT
S5U1C33001C
S1C33
structure processor pentium3
laptops power ic
S5U1C33001H
S1C33000
S1C33L01
em 328 epson
BT 342 project
29LV800te
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dlock
Abstract: EE-16 core FE01 MPC755 MPC8240
Text: AN2129/D Motorola Order Number 4/1999 REV. 0 ª Application Note Instruction and Data Cache Locking on the G2 Processor Core Jim Robertson and Kalpesh Gala risc10@email.sps.mot.com This document describes the instruction and data cache locking features on the G2
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AN2129/D
risc10
MPC603e-based
MPC8240
dlock
EE-16 core
FE01
MPC755
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netxtreme programmer
Abstract: BCM5701 PG105R S6D0 netxtreme 57xx gigabit controller BCM5704 BCM5715 broadcom BCM5715C BCM5788/M mac 7a8 transistor
Text: Programmer’s Guide BCM57XX Host Programmer Interface Specification for the NetXtreme Family of Highly Integrated Media Access Controllers 57XX-PG105-R 5300 California Avenue • Irvine, CA 92617 • Phone: 949-926-5000 • Fax: 949-926-5203 01/29/08 BCM57XX
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BCM57XX
57XX-PG105-R
57XX-PG104-R
PG105
netxtreme programmer
BCM5701
PG105R
S6D0
netxtreme 57xx gigabit controller
BCM5704
BCM5715
broadcom BCM5715C
BCM5788/M
mac 7a8 transistor
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PIC32MX250F128B
Abstract: DS61112 DS61107 DS61106 DS61108 DS61125 22-pin picmicro information DS61117 pic32mx220f032b DS61121
Text: PIC32MX1XX/2XX 32-bit Microcontrollers up to 128 KB Flash and 32 KB SRAM with Audio and Graphics Interfaces, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz ® Core: 40 MHz MIPS32 M4K
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PIC32MX1XX/2XX
32-bit
16-bit
MIPS32®
MIPS16e®
32x16
32x32
DS61168C-page
PIC32MX250F128B
DS61112
DS61107
DS61106
DS61108
DS61125
22-pin picmicro information
DS61117
pic32mx220f032b
DS61121
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RTL8201 reference Design
Abstract: RTL8201 Design RTL8201 W3100A rtl8201 application note W3100 RTL8201 DATASHEET diode byt 45 realtek ethernet RCR RTL8201 w3100a Design
Text: iinChip W3100A www.WIZnet.co.kr Technical Datasheet v1.34 Description Features The iinChip W3100A is an LSI of hardware protocol stack that provides an easy, low-cost solution Description Features byallowing simple installation of TCP/IP stack in the
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W3100A
W3100A
W3100A,
RTL8201 reference Design
RTL8201 Design
RTL8201
rtl8201 application note
W3100
RTL8201 DATASHEET
diode byt 45
realtek ethernet RCR
RTL8201 w3100a Design
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hdlc
Abstract: 070C 071C DS3134
Text: Application Note 364 DS3134 Step By Step Configuration-Bridge Mode www.dalsemi.com Overview This application note describes an example of how to configure a single T1 port on the DS3134 operating in Bridge Mode. Additionally, this example describes how to construct, send, receive, and check a packet
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DS3134
DS3134:
0x0000FFFF;
0x01234567
0x89ABCDEF
0x02468ACE
0x13579BDF
hdlc
070C
071C
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Untitled
Abstract: No abstract text available
Text: TMS320C82 DIGITAL SIGNAL PROCESSOR SPRS048 — APRIL 1998 • • • • • GGP PACKAGE BOTTOM VIEW Single Chip Parallel MIMD DSP Over 1.5 Billion RISC-like Operations per Second Master Processor (MP) − 32-Bit RISC Processor − IEEE-754 Floating Point
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TMS320C82
SPRS048
32-Bit
IEEE-754
64-Bit
480M-Byte/s
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motorola transistor cross reference 6036
Abstract: MPC555 QADC64 1000 watt buck converter scheme uPC 1185 motorola transistor cross reference upc 2581 motorola 1923 circuit diagram of MOD 100 counter using ic 7490 GT Plus Oncore
Text: MPC555 USER’S MANUAL Revised 1 May 1998 Copyright 1998 MOTOROLA; All Rights Reserved MPC555 USER’S MANUAL Revised 1 May 1998 Copyright 1998 MOTOROLA; All Rights Reserved Paragraph Number TABLE OF CONTENTS Page Number Section 1 OVERVIEW 1.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
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MPC555
MPC555
Index-12
motorola transistor cross reference 6036
QADC64
1000 watt buck converter scheme
uPC 1185
motorola transistor cross reference
upc 2581
motorola 1923
circuit diagram of MOD 100 counter using ic 7490
GT Plus Oncore
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MPC555
Abstract: No abstract text available
Text: SECTION 11 L-BUS TO U-BUS INTERFACE L2U The L-bus to U-bus interface unit (L2U) provides an interface between the load/store bus (L-bus) and the unified bus (U-bus). The L2U module includes the data memory protection unit (DMPU), which provides protection for data memory accesses.
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MPC555
MPC555
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vhdl code for vending machine
Abstract: 0x8020FFF XPS IIC ALi M1535D PDC202 manual ALi M1535D XAPP765 XC4VFX60 Virtex4 uart datasheet Virtex4 XC4VFX60
Text: Application Note: Embedded Processing Reference System: PLBv46 PCI Using the ML410 Embedded Development Platform R Author: Lester Sanders XAPP1001 v1.0 February 8, 2008 Summary This application note describes how to build a reference system for the Processor Local Bus
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PLBv46
ML410
XAPP1001
PPC405)
vhdl code for vending machine
0x8020FFF
XPS IIC
ALi M1535D
PDC202
manual ALi M1535D
XAPP765
XC4VFX60
Virtex4 uart datasheet
Virtex4 XC4VFX60
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uartns550
Abstract: lwIP XAPP1037 microblaze ethernet ML403 ML555 microblaze application note 0x8100000C roland R15
Text: Application Note: Embedded Processing Introduction to Software Debugging on Xilinx MicroBlaze Embedded Platforms R XAPP1037 v1.0 February 28, 2008 Author: Brian Hill Summary This application note discusses the use of the Xilinx Microprocessor Debugger (XMD) and the
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XAPP1037
ML403
notes/xapp1037
uartns550
lwIP
XAPP1037
microblaze ethernet
ML555
microblaze application note
0x8100000C
roland R15
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0x0035-0x0038
Abstract: No abstract text available
Text: TMS320C82 DIGITAL SIGNAL PROCESSOR SPRS048 — APRIL 1998 • • • • • GGP PACKAGE BOTTOM VIEW Single Chip Parallel MIMD DSP Over 1.5 Billion RISC-like Operations per Second Master Processor (MP) − 32-Bit RISC Processor − IEEE-754 Floating Point
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TMS320C82
SPRS048
32-Bit
IEEE-754
64-Bit
480M-Byte/s
0x0035-0x0038
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cts 280
Abstract: onpA13 sab 1078 AT32UC3L2 AT32UC3L0 atmel 743 H-348
Text: Features • High Performance, Low Power AVR 32 UC 32-bit Microcontroller • • • • • • • • • • • • • • • • • – Compact Single-Cycle RISC Instruction Set Including DSP Instructions – Read-Modify-Write Instructions and Atomic Bit Manipulation
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32-bit
50MHz
25MHz
64Kbytes,
32Kbytes,
16Kbytes
25MHz
2099A
AVR32
cts 280
onpA13
sab 1078
AT32UC3L2
AT32UC3L0
atmel 743
H-348
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amd athlon II x2
Abstract: amd athlon II x2 270 amd athlon 64 socket 754 AMD Athlon 64 X2 AMD Athlon 64 X2 pin diagram AMD athlon socket 754 AMD Athlon II X4 pin diagram AMD Athlon 64 X2 AMD Athlon 64 AMD Athlon 64 pin diagram
Text: TM AMD Athlon Processor x86 Code Optimization Guide 2000 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. “AMD” products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of
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22007H/0--June
amd athlon II x2
amd athlon II x2 270
amd athlon 64 socket 754
AMD Athlon 64 X2
AMD Athlon 64 X2 pin diagram
AMD athlon socket 754
AMD Athlon II X4
pin diagram AMD Athlon 64 X2
AMD Athlon 64
AMD Athlon 64 pin diagram
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100 pin tqfp PIC32MX3XXL
Abstract: EJTAG Tiny Tools DS61143F DS61115 bmx lcd PIC32MX4XX D312 6 pin usb PIC32MX3XXL PIC32MX360F PIC32MX4XXL
Text: PIC32MX3XX/4XX Family Data Sheet 64/100-Pin General Purpose and USB 32-Bit Flash Microcontrollers 2009 Microchip Technology Inc. Preliminary DS61143F Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet.
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PIC32MX3XX/4XX
64/100-Pin
32-Bit
DS61143F
DS61143F-page
100 pin tqfp PIC32MX3XXL
EJTAG Tiny Tools
DS61143F
DS61115
bmx lcd
PIC32MX4XX
D312 6 pin usb
PIC32MX3XXL
PIC32MX360F
PIC32MX4XXL
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DS61125
Abstract: DS61107 DS61108 block diagram 8x8 booth multiplier DS61104 pic32mx220f032d RPB-6 DS61121 PIC18 sleep command PIC32MX220F032C
Text: PIC32MX1XX/2XX 32-bit Microcontrollers up to 128 KB Flash and 32 KB SRAM with Audio and Graphics Interfaces, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture • 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz • 2.3V to 3.6V, -40ºC to +85ºC, DC to 50 MHz
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PIC32MX1XX/2XX
32-bit
16-bit
Hz/83
MIPS32®
MIPS16e®
32x16
32x32
Management-3-5770-955
DS61125
DS61107
DS61108
block diagram 8x8 booth multiplier
DS61104
pic32mx220f032d
RPB-6
DS61121
PIC18 sleep command
PIC32MX220F032C
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XG1010
Abstract: NT39 rs048
Text: TMS320C82 DIGITAL SIGNAL PROCESSOR SPRS048 — APRIL 1998 GGP PACKAGE BOTTOM VIEW Single Chip Parallel MIMD DSP Over 1.5 Billion RISC-like Operations per Second . j AT AE AD AC AB M Y W V u T R P N M L K J H G F E D C 6 A Master Processor (MP) - 32-Bit RISC Processor
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OCR Scan
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TMS320C82
SPRS048
32-Bit
IEEE-754
64-Bit
480M-Byte/s
XG1010
NT39
rs048
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