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    1 INTO 16 DEMULTIPLEXER DIAGRAM USING 1 I Search Results

    1 INTO 16 DEMULTIPLEXER DIAGRAM USING 1 I Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    CS-SASMINTOHD-002 Amphenol Cables on Demand Amphenol CS-SASMINTOHD-002 2m (6.6') External 4x Mini-SAS to HD Mini-SAS Cable - 4x Mini-SAS HD (SFF-8644) to 4x Mini-SAS 26-pin (SFF-8088) Passive Copper Cable [28 AWG] - 6G SAS 2.1 / iPass+™ HD Datasheet
    CS-SASMINTOHD-003 Amphenol Cables on Demand Amphenol CS-SASMINTOHD-003 3m (9.8') External 4x Mini-SAS to HD Mini-SAS Cable - 4x Mini-SAS HD (SFF-8644) to 4x Mini-SAS 26-pin (SFF-8088) Passive Copper Cable [28 AWG] - 6G SAS 2.1 / iPass+™ HD Datasheet
    CS-SASMINTOHD-001 Amphenol Cables on Demand Amphenol CS-SASMINTOHD-001 1m (3.3') External 4x Mini-SAS to HD Mini-SAS Cable - 4x Mini-SAS HD (SFF-8644) to 4x Mini-SAS 26-pin (SFF-8088) Passive Copper Cable [30 AWG] - 6G SAS 2.1 / iPass+™ HD Datasheet
    54F181LM/B Rochester Electronics LLC 54F181 - Synchronous 16-Bit to 32-Bit Multiplexer/Demultiplexer Bus Switch Visit Rochester Electronics LLC Buy

    1 INTO 16 DEMULTIPLEXER DIAGRAM USING 1 I Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    1 into 16 demultiplexer circuit diagram using 1 i

    Abstract: 1 into 12 demultiplexer circuit diagram 1 into 16 demultiplexer circuit diagram ip 65 equipment qmv10 AB89 AC10 UT15 AC10 post amplifier YA18
    Text: YA20 2.5 Gb/s 1:16 Demultiplexer Data Sheet Features Data and clock inputs accept differential CML signals at up to 2.5 Gb/s Internally generated divide-by-16 clock and deserialized data delivered via PECL 100 k outputs Fully differential internal logic for


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    PDF divide-by-16 16-bit 1 into 16 demultiplexer circuit diagram using 1 i 1 into 12 demultiplexer circuit diagram 1 into 16 demultiplexer circuit diagram ip 65 equipment qmv10 AB89 AC10 UT15 AC10 post amplifier YA18

    1 into 16 demultiplexer circuit diagram using 1 i

    Abstract: 1 into 12 demultiplexer circuit diagram Nortel demux AB89 AC10 YA08 YA18 YA19 YA20 1 into 4 demultiplexer circuit diagram
    Text: YA20 2.5 Gb/s 1:16 Demultiplexer Data Sheet Features Data and clock inputs accept differential CML signals at up to 2.5 Gb/s Internally generated divide-by-16 clock and deserialized data delivered via PECL 100 k outputs Fully differential internal logic for


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    PDF divide-by-16 16-bit 1 into 16 demultiplexer circuit diagram using 1 i 1 into 12 demultiplexer circuit diagram Nortel demux AB89 AC10 YA08 YA18 YA19 YA20 1 into 4 demultiplexer circuit diagram

    EC60825-1

    Abstract: EC60825 TD1611 STM-16 TD16L1 agilent receiver OC-48 1EC60825-1 transmitter agilent oc 192 agere 840 demultiplexer outline
    Text: a8e re AdLib OCR Evaluation systems Advance Data Sheet May 2002 TD16-Type 2.5 Gbits/s Transponder with 16-Channel 155 Mbits/s Multiplexer/Demultiplexer Description The TD16-type transponder performs straightforward, bit-level parallel-to-serial converting in the


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    PDF TD16-Type 16-Channel 16-bit, DS02-249TPDR DS01-240PTO) EC60825-1 EC60825 TD1611 STM-16 TD16L1 agilent receiver OC-48 1EC60825-1 transmitter agilent oc 192 agere 840 demultiplexer outline

    HDB3 AMI ENCODER DECODER

    Abstract: multiplexing e1 frame to e3 frame Frame structure for Multiplexing of four E2 streams into E3 stream LXT6234QE HDB3 to nrz multiplexer 30 pin circuit diagram of 64-1 multiplexer HDB3 intel 4e2 E1 HDB3
    Text: LXT6234 E-Rate Multiplexer Datasheet The LXT6234 E-Rate Multiplexer is a single-chip solution for multiplexing four tributary channels into a single high speed data stream and for demultiplexing a high speed data stream back to four tributary channels. All of the necessary circuitry is integrated into the LXT6234 ERate Multiplexer; there is no need for an external framing device.


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    PDF LXT6234 LXT6234 HDB3 AMI ENCODER DECODER multiplexing e1 frame to e3 frame Frame structure for Multiplexing of four E2 streams into E3 stream LXT6234QE HDB3 to nrz multiplexer 30 pin circuit diagram of 64-1 multiplexer HDB3 intel 4e2 E1 HDB3

    CA16

    Abstract: PHOTODIODE ALARM CIRCUIT
    Text: Advance Data Sheet March 2001 CA16-Type 2.5 Gbits/s DWDM Transponder with 16-Channel 155 Mbits/s Multiplexer/Demultiplexer • Multiple alarms: — Loss of signal. — Loss of reference clock. — Loss of framing. — Laser degrade alarm. Applications The CA16-type transponders integrate up to 15 discrete


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    PDF CA16-Type 16-Channel Eac0-12, DS01-120OPTO DS99-352LWP) CA16 PHOTODIODE ALARM CIRCUIT

    LDB6234

    Abstract: HDB3 multiplexing e1 frame to e3 frame HDB3 decoder E1 HDB3 E2 liu multiplexing e2 frame e3 HDB3 E2 nrz to hdb3 NOTES ON MULTIPLEXER
    Text: LXT6234 E-Rate Multiplexer Application Note January 2001 For 16 E1/E3 Multipexer/Demultiplexer Order Number: 249313-001 As of January 15, 2001, this document replaces the Level One document AN9501. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


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    PDF LXT6234 AN9501. LDB6234 HDB3 multiplexing e1 frame to e3 frame HDB3 decoder E1 HDB3 E2 liu multiplexing e2 frame e3 HDB3 E2 nrz to hdb3 NOTES ON MULTIPLEXER

    c5lsm

    Abstract: TXC-03361 e2 framer g742 E12M
    Text: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET FEATURES DESCRIPTION • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format) The E123MUX is a CMOS VLSI device that provides the


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    PDF E123MUX TXC-03361 TXC-03361-MB c5lsm TXC-03361 e2 framer g742 E12M

    E123 multiplexer

    Abstract: HDB3 E2 multiplexers 74 LS 150 C10l 03361
    Text: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET FEATURES DESCRIPTION • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format) The E123MUX is a CMOS VLSI device that provides the


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    PDF E123MUX TXC-03361 E12/E23 TXC-03361-MB E123 multiplexer HDB3 E2 multiplexers 74 LS 150 C10l 03361

    54FCT138DMQB

    Abstract: No abstract text available
    Text: 54FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FCT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three


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    PDF 54FCT138 FCT138 1-of-24 1-of-32 7654012A 54FCT138DM 54FCT138DM 54FCT138DMQB

    multiplexing e1 frame to e3 frame

    Abstract: HDB3 E2 SDB6234 HDB3 to nrz 1 into 12 demultiplexer circuit diagram HDB3 decoder 1 into 16 demultiplexer circuit diagram using 1 i multiplexing e2 frame e3 design 16 bit demultiplexer introduction HDB3 can use where
    Text: APPLICATION NOTE 9501 APRIL 1996 SXT6234 E-Rate Multiplexer For 16-E1/E3 Multiplexer/Demultiplexer Introduction 1 E1 Standard The SXT6234 E-Rate Multiplexer offers a simple and economic approach to building E1/E2, E2/E3 and E1/E3 multiplexers and demultiplexers. This application note


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    PDF SXT6234 16-E1/E3 16E1/E3 SDB6234 multiplexing e1 frame to e3 frame HDB3 E2 HDB3 to nrz 1 into 12 demultiplexer circuit diagram HDB3 decoder 1 into 16 demultiplexer circuit diagram using 1 i multiplexing e2 frame e3 design 16 bit demultiplexer introduction HDB3 can use where

    Untitled

    Abstract: No abstract text available
    Text: VITESSE SEMICONDUCTOR CORPORATION Datasheet VSC8061/VSC8062 2.5 Gb/s 16-Bit Multiplexer/ Demultiplexer Chipset Features • Serial Data Rate up to 2.5 Gb/s • 16-bit Wide ECL 100K Compatible Parallel Data Interface • Differential High Speed Data Outputs


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    PDF VSC8061/VSC8062 16-Bit VS8061 VS8061: VS8062: 52-pin VS8062

    54FCT138

    Abstract: 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB E20A J16A W16A
    Text: 54FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FCT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three


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    PDF 54FCT138 FCT138 1-of-24 1-of-32 De959 54FCT138 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB E20A J16A W16A

    54FCT138

    Abstract: 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB E20A J16A W16A
    Text: 54FCT138 1-of-8 Decoder/Demultiplexer General Description Features The FCT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three


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    PDF 54FCT138 FCT138 1-of-24 1-of-32 54FCT138 54FCT138DMQB 54FCT138FMQB 54FCT138LMQB E20A J16A W16A

    16 line to 4 line coder multiplexer

    Abstract: LEVEL ONE COMMUNICATIONS circuit diagram of 64-1 multiplexer Frame structure for Multiplexing of four E2 streams into E3 stream 500E SXT6234 HDB3 AMI ENCODER DECODER Frame structure for Multiplexing of four E1 streams into E2 stream multiplexing demultiplexing e2 E1 HDB3
    Text: DATA SHEET AUGUST 1998 Revision 1.3 SXT6234 E-Rate Multiplexer General Description Features • Performs four-E1 to one-E2, or four-E2 to one-E3 multiplexing. Five ICs will implement a sixteen-E1 to one-E3 multiplexer. The SXT6234 E-Rate Multiplexer is a single-chip solution


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    PDF SXT6234 SXT6234 16 line to 4 line coder multiplexer LEVEL ONE COMMUNICATIONS circuit diagram of 64-1 multiplexer Frame structure for Multiplexing of four E2 streams into E3 stream 500E HDB3 AMI ENCODER DECODER Frame structure for Multiplexing of four E1 streams into E2 stream multiplexing demultiplexing e2 E1 HDB3

    SSSB149

    Abstract: D8130 F628 pseudo random sequence generator application
    Text: SSSB149 2.5GHz 16:1 DeMultiplexer SDH Product Range 2.5GHz 16:1 DEMULTIPLEXER The SSSB149 is a very high speed 16 : 1 serial to parallel data converter suitable for digital voice or data communication applications. The device incorporates frame recognition and realignment circuitry and complies to ITU-T standards


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    PDF SSSB149 SSSB149 ECL100k D8130 F628 pseudo random sequence generator application

    dflj

    Abstract: No abstract text available
    Text: Advance Data Sheet September 1999 + microelectronics _ group Lucent Technologies m M Bell Labs Innovations TRCV012G5 2.5 Gbits/s Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features Description • Fully integrated limiting amplifier, clock recovery,


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    PDF TRCV012G5 OC-48/STM-16 128-Pin TRCV012G5 QG40472 dflj

    Untitled

    Abstract: No abstract text available
    Text: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET = • Multiplexer/demultiplexer for ITU-T Recommendations: G.742 E2 frame format G.751 (E3 frame format) DESCRIPTION = The E123MUX is a CMOS VLSI device that provides the E13 functions needed to multiplex and demultiplex


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    PDF E123MUX TXC-03361 E13Skip E12/E23 TXC-03361-MB

    Untitled

    Abstract: No abstract text available
    Text: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET DESCRIPTION = • Multiplexer/demultiplexer for ITU-T Recommendations: G.742 E2 frame format G.751 (E3 frame format) The E123MUX is a CMOS VLSI device that provides the E13 functions needed to multiplex and demultiplex


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    PDF E123MUX TXC-03361 E12/E23 TXC-03361-M E123MUX

    Untitled

    Abstract: No abstract text available
    Text: E123M UX Device E1/E2/E3 MUX/DEMUX TXC-03361 Engines for Giooal Connectivity DATA SHEET DESCRIPTION FEATURES • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format)


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    PDF E123M TXC-03361 E123MUX TXC-06125, TXC-20163, 50-pin TXC-03361

    Untitled

    Abstract: No abstract text available
    Text: tm ä n S w it c h x- E123MUX Device s E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET FEATURES DESCRIPTION ^ • • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format)


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    PDF E123MUX TXC-03361 E12/E23 TXC-03361-MB

    aux-04

    Abstract: No abstract text available
    Text: DATA S H E E T JULY 1999 Revision 2.0 LXT6234 E-Rate Multiplexer General Description Features The LXT6234 E-Rate Multiplexer is a single-chip solution for multiplexing four tributary channels into a single high speed data stream and for demultiplexing a high speed data


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    PDF LXT6234 LXT6234 aux-04

    Untitled

    Abstract: No abstract text available
    Text: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET PRODUCT PREVIEW = • Multiplexer/demultiplexer for ITU-T Recommendations: G.742 E2 frame format G.751 (E3 frame format) DESCRIPTION = The E123MUX is a CMOS VLSI device that provides the E13 functions needed to multiplex and demultiplex


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    PDF E123MUX TXC-03361 E12/E23 E12RLm) E23RLm) D004b2Ã TXC-03361-MB

    vsc8061

    Abstract: No abstract text available
    Text: Datsheet VSC8061/VSC8062 2.5 Gb/s 16-Bit Multiplexer/ Demultiplexer Chipset Features • Serial Data Rate up to 2.5 Gb/s • 16-bit Wide ECL 100K Compatible Parallel Data Interface • Power Dissipation: VS8061: 2.OW max , YS8062: 1.7W(max) * Standard ECL Power Supplies: V EE = -5.2


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    PDF VSC8061/VSC8062 16-bit VS8061 VS8061: YS8062: 52-pm 52-pin VS8062 vsc8061

    TT 46 N 16 LOF

    Abstract: TXC-03361 88H-8AH MCMI hdb3 Alarm Clock by using ttl c5lsm Digital Alarm Clock by using ttl 4S50 10D41 HDB3 E2
    Text: E123MUX Device y E1/E2/E3 MUX/DEMUX TXC-03361 Z7 Û ÏS IX ] FEATURES DESCRIPTION • Multiplexer/demultiplexer for ITU-T Recommendations: G.742 E2 frame format G.751 (E3 frame format) The E123MUX is a CMOS VLSI device that provides the E13 functions needed to multiplex and demultiplex


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    PDF E123MUX txc-03361 E12/E23 R23CS E12RLm) E23RLm) TXC-03361 TD0415E 0004h2Ã TT 46 N 16 LOF 88H-8AH MCMI hdb3 Alarm Clock by using ttl c5lsm Digital Alarm Clock by using ttl 4S50 10D41 HDB3 E2