STM32F103xE
Abstract: LQPF100 FOOTPRINTS BGA64 LQFP100 LQFP48 LQFP64 STM32F103C8 STM32F103RB AN2606 STM32F103CBT6
Text: STM32F103x8 STM32F103xB Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1
|
Original
|
STM32F103x8
STM32F103xB
32-bit
4-to-16
STM32F103xE
LQPF100 FOOTPRINTS
BGA64
LQFP100
LQFP48
LQFP64
STM32F103C8
STM32F103RB
AN2606
STM32F103CBT6
|
PDF
|
STM32 LQFP-64 footprint
Abstract: rain alarm CIRCUIT using IC 555 vfQFPn-36 footprint LQFP100 LQFP48 LQFP64 STM32F101 QFN-36 STM32F10xxx jtag
Text: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory
|
Original
|
STM32F101x8
STM32F101xB
32-bit
4-to-16
STM32 LQFP-64 footprint
rain alarm CIRCUIT using IC 555
vfQFPn-36 footprint
LQFP100
LQFP48
LQFP64
STM32F101
QFN-36
STM32F10xxx jtag
|
PDF
|
B.A 2ND HP DATE SHEET 2011
Abstract: DAC5682Z DAC5681Z DAC5681ZIRGCR DAC5681ZIRGCT
Text: DAC5681Z www.ti.com. SLLS865B – AUGUST 2007 – REVISED MARCH 2009 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER DAC
|
Original
|
DAC5681Z
SLLS865B
16-BIT,
16-Bit
2x-32x
B.A 2ND HP DATE SHEET 2011
DAC5682Z
DAC5681Z
DAC5681ZIRGCR
DAC5681ZIRGCT
|
PDF
|
DVD optical pick-up assembly
Abstract: LQM21PN2R2 Laser Diode for dvd 500 mW PCB GSM ANTENNA G003 TPA6141A2 TPA6141A2YFFR TPA6141A2YFFT DVD laser pickup assembly
Text: TPA6141A2 www.ti.com. SLOS634A – MARCH 2009 – REVISED AUGUST 2009 CLASS-G DIRECTPATH STEREO HEADPHONE AMPLIFIER
|
Original
|
TPA6141A2
SLOS634A
TPA6141)
DVD optical pick-up assembly
LQM21PN2R2
Laser Diode for dvd 500 mW
PCB GSM ANTENNA
G003
TPA6141A2
TPA6141A2YFFR
TPA6141A2YFFT
DVD laser pickup assembly
|
PDF
|
DAC5688
Abstract: DAC5689 DAC5689IRGCR DAC5689IRGCT
Text: DAC5689 www.ti.com . SLLS989 – SEPTEMBER 2009 16-BIT, 800 MSPS 2x–8x INTERPOLATING DUAL-CHANNEL
|
Original
|
DAC5689
SLLS989
16-BIT,
32-Bit
DAC5688
DAC5689
DAC5689IRGCR
DAC5689IRGCT
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TPS22921, TPS22922, TPS22922B www.ti.com. SLVS749A – NOVEMBER 2008 – REVISED DECEMBER 2008 LOW INPUT VOLTAGE, ULTRA-LOW rON LOAD SWITCHES
|
Original
|
TPS22921,
TPS22922,
TPS22922B
SLVS749A
TPS22921
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TPS62400, TPS62401 TPS62402, TPS62403, TPS62404 www.ti.com SLVS681E – JUNE 2006 – REVISED APRIL 2010 2.25MHz 400mA/600mA Dual Step-Down Converter In Small 3x3mm QFN Package Check for Samples: TPS62400, TPS62401, TPS62402, TPS62403, TPS62404 FEATURES 1
|
Original
|
TPS62400,
TPS62401
TPS62402,
TPS62403,
TPS62404
SLVS681E
25MHz
400mA/600mA
TPS62401,
|
PDF
|
UCC2895 application
Abstract: uc3875 application note UC3879 application notes ucc3895 application note SLUA246
Text: UCC1895 UCC2895 UCC3895 SLUS157O - DECEMBER 1999 - REVISED APRIL 2010 BiCMOS ADVANCED PHASE-SHIFT PWM CONTROLLER FEATURES D Programmable Output Turn-on Delay D Adaptive Delay Set D Bidirectional Oscillator Synchronization D Voltage-Mode, Peak Current-Mode, or
|
Original
|
UCC1895
UCC2895
UCC3895
SLUS157O
UCC3895
UCC2895 application
uc3875 application note
UC3879 application notes
ucc3895 application note
SLUA246
|
PDF
|
74LVC1G126DBVRE4
Abstract: A115-A C101 SN74LVC1G126
Text: SN74LVC1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT www.ti.com SCES224N – APRIL 1999 – REVISED FEBRUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
|
Original
|
SN74LVC1G126
SCES224N
24-mA
74LVC1G126DBVRE4
A115-A
C101
SN74LVC1G126
|
PDF
|
PWM by using dsp F2812
Abstract: hp 7540 monitor circuit diagram F2812 SM320F2812 TMS320C2000 TMS320x281x Event Manager EV Reference Guide TMS320x281x DSP Event Manager EV Reference IFR 9540 M421 30 327 9540
Text: SM320F2812-HT Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
|
Original
|
SM320F2812-HT
SGUS062
PWM by using dsp F2812
hp 7540 monitor circuit diagram
F2812
SM320F2812
TMS320C2000
TMS320x281x Event Manager EV Reference Guide
TMS320x281x DSP Event Manager EV Reference
IFR 9540
M421
30 327 9540
|
PDF
|
Untitled
Abstract: No abstract text available
Text: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1 performance at 0 wait state memory
|
Original
|
STM32F101x8
STM32F101xB
32-bit
LQFP48
4-to-16
|
PDF
|
PH6N
Abstract: TRANSISTOR PH6N transistor ph4n
Text: SPEAr600 Embedded MPU with dual ARM926 core, flexible memory support, powerful connectivity features and programmable LCD interface Datasheet − production data Features • Dual ARM926EJ-S core up to 333 MHz: – Each with 16 Kbytes instruction cache + 16
|
Original
|
SPEAr600
ARM926
ARM926EJ-S
8/16-bit
DDR1333
PH6N
TRANSISTOR PH6N
transistor ph4n
|
PDF
|
SN74LVC1G
Abstract: SN74LVC1G79-EP A115-A C101 SN74LVC1G79 SN74LVC1G79YZPR
Text: SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES220S – APRIL 1999 – REVISED NOVEMBER 2007 FEATURES 1 • Available in the Texas Instruments NanoFree Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V
|
Original
|
SN74LVC1G79
SCES220S
24-mA
SN74LVC1G
SN74LVC1G79-EP
A115-A
C101
SN74LVC1G79
SN74LVC1G79YZPR
|
PDF
|
C101
Abstract: TPS22921 TPS22921YFPR TPS22922 TPS22922B
Text: TPS22921, TPS22922, TPS22922B www.ti.com . SLVS749 – NOVEMBER 2008 LOW INPUT VOLTAGE, ULTRA-LOW rON LOAD SWITCHES
|
Original
|
TPS22921,
TPS22922,
TPS22922B
SLVS749
C101
TPS22921
TPS22921YFPR
TPS22922
TPS22922B
|
PDF
|
|
|
STM32F102x8
Abstract: STM32F1 stm32f102 manual stm32f102 stm32f102 reference manual stm32f102c AN2606 stm32 STM32F102xB AN2606 LQFP48
Text: STM32F102x8 STM32F102xB Medium-density USB access line, ARM-based 32-bit MCU with 64/128KB Flash, USB FS interface, 6 timers, ADC & 8 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 48 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1
|
Original
|
STM32F102x8
STM32F102xB
32-bit
64/128KB
4-to-16
STM32F102x8
STM32F1
stm32f102 manual
stm32f102
stm32f102 reference manual
stm32f102c
AN2606 stm32
STM32F102xB
AN2606
LQFP48
|
PDF
|
Untitled
Abstract: No abstract text available
Text: STM32F102x8 STM32F102xB Medium-density USB access line, ARM-based 32b MCU with 64/128KB Flash, USB FS, 6 timers, ADC & 8 com. interfaces Datasheet - production data Features • Core: ARM 32-bit Cortex -M3 CPU – 48 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1
|
Original
|
STM32F102x8
STM32F102xB
64/128KB
32-bit
4-to-16
DocID15056
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ADS8556 ADS8557 ADS8558 www.ti.com . SBAS404A – OCTOBER 2006 – REVISED AUGUST 2009 16-, 14-, 12-Bit, Six-Channel, Simultaneous Sampling
|
Original
|
ADS8556
ADS8557
ADS8558
SBAS404A
12-Bit,
ADS8556/7/8
730kSPS
500kSPS
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TPA6141A2 www.ti.com. SLOS634A – MARCH 2009 – REVISED AUGUST 2009 CLASS-G DIRECTPATH STEREO HEADPHONE AMPLIFIER
|
Original
|
TPA6141A2
SLOS634A
|
PDF
|
transistor PH6n
Abstract: transistor PH7n ph5n PH6N transistor ph4n transistor ph0n ph7n ph1n lk1 K20 transistor ph5n
Text: SPEAr600 Embedded MPU with dual ARM926 core, flexible memory support, powerful connectivity features and programmable LCD interface Features • Dual ARM926EJ-S core up to 333 MHz: – Each with 16 Kbytes instruction cache + 16 Kbytes data cache ■ High performance 8-channel DMA
|
Original
|
SPEAr600
ARM926
ARM926EJ-S
8/16-bit
DDR1333
transistor PH6n
transistor PH7n
ph5n
PH6N
transistor ph4n
transistor ph0n
ph7n
ph1n
lk1 K20
transistor ph5n
|
PDF
|
Untitled
Abstract: No abstract text available
Text: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Datasheet - production data Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1
|
Original
|
STM32F101x8
STM32F101xB
32-bit
LQFP48
4-to-16
DocID13586
|
PDF
|
Untitled
Abstract: No abstract text available
Text: STM32F101x8 STM32F101xB Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces Datasheet − production data Features • Core: ARM 32-bit Cortex -M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1
|
Original
|
STM32F101x8
STM32F101xB
32-bit
LQFP48
4-to-16
|
PDF
|
Untitled
Abstract: No abstract text available
Text: VN920-E Single-channel high side driver Features Type RDS on IOUT VCC VN920-E VN920-12-E 16 mΩ 30 A 36 V PENTAWATT • CMOS compatible input ■ Proportional load current sense ■ Shorted load protection ■ Under voltage and overvoltage shutdown ■ Overvoltage clamp
|
Original
|
VN920-E
VN920-12-E
2002/95/ec
VN920-E
|
PDF
|
hp 8133A
Abstract: B.A 2ND HP DATE SHEET 2011 NO1X4 DAC5681Z DAC5682Z rf power detector dynamic range CDMA DAC5681ZIRGCR DAC5681ZIRGCT
Text: DAC5681Z www.ti.com . SLLS865C – AUGUST 2007 – REVISED JUNE 2009 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING
|
Original
|
DAC5681Z
SLLS865C
16-BIT,
16-Bit
2x-32x
hp 8133A
B.A 2ND HP DATE SHEET 2011
NO1X4
DAC5681Z
DAC5682Z
rf power detector dynamic range CDMA
DAC5681ZIRGCR
DAC5681ZIRGCT
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 4 THIS DRAWING 3 IS U N P U B LIS H E D . COPYRIGHT RELEASED BY TE ELECTRONICS CORPORATION. FOR PUBLICATION A LL RIGHTS 2 - ,- LOC R ESERVED. R E V IS IO N S D IST D p LTR D E SC RIPTIO N D REVISED. ECR—0 9 —0 2 0 9 5 1 DATE DWN APVD 22SEP09 FY WK
|
OCR Scan
|
22SEP09
L94V-0,
762/xm
048/xm
27/xm
|
PDF
|