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3D6701 Abstract: datadelay clifton resolver Text: 3D6701 MONOLITHIC CLOCK SYNCHRONIZER SERIES 3D6701 FEATURES •         PINOUT Synchronizes free-running clock to external gate signal Input frequency range: 30MHz through 100MHz Phase resolution: 200ps typical Output frequency: Programmable from FIN to FIN/256	Original	3D6701 3D6701) 30MHz 100MHz 200ps FIN/256 DIP-16 3D6701R SOIC-16 3D6701 datadelay clifton resolver	PDF

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3D6701

Abstract: datadelay clifton resolver
Text: 3D6701 MONOLITHIC CLOCK SYNCHRONIZER SERIES 3D6701 FEATURES •         PINOUT Synchronizes free-running clock to external gate signal Input frequency range: 30MHz through 100MHz Phase resolution: 200ps typical Output frequency: Programmable from FIN to FIN/256

Original

3D6701 3D6701) 30MHz 100MHz 200ps FIN/256 DIP-16 3D6701R SOIC-16 3D6701 datadelay clifton resolver

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