558 DIVIDER BUFFERS Search Results

558 DIVIDER BUFFERS Result Highlights (5)

Part	Manufacturer	Description
87004BGI-03LF	Renesas Electronics Corporation	LVCMOS/ LVTTL Fanout Buffer/Divider
8V74S4622NLGI	Renesas Electronics Corporation	Clock Fanout Buffer/Frequency Divider
87004BGI-03LFT	Renesas Electronics Corporation	LVCMOS/ LVTTL Fanout Buffer/Divider
8V74S4622NLGI8	Renesas Electronics Corporation	Clock Fanout Buffer/Frequency Divider
8V74S4622NLGI/W	Renesas Electronics Corporation	Clock Fanout Buffer/Frequency Divider

558 DIVIDER BUFFERS Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: UM10314 LPC3130/31 User manual Rev. 2 — 23 May 2012 Document information Info Content Keywords LPC3130, LPC3131, ARM9, USB Abstract LPC3130/31 User manual User manual UM10314 NXP Semiconductors LPC3130/31 User manual Revision history Rev Date Description	Original	UM10314 LPC3130/31 LPC3130, LPC3131,	PDF
1010 817 D21 B Abstract: M68MEVB1632 A-18 D-20 ICD16 SPWM 555 DSA0039272 D44 connector 922 motorola stepper drive D28 Text: INDEX –A– data word 4-26 I/O block diagram 4-25 interface 4-24 peripheral interface protocol SPI 4-25 sources 4-20 debugging mode freeze assertion diagram A-18 serial communication diagram A-18 timing A-18 Base ID mask bits D-90 Basic operand size 5-24	Original	MC68336/376 Index-17 Index-18 1010 817 D21 B M68MEVB1632 A-18 D-20 ICD16 SPWM 555 DSA0039272 D44 connector 922 motorola stepper drive D28	PDF
D73 -Y Abstract: M68MEVB1632 IC 555 timer motor control 1010 817 D21 B transmitter module spwm tx - 4 A-18 D-20 555 stepper pulse generator d11 1117 d92 02 Text: Freescale Semiconductor, Inc. INDEX Freescale Semiconductor, Inc. –A– data word 4-26 I/O block diagram 4-25 interface 4-24 peripheral interface protocol SPI 4-25 sources 4-20 debugging mode freeze assertion diagram A-18 serial communication diagram A-18	Original	MC68336/376 Index-17 Index-18 D73 -Y M68MEVB1632 IC 555 timer motor control 1010 817 D21 B transmitter module spwm tx - 4 A-18 D-20 555 stepper pulse generator d11 1117 d92 02	PDF
IS07816 Abstract: No abstract text available Text: Features • • • • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Programmable Baud Rate Generator Parity, Framing and Overrun Error Detection Line Break Generation and Detection Automatic Echo, Local Loopback and Remote Loopback Channel Modes	Original	ISO7816 RS485 32-bit 07/01/0M IS07816	PDF
Untitled Abstract: No abstract text available Text: Features • • • • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Programmable Baud Rate Generator Parity, Framing and Overrun Error Detection Line Break Generation and Detection Automatic Echo, Local Loopback and Remote Loopback Channel Modes	Original	ISO7816 RS485 32-bit 1733Bâ 12/01/0M	PDF
Untitled Abstract: No abstract text available Text: Features • • • • • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Programmable Baud Rate Generator Parity, Framing and Overrun Error Detection Line Break Generation and Detection Automatic Echo, Local Loopback and Remote Loopback Channel Modes	Original	ISO7816 RS485 1739Bâ 12/01/0M	PDF
circuit diagram video transmitter and receiver Abstract: video transmitter 2.4 GHz EP2AGX65DF29 circuit diagram of rf transmitter and receiver EP2AGX95EF29 CPRI CDR EP2AGX190EF29 remote control transmitter and receiver circuit 5 channel RF transmitter and Receiver circuit active noise cancellation for FPGA Text: Section I. Transceiver Architecture This section provides information about Arria II GX transceiver architecture and clocking. It also describes configuring multiple protocols, data rates, and reset control and power down in the Arria II GX device family. This section includes the following	Original	2010tting circuit diagram video transmitter and receiver video transmitter 2.4 GHz EP2AGX65DF29 circuit diagram of rf transmitter and receiver EP2AGX95EF29 CPRI CDR EP2AGX190EF29 remote control transmitter and receiver circuit 5 channel RF transmitter and Receiver circuit active noise cancellation for FPGA	PDF
SP8855E Abstract: No abstract text available Text: SP8855E 2.8GHz Parallel Load Professional Synthesiser Advance Information DS4239 The SP8855E is one of a family of parallel load synthesisers containing all the elements apart from the loop amplifier to fabricate a PLL synthesis loop. Other devices in the series are the SP8852E which is a fully programmable	Original	SP8855E DS4239 SP8855E SP8852E SP8854E SP8855D. SP8855E/KG/HCAR SP8855E/IG/HCAR	PDF
circuit diagram video transmitter and receiver Abstract: video transmitter 2.4 GHz receiver transmitter 1.2 ghz video circuit diagram of rf transmitter and receiver 4 channel rf receiver 8 channel remote control transmitter circuit ENCODER 8 BITS EP2AGX190FF35 EP2AGX95EF29 remote control transmitter and receiver circuit Text: Arria II GX Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V2-2.0 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other	Original		PDF
GPON block diagram Abstract: hd-SDI deserializer LVDS SDI SERIALIZER EP2AGX95EF29 EP2AGX190EF29 SerialLite EP2AGX190 ep2agx65df ENCODER 8 BITS d2151 Text: 1. Arria II GX Transceiver Architecture AIIGX52001-3.0 This chapter describes all the modules that are available in the Arria II GX transceiver architecture and describes how these modules are used in the protocols shown below. In addition, this chapter lists the available test modes, dynamic	Original	AIIGX52001-3 GPON block diagram hd-SDI deserializer LVDS SDI SERIALIZER EP2AGX95EF29 EP2AGX190EF29 SerialLite EP2AGX190 ep2agx65df ENCODER 8 BITS d2151	PDF
AD9553 Abstract: GR-253 GR-253-CORE JESD51-2 MO-220-WHHD NF75 Text: Flexible Clock Translator for GPON, Base Station, SONET/SDH, T1/E1, and Ethernet AD9553 FEATURES GENERAL DESCRIPTION Input frequencies from 8 kHz to 710 MHz Output frequencies up to 810 MHz Preset pin-programmable frequency translation ratios cover popular wireline and wireless frequency applications,	Original	AD9553 CP-32-7) AD9553BCPZ AD9553BCPZ-REEL7 AD9553/PCBZ 32-Lead CP-32-7 AD9553 GR-253 GR-253-CORE JESD51-2 MO-220-WHHD NF75	PDF
USART2 Abstract: ISO7816 Text: Features • • • • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Programmable Baud Rate Generator Parity, Framing and Overrun Error Detection Line Break Generation and Detection Automatic Echo, Local Loopback and Remote Loopback Channel Modes	Original	ISO7816 RS485 32-bit 1733C USART2	PDF
PROTOCOL RS485 WITH ATMEL Abstract: ISO7816 IS0-7816 Text: Features • • • • • • • • • • • • • • Compatible with an Embedded ARM7TDMI Processor Programmable Baud Rate Generator Parity, Framing and Overrun Error Detection Line Break Generation and Detection Automatic Echo, Local Loopback and Remote Loopback Channel Modes	Original	ISO7816 RS485 1739C PROTOCOL RS485 WITH ATMEL IS0-7816	PDF
AD9289 Abstract: AD9289BBC-65 AD9289BBC-65EB ANSI644 ANSI-644 Text: Quad 8-Bit, 65 MSPS Serial LVDS 3V A/D Converter AD9289 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM • Four ADCs in one package DRGND AVDD • Serial LVDS digital output data rates up to 520 Mbps ANSI644 PDWN DRVDD OR+ OR- S1 AD9289 • Data clock output provided	Original	AD9289 ANSI644) AD9289BBC-65 AD9289BBC-65EB PR03682-0-6/04 AD9289 AD9289BBC-65 AD9289BBC-65EB ANSI644 ANSI-644	PDF

Untitled Abstract: No abstract text available Text: TSC2117 www.ti.com SLAS550B – APRIL 2009 – REVISED JUNE 2012 Low-Power Audio Codec with Embedded miniDSP, Stereo Class-D Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller Check for Samples: TSC2117 1 INTRODUCTION 1.1 Features • Low-Power 13-mW Stereo 48-kHz Playback	Original	TSC2117 SLAS550B 13-mW 48-kHz 192-kHz	PDF
Untitled Abstract: No abstract text available Text: LOGIC DEVICES INC 5 aE D • SSbS^QS 0001211 4 ■ _ T - 9 3 -07 LMU557/558 8 x 8-bit Parallel Multiplier ! DESCRIPTION FEATURES The LMU557 and LMU558 are 8-bit parallel multipliers with high speed and low power operation. They are	OCR Scan	LMU557/558 LMU557 LMU558 54S557 54S558 Am25S557/558 54S557/558 MIL-STD883, S97/9-A	PDF
Untitled Abstract: No abstract text available Text: LMU557/558 8 x 8-bit Parallel Multiplier Features_ Description_ □ 60 ns worst-case multiply time The LMU557 and LMU558 are 8-bit parallel multipliers with high speed and low power operation. They are pin for pin equivalents with 54S557	OCR Scan	LMU557/558 LMU557 LMU558 54S557 54S558 Am25S557/558 54S557/558 MIL-STD883, 40-pin	PDF
"Pin for Pin" Abstract: LMU557 B-739 LMU558DC U-558D Text: LMU557/558 8 x 8-bit Parallel Multiplier Features Description □ 60 ns worst-case multiply time The LMU557 and LMU558 are 8-bit parallel multipliers with high speed and low power operation. They are pin for pin equivalents with 54S557 and 54S558 type multipliers. Full	OCR Scan	Am25S557/558 54S557/558 MIL-STD883, 40-pin LMU557/558 LMU557 LMU558DM70 LMU558DM "Pin for Pin" B-739 LMU558DC U-558D	PDF
block diagram 8x8 booth multiplier Abstract: 25S558 comparison between intel 8086 and Zilog 80 microprocessor mPD7720 intel 8087 74S508 74S556 8x8 booth multiplier 67558-1 25S557 Text: Five New Ways to Go Forth and Multiply Chuck Hastings Our Multiplier Population Explosion Recently it has seemed as if every time you turned around Monolithic Memories was announcing another new multiplier. Want to catch your breath, and find out where each of these fits	OCR Scan	AR-107. Southcon/82 block diagram 8x8 booth multiplier 25S558 comparison between intel 8086 and Zilog 80 microprocessor mPD7720 intel 8087 74S508 74S556 8x8 booth multiplier 67558-1 25S557	PDF
74AC154 Abstract: design octal counter using j-k flipflop HD74HC04 octal counter application octal decoder ic HD74HC259 HD74HC126 HD74HC373 Text: Contents I General Information. HD74AC Scries. y 9 FA C T Descriptions and Fam ily Characteristics . n Defenition o f Specifications. 20 Design Considerations. 29 •HD74HC Series.	OCR Scan	HD74AC HD74HC 74AC154 design octal counter using j-k flipflop HD74HC04 octal counter application octal decoder ic HD74HC259 HD74HC126 HD74HC373	PDF
27256 ROM Abstract: No abstract text available Text: HD64530— LAPD Controller Description The HD64530 one-chip CMOS communica tions device supports the LAPD protocol and conforms to the ISDN integrated ser vices digital network standard. LAPD is layer 2 of the international ISDN standard specified by ITU-T recommendations 1.440	OCR Scan	HD64530-- HD64530 HD64530. 16-bit D64541S D64520F 27256 ROM	PDF
TDC1009 Abstract: TDC-1009 trw 2009 Text: LOGIC DEVICES INC 2bE D SSbSTQS OGOiaSÌ s T - 9 S -Ô 7 12 x 12-bit Multiplier-Accumuiator FEATURES LM A 10 0 9 /2 0 0 9 D E S C R IP T IO N □ 45 ns Worst-Case M ultiplyAccumulate Time The LMA1009 and LMA2009 are 12-bit CMOS multiplier-accumulators. They are pm-for-pirt equivalent to the	OCR Scan	12-bit LMA1009/2009 TDC1009 MIL-STD-883, 64-pin 68-pin LMA1009 TDC1009 TDC-1009 trw 2009	PDF
LM1208 Abstract: crt monitor block diagram differential pair cascode differential pair cascode darlington THR9 TRANSISTOR C 6090 LM1208N Text: January 1994 LM1208 130 MHz RGB Video Amplifier System with Blanking General Description The LM 1208 is a very high frequency video amplifier system intended for use in high resolution RGB monitor applica tions. In addition to the three matched video amplifiers, the	OCR Scan	LM1208 LM1208 Cep-01451, 0Qfifiti24 crt monitor block diagram differential pair cascode differential pair cascode darlington THR9 TRANSISTOR C 6090 LM1208N	PDF
EZ 742 Abstract: ST EZ 725 W156CH 24MHZ 48MHZ W156C eZ 752 sk 4012 cypress COUNTRY OF ORIGIN CRYSTAL14 Text: PRELIMINARY • / CYPRESS W156C Spread Spectrum FTG for VIA MVP4 Features Table 1. M ode In p u t Table • Maximized EMI suppression using Cypress’s Spread Spectrum technology • Single-chip implementation • Four copies of CPU output • Six copies of PCI output	OCR Scan	W156C 48-MHz 24-MHz 25aife GG3173Ã EZ 742 ST EZ 725 W156CH 24MHZ 48MHZ W156C eZ 752 sk 4012 cypress COUNTRY OF ORIGIN CRYSTAL14	PDF

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558 DIVIDER BUFFERS Search Results

558 DIVIDER BUFFERS Result Highlights (5)

558 DIVIDER BUFFERS Datasheets Context Search

Untitled

1010 817 D21 B

D73 -Y

IS07816

Untitled

Untitled

circuit diagram video transmitter and receiver

SP8855E

circuit diagram video transmitter and receiver

GPON block diagram

AD9553

USART2

PROTOCOL RS485 WITH ATMEL

AD9289

Untitled

Untitled

Untitled

"Pin for Pin"

block diagram 8x8 booth multiplier

74AC154

27256 ROM

TDC1009

LM1208

EZ 742