Tuner sharp QPSK
Abstract: 9031 code fir filter Numerically Controlled Oscillator HSP50210 HSP50214 HSP50214VC HSP50214VI
Text: February 2000 Programmable Downconverter Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts digitized IF data into filtered baseband data which can be
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HSP50214
100dB
255-Tap
625kHz
Tuner sharp QPSK
9031
code fir filter
Numerically Controlled Oscillator
HSP50210
HSP50214VC
HSP50214VI
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tuner 3402
Abstract: HSP50210 HSP50214B HSP50214BVC HSP50214BVI
Text: HSP50214B Semiconductor Data Sheet February 1999 File Number 4450.2 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The
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HSP50214B
HSP50214B
55MHz
14-bit
tuner 3402
HSP50210
HSP50214BVC
HSP50214BVI
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Untitled
Abstract: No abstract text available
Text: HSP50214B S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 65 MSPS Front-End Processing Rates CLKIN and 55MHz Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous • Processing Capable of >100dB SFDR
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HSP50214B
HSP50214B
14-bit
255-ts
1-800-4-HARRIS
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96330
Abstract: No abstract text available
Text: HSP50214A S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 65 MSPS Front-End Processing Rates CLKIN and 55 MSPS (41 MSPS Using the Discriminator) Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous
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HSP50214A
HSP50214A
14-bit
255-RL
96330
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HSP50210
Abstract: HSP50214B HSP50214BVI SAMPO intersil application note book CORDIC QAM modulation Tuner sharp QPSK
Text: HSP50214B TM Data Sheet May 2000 File Number 4450.3 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts • Up to 65 MSPS Front-End Processing Rates CLKIN and 55MHz Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous
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HSP50214B
HSP50214B
55MHz
255-TAP
100dB
255-Tap
982kHz
32-Bit
HSP50210
HSP50214BVI
SAMPO
intersil application note book
CORDIC QAM modulation
Tuner sharp QPSK
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Tuner sharp BPSK
Abstract: 16 bit parallel to serial NMT-900 HSP50214 HSP50214VC HSP50214VI HSP50210 polar modulator 3122 adj
Text: HSP50214 S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts
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HSP50214
HSP50214
100dB
255-Tap
1-800-4-HARRIS
Tuner sharp BPSK
16 bit parallel to serial
NMT-900
HSP50214VC
HSP50214VI
HSP50210
polar modulator
3122 adj
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free applications of arm7 processor
Abstract: thumb instruction set arm7 architecture ARM720T KPI-0006C code ARM7TDMI ARM7 instruction set ARM710T datasheet arm embedded datasheet ARM7
Text: CPU Core Die Area Clock Frequency and Performance Power mW/MHz CPU Core Cache Memory Management N/A N/A N/A ARM7TDMI ARM RISC Core with Thumb and EmbeddedICE Peak: 1.2mW/MHz 2 1.0mm on 0.25µm Ave: 0.6mW/MHz 2 2.1mm on 0.35µm Idle: <100µw 2 4.8mm on 0.6µm
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66MHz
59MIPS
66MHz
ARM710T
53MIPS
59MHz
ARM720T
ARM710T
ARM720T
free applications of arm7 processor
thumb instruction set
arm7 architecture
KPI-0006C
code ARM7TDMI
ARM7 instruction set
datasheet arm
embedded datasheet ARM7
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HSP50210
Abstract: HSP50214B HSP50214BVC HSP50214BVI intersil application note book
Text: HSP50214B Data Sheet February 1999 File Number 4450.2 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter PDC performs down
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HSP50214B
HSP50214B
55MHz
14-bit
HSP50210
HSP50214BVC
HSP50214BVI
intersil application note book
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HSP50210
Abstract: HSP50214B HSP50214BVC HSP50214BVI
Text: Data Sheet May 2000 File Number 4450.3 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter PDC performs down
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HSP50214B
65MSPS
55MHz
14-bit
HSP50210
HSP50214BVC
HSP50214BVI
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digital Serial FIR Filter
Abstract: NMT-900 Numerically Controlled Oscillator HSP50210 HSP50214 HSP50214VC HSP50214VI SAMPO
Text: HSP50214 S E M I C O N D U C T O R Programmable Downconverter June 1997 Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts
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HSP50214
HSP50214
100dB
255-Tap
1-800-4-HARRIS
digital Serial FIR Filter
NMT-900
Numerically Controlled Oscillator
HSP50210
HSP50214VC
HSP50214VI
SAMPO
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bpsk modulator 20mhz
Abstract: dqpsk modulator CW25 DATASHEET SEMICONDUCTOR tag c3 625 800 HSP50210 HSP50214B HSP50214BVC HSP50214BVI 9031d
Text: HSP50214B TM Data Sheet May 2000 File Number 4450.3 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter PDC performs down
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HSP50214B
HSP50214B
55MHz
14-bit
bpsk modulator 20mhz
dqpsk modulator
CW25 DATASHEET SEMICONDUCTOR
tag c3 625 800
HSP50210
HSP50214BVC
HSP50214BVI
9031d
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Untitled
Abstract: No abstract text available
Text: HSP50214B Data Sheet May 1, 2007 FN4450.4 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter PDC performs down
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HSP50214B
FN4450
HSP50214B
65MSPS
55MHz
14-bit
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HSP50210
Abstract: HSP50214B HSP50214BVC HSP50214BVCZ HSP50214BVI HSP50214BVIZ E23LG 23BITS
Text: HSP50214B Data Sheet May 1, 2007 FN4450.4 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter PDC performs down
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HSP50214B
FN4450
HSP50214B
65MSPS
55MHz
14-bit
HSP50210
HSP50214BVC
HSP50214BVCZ
HSP50214BVI
HSP50214BVIZ
E23LG
23BITS
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Untitled
Abstract: No abstract text available
Text: HSP50214B Data Sheet File Number 4450.2 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter PDC performs down
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HSP50214B
0214B)
14-bit
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Untitled
Abstract: No abstract text available
Text: HSP50214 HARRIS S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts
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OCR Scan
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PDF
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HSP50214
HSP50214
100dB
255-Tap
1-800-4-HARRIS
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Untitled
Abstract: No abstract text available
Text: HSP50214B Semiconductor Data Sheet January 1999 4450.1 File Number Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The
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PDF
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HSP50214B
HSP50214B
55MHz
14-bit
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Untitled
Abstract: No abstract text available
Text: HSP50214B Semiconductor Data Sheet January 1999 4450.1 File Number Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The
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HSP50214B
HSP50214B
55MHz
14-bit
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pdc 7ro
Abstract: FEC15 ix 3394
Text: HSP50214B Semiconductor D a ta s h e e t F e b ru a ry 1999 F ile N u m b e r 4450.2 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The
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OCR Scan
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PDF
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HSP50214B
HSP50214B
14-bit
pdc 7ro
FEC15
ix 3394
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Untitled
Abstract: No abstract text available
Text: HSP50214 HARRIS S E M I C O N D U C T O R Programmable Downconverter June 1997 Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts
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OCR Scan
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PDF
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HSP50214
HSP50214
100dB
255-Tap
5M-1982.
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Untitled
Abstract: No abstract text available
Text: HSP50214 Semiconductor Programmable Downconverter February 1998 Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts
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OCR Scan
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PDF
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HSP50214
HSP50214
100dB
255-Tap
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Untitled
Abstract: No abstract text available
Text: HSP50214B HARRIS S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 65 MSPS Front-End Processing Rates CLKIN and 55MHz Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214B Programmable Downconverter converts
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OCR Scan
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PDF
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HSP50214B
55MHz
HSP50214B
100dB
255-Tap
1-800-4-HARRIS
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Untitled
Abstract: No abstract text available
Text: HSP50214A HARRIS S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 65 MSPS Front-End Processing Rates CLKIN and 55 MSPS (41 MSPS Using the Discriminator) Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous
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OCR Scan
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PDF
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HSP50214A
HSP50214A
100dB
255-Tap
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