CY7C1371
Abstract: No abstract text available
Text: 25 CY7C1371AV25 CY7C1373AV25 PRELIMINARY 512Kx36/1Mx18 Flow-Thru SRAM with NoBL Architecture Features • Pin compatible and functionally equivalent to ZBT devices • Supports 117-MHz bus operations with zero wait states — Data is transferred on every clock
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CY7C1371AV25
CY7C1373AV25
512Kx36/1Mx18
117-MHz
100-MHz
CY7C1371
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