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CY7C2565KV18 Price and Stock

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Rochester Electronics LLC CY7C2565KV18-450BZI IC SRAM 72MBIT PAR 165FBGA
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DigiKey	CY7C2565KV18-450BZI	Tray			1	1 $625.68 10 $625.68 100 $625.68 1000 $625.68 10000 $625.68	Buy Now
Infineon Technologies AG CY7C2565KV18-450BZI IC SRAM 72MBIT PAR 165FBGA
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DigiKey	CY7C2565KV18-450BZI	Tray			136	1 - 10 - 100 - 1000 $541.4625 10000 $541.4625	Buy Now
Infineon Technologies AG CY7C2565KV18-500BZC IC SRAM 72MBIT PAR 165FBGA
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DigiKey	CY7C2565KV18-500BZC	Tray			136	1 - 10 - 100 - 1000 $595.6125 10000 $595.6125	Buy Now
Rochester Electronics LLC CY7C2565KV18-500BZC IC SRAM 72MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C2565KV18-500BZC	Tray			1	1 $688.27 10 $688.27 100 $688.27 1000 $688.27 10000 $688.27	Buy Now
Infineon Technologies AG CY7C2565KV18-450BZC IC SRAM 72MBIT PAR 165FBGA
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DigiKey	CY7C2565KV18-450BZC	Tray			136	1 - 10 - 100 - 1000 $492.2375 10000 $492.2375	Buy Now

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CY7C2565KV18 Datasheets (13)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
CY7C2565KV18-400BZC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 400MHZ 165FBGA		Original	PDF
CY7C2565KV18-400BZC		Cypress Semiconductor	72-Mbit QDR -II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT; Architecture: QDR-II+, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V		Original	PDF
CY7C2565KV18-400BZI		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 400MHZ 165FBGA		Original	PDF
CY7C2565KV18-400BZXC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 400MHZ 165FBGA		Original	PDF
CY7C2565KV18-400BZXI		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 400MHZ 165FBGA		Original	PDF
CY7C2565KV18-450BZC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 450MHZ 165FBGA		Original	PDF
CY7C2565KV18-450BZI		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 450MHZ 165FBGA		Original	PDF
CY7C2565KV18-450BZXC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 450MHZ 165FBGA		Original	PDF
CY7C2565KV18-500BZC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 500MHZ 165FBGA		Original	PDF
CY7C2565KV18-500BZC		Cypress Semiconductor	72-Mbit QDR -II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT; Architecture: QDR-II+, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V		Original	PDF
CY7C2565KV18-500BZI		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 500MHZ 165FBGA		Original	PDF
CY7C2565KV18-500BZXC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 500MHZ 165FBGA		Original	PDF
CY7C2565KV18-550BZC		Cypress Semiconductor	72-Mbit QDR -II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT; Architecture: QDR-II+, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V		Original	PDF

CY7C2565KV18 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions With Read Cycle Latency of 2.5 cycles:	Original	CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit CY7C2561KV18 CY7C2576KV18 CY7C2563KV18	PDF
Untitled Abstract: No abstract text available Text: CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR®II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • Separate independent read and write data ports	Original	CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit CY7C2563KV18	PDF
CY7C2563KV18-400BZXC Abstract: CY7C2563KV18 Text: CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 PRELIMINARY 72-Mbit QDR -II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions	Original	CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit CY7C2561KV18 CY7C2576KV18 CY7C2563KV18 CY7C2563KV18-400BZXC CY7C2563KV18	PDF
CY7C2563KV18 Abstract: ecn 1310 CY7C2563KV18-450BZXI CY7C2565KV18 Text: CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions With Read Cycle Latency of 2.5 cycles:	Original	CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit CY7C2563KV18 CY7C2563KV18 ecn 1310 CY7C2563KV18-450BZXI CY7C2565KV18	PDF
cy7c2565kv18-400bzi Abstract: 3M Touch Systems Text: CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions With Read Cycle Latency of 2.5 cycles:	Original	CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit CY7C2561KV18 CY7C2576KV18 CY7C2563KV18 cy7c2565kv18-400bzi 3M Touch Systems	PDF
CY7C2565KV18-500BZC Abstract: ecn 1310 3M Touch Systems Text: CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR®II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • Separate independent read and write data ports	Original	CY7C2561KV18, CY7C2576KV18 CY7C2563KV18, CY7C2565KV18 72-Mbit CY7C2561KV18 CY7C2576KV18 CY7C2563KV18 CY7C2565KV18-500BZC ecn 1310 3M Touch Systems	PDF
Cy7C25652 Abstract: CY7C25762KV18 CY7C25632 cy7c25632kv18 3M Touch Systems Text: CY7C25612KV18, CY7C25762KV18 CY7C25632KV18, CY7C25652KV18 72-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR®II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations Separate independent read and write data ports	Original	CY7C25612KV18, CY7C25762KV18 CY7C25632KV18, CY7C25652KV18 72-Mbit CY7C25612KV18 CY7C25762KV18 CY7C25632KV18 Cy7C25652 CY7C25632 cy7c25632kv18 3M Touch Systems	PDF
CY7C25632 Abstract: 3M Touch Systems Text: CY7C25632KV18 CY7C25652KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features • JTAG 1149.1 compatible test access port ■	Original	CY7C25632KV18 CY7C25652KV18 72-Mbit CY7C25632 3M Touch Systems	PDF
CY7C25652KV18 Abstract: CY7C25632 CY7C25632KV18-550BZXI CY7C25652KV18-450BZXC QDRII 3M Touch Systems Cy7C25652 Text: CY7C25632KV18 CY7C25652KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features • JTAG 1149.1 compatible test access port ■	Original	CY7C25632KV18 CY7C25652KV18 72-Mbit CY7C25652KV18 CY7C25632 CY7C25632KV18-550BZXI CY7C25652KV18-450BZXC QDRII 3M Touch Systems Cy7C25652	PDF
CY7C25632 Abstract: 3M Touch Systems Text: CY7C25632KV18 CY7C25652KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features • JTAG 1149.1 compatible test access port ■	Original	CY7C25632KV18 CY7C25652KV18 72-Mbit CY7C25632 3M Touch Systems	PDF
Untitled Abstract: No abstract text available Text: CY7C25632KV18 CY7C25652KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features • JTAG 1149.1 compatible test access port ■	Original	CY7C25632KV18 CY7C25652KV18 72-Mbit	PDF
CY7C25632 Abstract: 3M Touch Systems Text: CY7C25632KV18 CY7C25652KV18 72-Mbit QDR II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR®II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features • ■ Separate independent read and write data ports	Original	CY7C25632KV18 CY7C25652KV18 72-Mbit CY7C25632 3M Touch Systems	PDF
Untitled Abstract: No abstract text available Text: CY7C25632KV18 CY7C25652KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture 2.5 Cycle Read Latency with ODT 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features • JTAG 1149.1 compatible test access port ■	Original	CY7C25632KV18 CY7C25652KV18 72-Mbit	PDF