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    Text: D E I MITSUBISHI íDGTL LOGIC} TI ^ 2 ^ 0 2 7 1 G D lE lñ b |~ “ MITSUBISHI ASTTLs M74AS32P ,*o O 7-Y3-.SQUADRUPLE 2-INPUT POSITIVE OR GATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M74AS32P is a semiconductor integrated circuit consisting of tour 2-input positive-logic OR gates, us­


    OCR Scan     		PDF M74AS32P M74AS32P DD1S17J 20-PIN 24P4D 24-PIN