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    M74HC11 Price and Stock

    STMicroelectronics M74HC11B1R

    IC GATE AND 3CH 3-INP 14DIP
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    DigiKey M74HC11B1R Tube 5,000
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    STMicroelectronics M74HC11TTR

    IC GATE AND 3CH 3-INP 14TSSOP
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    DigiKey M74HC11TTR Reel 5,000
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    STMicroelectronics M74HC112B1R

    IC FF JK TYPE DUAL 1BIT 16DIP
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    DigiKey M74HC112B1R Tube 3,000
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    STMicroelectronics M74HC11RM13TR

    IC GATE AND 3CH 3-INP 14SO
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    DigiKey M74HC11RM13TR Reel 7,500
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    M74HC11RM13TR Cut Tape 1
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    STMicroelectronics M74HC112RM13TR

    IC FF JK TYPE DUAL 1BIT 16SOP
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    DigiKey M74HC112RM13TR Cut Tape 1
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    M74HC112RM13TR Reel 5,000
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    M74HC112RM13TR Digi-Reel 1
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    Bristol Electronics M74HC112RM13TR 1,288
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    Quest Components M74HC112RM13TR 921
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    ComSIT USA M74HC112RM13TR 2,727
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    Find more M74HC11 price and stock on Findchips.com

    M74HC11 Datasheets (59)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    M74HC11 STMicroelectronics Triple 3-Input AND Gate Original PDF
    M74HC112 STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112 STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112 STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112B1 SGS-Thomson DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    M74HC112B1N STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    M74HC112B1R STMicroelectronics Dual J-K Flip Flop with Preset and Clear Original PDF
    M74HC112B1R STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112C1 SGS-Thomson DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    M74HC112C1 STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    M74HC112C1R STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112F1 SGS-Thomson DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    M74HC112F1 STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    M74HC112M1 STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Scan PDF
    M74HC112M1R STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112M1R STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112P Mitsubishi Dual J-K Flip-Flop with Set and Reset Original PDF
    M74HC112RM13TR STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112RM13TR STMicroelectronics DUAL J-K FLIP FLOP WITH PRESET AND CLEAR Original PDF
    M74HC112TTR STMicroelectronics Dual J-K Flip Flop with Preset and Clear Original PDF

    M74HC11 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    M74HC11

    Abstract: M74HC11B1R M74HC11M1R M74HC11RM13TR M74HC11TTR TSSOP14
    Text: M74HC11 TRIPLE 3-INPUT AND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 9ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC11 M74HC11 M74HC11B1R M74HC11M1R M74HC11RM13TR M74HC11TTR TSSOP14

    8 pin dip j k flipflop ic

    Abstract: M74HC113 M74HC113B1R M74HC113M1R M74HC113RM13TR M74HC113TTR TSSOP14 jk flip flop
    Text: M74HC113 DUAL J-K FLIP FLOP WITH PRESET • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 79MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC113 79MHz M74HC113 8 pin dip j k flipflop ic M74HC113B1R M74HC113M1R M74HC113RM13TR M74HC113TTR TSSOP14 jk flip flop

    M74HC11

    Abstract: M74HC11B1R M74HC11M1R M74HC11RM13TR M74HC11TTR TSSOP14
    Text: M74HC11 TRIPLE 3-INPUT AND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 9ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC11 M74HC11 M74HC11Bts M74HC11B1R M74HC11M1R M74HC11RM13TR M74HC11TTR TSSOP14

    PO13H

    Abstract: TSSOP16 M74HC112 M74HC112B1R M74HC112M1R M74HC112RM13TR M74HC112TTR
    Text: M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 79MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF M74HC112 79MHz M74HC112 PO13H TSSOP16 M74HC112B1R M74HC112M1R M74HC112RM13TR M74HC112TTR

    M74HC113

    Abstract: M74HC113B1R M74HC113M1R M74HC113RM13TR M74HC113TTR TSSOP14 8 pin dip j k flipflop ic
    Text: M74HC113 DUAL J-K FLIP FLOP WITH PRESET • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 79MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC113 79MHz M74HC113 M74HC113B1R M74HC113M1R M74HC113RM13TR M74HC113TTR TSSOP14 8 pin dip j k flipflop ic

    M74HC11

    Abstract: M74HC11B1R M74HC11M1R M74HC11RM13TR M74HC11TTR TSSOP14
    Text: M74HC11 TRIPLE 3-INPUT AND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 9ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC11 M74HC11 M74HC11Bent M74HC11B1R M74HC11M1R M74HC11RM13TR M74HC11TTR TSSOP14

    T flip flop IC

    Abstract: JK flip flop IC diagram M74HC112 M74HC112B1R M74HC112M1R M74HC112RM13TR M74HC112TTR PO13H TSSOP16
    Text: M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 79MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF M74HC112 79MHz M74HC112 T flip flop IC JK flip flop IC diagram M74HC112B1R M74HC112M1R M74HC112RM13TR M74HC112TTR PO13H TSSOP16

    74hc113

    Abstract: T flip flop IC Toggle flip flop IC "J-K Flip flop" LS113 M74HC113B1R M74HC113C1R M74HC113M1R M54HC113 M54HC113F1R
    Text: M54HC113 M74HC113 DUAL J-K FLIP FLOP WITH PRESET . . . . . . . . HIGH SPEED fMAX = 71 MHz TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC113 M74HC113 54/74LS113 M54HC113F1R M74HC113M1R M74HC113B1R M74HC113C1R M54/74HC113 74hc113 T flip flop IC Toggle flip flop IC "J-K Flip flop" LS113 M74HC113B1R M74HC113C1R M74HC113M1R M54HC113 M54HC113F1R

    74LS11 pin configuration

    Abstract: M74HC11P 74LS11 IC pin configuration M74HC11 74LS11 circuit diagram with voltage 4000B 74LS11 M74HC11DP Mitsubishi 74LS11 CMOS 74LS11
    Text: M I T S U B I S H I HIGH S P E E D C M O S M 74H C11P M 74H C11D P T R I P L E 3 -IN P U T P O S I T I V E AND G A T E DESCRIPTION PIN T he M74HC11 is a sem iconductor integrated circuit con­ CONFIGURATION TOP VIEW sisting of th re e 3-in put po sitiv e -lo g ic AND, usable as ne ga­


    OCR Scan     		PDF M74HC11P M74HC11DP M74HC11 74LS11 pin configuration 74LS11 IC pin configuration 74LS11 circuit diagram with voltage 4000B 74LS11 M74HC11DP Mitsubishi 74LS11 CMOS 74LS11

    74hc112

    Abstract: No abstract text available
    Text: M54HC112 M74HC112 SCSTHOMSON m DUAL J-K FLIP FLOP WITH PRESET AND CLEAR a HIGH SPEED fMAX = 59 MHz Typ. at VCC= 5V LOW POWER DISSIPATION lCC = 2 (iA at Ta = 25°C • HIGH NOISE IMMUNITY VNIH = VNIL= 28% Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS


    OCR Scan     		PDF M54HC112 M74HC112 54/74LS112 M54/74HC112 M54HC112/M74HCis M54/74HC112 74hc112

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI HIGH SPEED CMOS M74HC113P/FP/DP DUAL I -K F L IP -F L O P WITH S E T DESCRIPTION T he M 7 4 H C 1 1 3 is a sem ico n d u cto r integrated circu it co n ­ PIN CON FIGURATIO N TOP VIEW sistin g of of tw o n e g a tiv e -e d g e trig g ered J - K flip flops with


    OCR Scan     		PDF M74HC113P/FP/DP 14P2P G--06

    or gate thruth table

    Abstract: No abstract text available
    Text: M54HC113 M74HC113 Æ 7 SCS-THOM SON ^ 7 # R if lQ ^ Q i[ L [ l( g ir [S @ M D ( g i DUAL J-K FLIP FLOP WITH PRESET • HIGH SPEED fMAX= 64 MHz (Typ.) at V c c = 5 V LOW POWER DISSIPATION ICC = 2 at TA = 25° C ■ HIGH NOISE IMMUNITY VniH = V n il= 28% VCc (MIN.)


    OCR Scan     		PDF M54HC113 M74HC113 54/74LS113 M74HC113 M74HC113B1N 54/7AHC113 or gate thruth table

    74HC112

    Abstract: No abstract text available
    Text: MI TSUBI SHI HIGH S P E E D C M OS M74HC112P DUAL l - K F L I P - F L O P WI TH S E T AND R E S E T DESCRIPTION The M 74H C 112 is a sem iconductor inte grated c ircu it con­ PIN CONFIGURATION TOP VIEW sisting of tw o n e g a tiv e -e d g e trig g e re d J -K flip flops with in­


    OCR Scan     		PDF M74HC112P 74HC112

    Untitled

    Abstract: No abstract text available
    Text: M ITSUBISHI HIGH S P E E D CM O S M74HC11P M74HC11DP T R IP L E 3 -IN P U T P O S IT IV E AND GATE DESCRIPTION The M74HC11 is a sem iconductor inte grated c ircu it con­ PIN CONFIGURATION TOP VIEW sisting of th re e 3-in put po s itiv e -lo g ic AND, usable as ne ga­


    OCR Scan     		PDF M74HC11P M74HC11DP M74HC11

    54HC11

    Abstract: No abstract text available
    Text: S G S -T H O M S O N M54HCi R ffl0» [iyiM !0 gi M74HC11 i TRIPLE 3-INPUT AND GATE • HIG HSPEED tpD = 7 ns (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 |iA (MAX.) A T T a = 25°C ■ HIGH NOISE IMMUNITY V nih = V n il = 28 % V cc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF M54HCi M74HC11 54/74LS11 54HC11F1R M54/74HC11 54HC11

    74hc113

    Abstract: or gate thruth table 54HC 74HC M54HC113 M74HC113
    Text: Æ 7 SGS-THOMSON Ä 7# M54HC113 M74HC113 [ M lO g ^ [ i[ L [ l( g ,F [ ^ © l i O ( g S DUAL j - k f l ip f l o p w it h p r e s e t • HIGH SPEED fMAX= 64 MHz (Typ. at V q c = 5V LOW POWER DISSIPATION Ic e = 2 iiA at Ta = 2 5 °C i HIGH NOISE IM M U N ITY


    OCR Scan     		PDF M54HC113 M74HC113 54/74LS M54/74HC113 M54/74HC113 74hc113 or gate thruth table 54HC 74HC M74HC113

    74LS11 circuit diagram with voltage

    Abstract: 74hc11
    Text: M54HC11 M74HC11 SGS-THOMSON TRIPLE 3-INPUT AND GATE HIGH SPEED tPD = 10 ns TYP. at VCc = 5V LOW POWER DISSIPATION Ice = 1 (MAX.) at Ta = 25°C HIGH NOISE IMMUNITY = 28% V cc (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS V N IH = V N IL SYMMETRICAL OUTPUT IMPEDANCE


    OCR Scan     		PDF M54HC11 M74HC11 54/74LS11 M74HC11 M54/74HC11 74LS11 circuit diagram with voltage 74hc11

    74HC112 pin diagram

    Abstract: 74ls112 function table 74HC112
    Text: M54HC112 M74HC112 SGS-THOMSON G L ì[LI TF[^ 5 RQ0© i DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX= 59 MHz (Typ.) at VCC= 5V LOW POWER DISSIPATION Icc = 2 at TA = 25°C ■ HIGH NOISE IMMUNITY V nih = V Nil = 28% Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF M54HC112 M74HC112 M74HC112 54/74LS112 M54/74HC112 M54/74HC112 74HC112 pin diagram 74ls112 function table 74HC112

    54HC

    Abstract: 74HC C113 M54HC113 M74HC113 74HC113
    Text: H S-CM O S INTEGRATED ¿ \\° \ CIRCUITS M54HC113 M74HC113. 4 P R E L IM IN A R Y D A T A DUAL J-K FLIP FLOP WITH PRESET DESCRIPTION T h e M 5 4 /7 4 H C 1 13 is a hig h s p e e d C M O S D U A L J-K FLIP FLO P W ITH P R E S E T fa b ric a te d in silicon


    OCR Scan     		PDF M54HC113 M74HC113. M54/74HC113 54HC 74HC C113 M54HC113 M74HC113 74HC113

    Untitled

    Abstract: No abstract text available
    Text: M54HC11 M74HC11 A 7# Rii]D g^(Q ILi Tr[E(Q)lR!]0©i Æ 7 S G S - T H O M S O N TRIPLE 3-INPUT AND GATE • HIGH SPEED tpo = 10 ns (TYP.) at V c c = 5V ■ LOW POWER DISSIPATION Ice = 1 /*A (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V nih = V n il = 2 °/° ^CC (MIN.)


    OCR Scan     		PDF M54HC11 M74HC11 54/74LS11 M54HC11 M74HC11 M74HC

    RS flip flop IC

    Abstract: RS flip flop cmos Toggle flip flop IC 4000B 74LS114 M74HC114P JK flip flop IC "J-K Flip flops"
    Text: M IT S U B IS H I HIGH S P E E D C M O S M74HC114P D U A L l- K F L IP -F L O P W IT H S E T AND C O M M O N R E S E T DESCRIPTION The M 74H C 114 is a sem iconductor integrated circu it con­ PIN CONFIGURATION TOP VIEW sisting of tw o n e g a tiv e -e d g e trig g e re d J-K flip flops with in­


    OCR Scan     		PDF M74HC114P M74HC114 50MHz RS flip flop IC RS flip flop cmos Toggle flip flop IC 4000B 74LS114 M74HC114P JK flip flop IC "J-K Flip flops"

    RS flip flop cmos

    Abstract: 74ls112 pin configuration FLIP FLOP RS 74ls112 pin diagram RS flip flop 74ls112 function table T flip flop IC 4000B 74LS112 M74HC112
    Text: MI TSUBI SHI HIGH S P E E D C M OS M74HC112P DUAL i - K F L I P - F L O P WI TH S E T AND R E S E T DESCRIPTION The M 74H C 112 is a sem iconductor inte grated circuit con­ PIN CONFIGURATION TOP VIEW sisting of tw o n e g a tiv e -e d g e trig g e re d J -K flip flops with in­


    OCR Scan     		PDF M74HC112P M74HC112 50MHz RS flip flop cmos 74ls112 pin configuration FLIP FLOP RS 74ls112 pin diagram RS flip flop 74ls112 function table T flip flop IC 4000B 74LS112

    54HC

    Abstract: 74HC M54HC11 M74HC11 74HC 84 B1-M74HC11
    Text: HS-CMOS M54HC11 M74HC11 INTEGRATED CIRCUITS o PRELIMINARY DATA TRIPLE 3-INPUT AND GATE D ES C R IPTIO N The M54/74HC11 is a high speed C M O S T R IP L E 3-INPUT AND G A T E fabricated in silicon gate C 2M O S technology. It has the same high speed performance of L S T T L combined with true C M O S


    OCR Scan     		PDF M54HC11 M74HC11 M54/74HC11 M54HC11 M74HC11 B1-M74HC11 54HC 74HC 74HC 84

    Untitled

    Abstract: No abstract text available
    Text: M IT S U B IS H I HIGH SPEED CMOS M74HC114P DUAL l-K F L IP -F L O P W IT H S E T AND COMMON R ESET DESCRIPTION The M 74H C 114 is a sem iconductor integrated circu it con­ PIN CONFIGURATION TOP VIEW sisting of tw o n e g a tiv e -e d g e trig g e re d J -K flip flops with in­


    OCR Scan     		PDF M74HC114P