PCK953 Search Results
PCK953 Price and Stock
NXP Semiconductors PCK953BD-G,128IC PLL CLOCK DRIVER 32LQFP |
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PCK953BD-G,128 | Reel |
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PCK953 Datasheets (19)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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PCK953 |
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Memory interfaces; Support logic for memory modules and other memory subsystems | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953 |
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PCK953 50-125 MHz PECL input-9 CMOS output 3.3 V PLL clock driver | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953B |
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50-125 MHz PECL input/9 CMOS output 3.3 V PLL clock driver | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD |
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20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD |
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50-125 MHz PECL input/9 CMOS output 3.3 V PLL clock driver | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD |
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20-125 MHz PECL Input/9 CMOS Output 3.3 V PLL Clock Driver | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD/01,118 |
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Reel Pack, SMD, 13" | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD/01,128 |
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Reel Pack, SMD, 13", Turned | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD/01,151 |
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Tray Pack, Bakeable, Single | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD/01,157 |
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Tray Pack, Bakeable, Multiple | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD,118 |
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13" | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD,128 |
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13", Turned | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD,151 |
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Tray Pack, Bakeable, Single | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD,157 |
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Tray Pack, Bakeable, Multiple | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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PCK953BD/G |
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20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD/G,128 |
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20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13", Turned | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD/G-F |
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD-T |
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V | Original | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
PCK953BD-T |
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20-125 MHz PECL input / 9 CMOS output 3.3 V PLL clock driver | Original |
PCK953 Datasheets Context Search
Catalog Datasheet | MFG & Type | Document Tags | |
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LQFP32
Abstract: PCK953 PCK953BD
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PCK953 PCK953 LQFP32 PCK953BD | |
9352 679 41157
Abstract: LQFP32 footprint LQFP32 MS-026 PCK953 PCK953BD SOT358-1
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PCK953 PCK953 9352 679 41157 LQFP32 footprint LQFP32 MS-026 PCK953BD SOT358-1 | |
SW00624
Abstract: No abstract text available
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PCK953 PCK953 SW00624 | |
LQFP32
Abstract: PCK953 PCK953BD
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PCK953 ICL03 PCK953 LQFP32 PCK953BD | |
Untitled
Abstract: No abstract text available
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PCK953 PCK953 | |
PCK953
Abstract: LQFP32 PCK953BD
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PCK953 PCK953 LQFP32 PCK953BD | |
SC28L198
Abstract: SCC2691AC1A28 LCD 09151 CSOT109 PCA9552 PCK2002 PCF8591 APPLICATION pecl clock so8 PCA9550 PCA9553
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schematic diagram atx Power supply 500w
Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
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P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS | |
DDR2 SSTL class
Abstract: SSTL_18 DDR1-400 DDR2 SDRAM with SSTL_18 interface TVSOP-48 SSTL-18 PCK2059 SSTV16857 DDR200 hp SSTU32866
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PC100 PC133 PCK2509 PCK2510 DDR200 DDR266 DDR333 DDR400 PCKVF857 DDR2-400 DDR2 SSTL class SSTL_18 DDR1-400 DDR2 SDRAM with SSTL_18 interface TVSOP-48 SSTL-18 PCK2059 SSTV16857 hp SSTU32866 | |
BUK2114
Abstract: BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52
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1N4148 1N4531 1N47xxA 1PS10SB62 1PS10SB63 1PS10SB82 1PS181 1PS184 1PS193 1PS226 BUK2114 BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52 | |
74ALVCHS162830
Abstract: No abstract text available
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74ALVCHS162830 18-bit 36-bit 74ALVCHS162830 JESD22. | |
74ALVCHS162830
Abstract: 2Y16
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74ALVCHS162830 18-bit 36-bit ICL03 JESD22. JESD78, 74ALVCHS162830 2Y16 | |
220v AC voltage stabilizer schematic diagram
Abstract: LG color tv Circuit Diagram tda 9370 1000w inverter PURE SINE WAVE schematic diagram schematic diagram atx Power supply 500w TV SHARP IC TDA 9381 PS circuit diagram wireless spy camera 9744 mini mainboard v1.2 sony 279-87 transistor E 13005-2 superpro lx
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AD9272 P462-ND LNG295LFCP2U P463-ND LNG395MFTP5U 220v AC voltage stabilizer schematic diagram LG color tv Circuit Diagram tda 9370 1000w inverter PURE SINE WAVE schematic diagram schematic diagram atx Power supply 500w TV SHARP IC TDA 9381 PS circuit diagram wireless spy camera 9744 mini mainboard v1.2 sony 279-87 transistor E 13005-2 superpro lx | |
Untitled
Abstract: No abstract text available
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74ALVCHS16830 18-bit 36-bit ICL03 74ALVCHS16830 JESD22. | |
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74ALVCHS16830
Abstract: A114 JESD22
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74ALVCHS16830 18-bit 36-bit ICL03 JESD22. PCK953 74ALVCHS16830 A114 JESD22 |