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    SN54LV04A Search Results

    SN54LV04A Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN54LV04A Texas Instruments HEX INVERTERS Original PDF
    SN54LV04A Texas Instruments HEX INVERTERS Original PDF
    SN54LV04AFK Texas Instruments HEX INVERTERS Original PDF
    SN54LV04AFK Texas Instruments HEX INVERTER Original PDF
    SN54LV04AJ Texas Instruments HEX INVERTERS Original PDF
    SN54LV04AJ Texas Instruments HEX INVERTER Original PDF
    SN54LV04AW Texas Instruments HEX INVERTER Original PDF
    SN54LV04AW Texas Instruments HEX INVERTERS Original PDF

    SN54LV04A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 2A 2Y 3A 3Y 14 1Y 1A NC


    Original     		PDF SN54LV04A, SN74LV04A SCLS388G 000-V A114-A) A115-A) SN54LV04A

    LV04A

    Abstract: 74lv04a
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388E – SEPTEMBER 1997 – REVISED AUGUST 2002 SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC


    Original     		PDF SN54LV04A, SN74LV04A SCLS388E 000-V A114-A) A115-A) SN54LV04A LV04A 74lv04a

    A115-A

    Abstract: C101 LV04A SN54LV04A SN74LV04A
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J SN54LV04A A115-A C101 LV04A SN54LV04A SN74LV04A

    LV04A

    Abstract: SN54LV04A SN74LV04A
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388B – SEPTEMBER 1997 – REVISED JUNE 1998 D D D D D EPIC Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25°C


    Original     		PDF SN54LV04A, SN74LV04A SCLS388B MIL-STD-883, SN54LV04A LV04A SN54LV04A SN74LV04A

    LV04A

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J 000-V A114-A) A115-A) SN54LV04A LV04A

    A115-A

    Abstract: C101 LV04A SN54LV04A SN74LV04A
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J SN54LV04A A115-A C101 LV04A SN54LV04A SN74LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388B – SEPTEMBER 1997 – REVISED JUNE 1998 D EPIC Enhanced-Performance Implanted D D D D CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25°C


    Original     		PDF SN54LV04A, SN74LV04A SCLS388B MIL-STD-883, SN54LV04A SN74LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J SN54LV04A

    A115-A

    Abstract: C101 LV04A SN54LV04A SN74LV04A
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 2A 2Y 3A 3Y 14 1Y 1A NC


    Original     		PDF SN54LV04A, SN74LV04A SCLS388G SN54LV04A A115-A C101 LV04A SN54LV04A SN74LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J 000-V A114-A) A115-A) SN54LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J SN54LV04A

    LV04A

    Abstract: SN54LV04A SN74LV04A
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388C – SEPTEMBER 1997 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV04A, SN74LV04A SCLS388C MIL-STD-883, LV04A SN54LV04A SN74LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J 000-V A114-A) A115-A) SN54LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D Support Mixed-Mode Voltage Operation on D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per SN54LV04A . . . J OR W PACKAGE


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J SN54LV04A

    lv04a

    Abstract: A115-A C101 SN54LV04A SN74LV04A
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388D – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV04A, SN74LV04A SCLS388D SN54LV04A 000-V A114-A) A115-A) SN54ion lv04a A115-A C101 SN54LV04A SN74LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J 000-V A114-A) A115-A) SN54LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J SN54LV04A

    LV04A

    Abstract: A115-A C101 SN54LV04A SN74LV04A CA 6Y Marking
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388D – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV04A, SN74LV04A SCLS388D SN54LV04A 000-V A114-A) A115-A) SN54tion LV04A A115-A C101 SN54LV04A SN74LV04A CA 6Y Marking

    A115-A

    Abstract: C101 LV04A SN54LV04A SN74LV04A 74LV04A
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J SN54LV04A A115-A C101 LV04A SN54LV04A SN74LV04A 74LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388E – SEPTEMBER 1997 – REVISED AUGUST 2002 SN54LV04A . . . J OR W PACKAGE SN74LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 Support Mixed-Mode Voltage Operation on All Ports


    Original     		PDF SN54LV04A, SN74LV04A SCLS388E 000-V A114-A) A115-A) SN54LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J 000-V A114-A) A115-A) SN54LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3


    Original     		PDF SN54LV04A, SN74LV04A SCLS388J 000-V A114-A) A115-A) SN54LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS SCLS388A - SEPTEMBER 1997 - REVISED APRIL 1998 • • • • SN54LV04A . . . J OR W PACKAGE SN74LV04A . . D, DB, NS, OR PW PACKAGE TOP VIEW CMOS) Process Typical Vqlp (Output Ground Bounce) <0.8 Va tV cc,TA = 25°C Typical Vqhv (Output Vqh Undershoot)


    OCR Scan     		PDF SN54LV04A, SN74LV04A SCLS388A MIL-STD-883, 300-mil SN54LV04A SN74LV04A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV04A, SN74LV04A HEX INVERTERS S C L S 3 8 8 B -S E P T E M B E R 1997 - R EVISED JU NE 1998 • • EP/C Enhanced-Performance Implanted CMOS Process SN54LV04A. . . j o r w SN 74LV04A . . . d , d b , d g v , n s , (TOP VIEW) Typical V q lp (Output Ground Bounce)


    OCR Scan     		PDF SN54LV04A, SN74LV04A MIL-STD-883, SN54LV04A. 74LV04A