SN74LVC112 Search Results

SN74LVC112 Result Highlights (5)

Part	Manufacturer	Description
SN74LVC112APW	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TSSOP -40 to 125
SN74LVC112AD	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SOIC -40 to 125
SN74LVC112ADR	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SOIC -40 to 125
SN74LVC112ANSR	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SO -40 to 125
SN74LVC112APWT	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TSSOP -40 to 125

SN74LVC112 Price and Stock

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Texas Instruments SN74LVC112ADR IC FF JK TYPE DUAL 1BIT 16SOIC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LVC112ADR	Cut Tape	2,484		1	1 $0.62 10 $0.441 100 $0.3447 1000 $0.29441 10000 $0.29441	Buy Now
	SN74LVC112ADR	Digi-Reel	2,484		1	1 $0.62 10 $0.441 100 $0.3447 1000 $0.29441 10000 $0.29441	Buy Now
Mouser Electronics	SN74LVC112ADR		7,153			1 $0.62 10 $0.394 100 $0.32 1000 $0.264 10000 $0.203	Buy Now
Verical	SN74LVC112ADR		23,984		1,560	1 - 10 - 100 - 1000 - 10000 $0.2405	Buy Now
	SN74LVC112ADR		20,000		1,560	1 - 10 - 100 - 1000 - 10000 $0.2405	Buy Now
	SN74LVC112ADR		5,000		1,560	1 - 10 - 100 - 1000 - 10000 $0.2405	Buy Now
	SN74LVC112ADR		2,500		1,560	1 - 10 - 100 - 1000 - 10000 $0.2405	Buy Now
Bristol Electronics	SN74LVC112ADR		2,088			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Quest Components	SN74LVC112ADR		9,500			1 $0.3669 10 $0.3669 100 $0.3669 1000 $0.3669 10000 $0.1345	Buy Now
	SN74LVC112ADR		1,670			1 $0.6115 10 $0.6115 100 $0.6115 1000 $0.2446 10000 $0.2446	Buy Now

Rochester Electronics	SN74LVC112ADR		125,422		1	1 $0.2264 10 $0.2264 100 $0.2128 1000 $0.1924 10000 $0.1924	Buy Now
Ameya Holding Limited	SN74LVC112ADR		55,513			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Texas Instruments SN74LVC112ANSR IC FF JK TYPE DUAL 1BIT 16SO
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LVC112ANSR	Reel	2,000		2,000	1 - 10 - 100 - 1000 - 10000 $0.27	Buy Now
	SN74LVC112ANSR	Cut Tape	2,000		1	1 $0.76 10 $0.54 100 $0.4251 1000 $0.36497 10000 $0.36497	Buy Now
	SN74LVC112ANSR	Digi-Reel	2,000		1	1 $0.76 10 $0.54 100 $0.4251 1000 $0.36497 10000 $0.36497	Buy Now
Mouser Electronics	SN74LVC112ANSR		1,698			1 $0.76 10 $0.486 100 $0.397 1000 $0.365 10000 $0.294	Buy Now
Bristol Electronics	SN74LVC112ANSR		1,757			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Quest Components	SN74LVC112ANSR		1,405			1 $0.98 10 $0.98 100 $0.98 1000 $0.392 10000 $0.392	Buy Now
Ameya Holding Limited	SN74LVC112ANSR		115,047			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Texas Instruments SN74LVC112ADBR IC FF JK TYPE DUAL 1BIT 16SSOP
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LVC112ADBR	Cut Tape	1,995		1	1 $0.68 10 $0.481 100 $0.3776 1000 $0.32327 10000 $0.32327	Buy Now
	SN74LVC112ADBR	Digi-Reel	1,995		1	1 $0.68 10 $0.481 100 $0.3776 1000 $0.32327 10000 $0.32327	Buy Now
Mouser Electronics	SN74LVC112ADBR					1 $0.68 10 $0.432 100 $0.352 1000 $0.324 10000 $0.27	Get Quote
Rochester Electronics	SN74LVC112ADBR		77,570		1	1 $0.3 10 $0.3 100 $0.282 1000 $0.255 10000 $0.255	Buy Now
Ameya Holding Limited	SN74LVC112ADBR		50,440			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Texas Instruments SN74LVC112APWT IC FF JK TYPE DUAL 1BIT 16TSSOP
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LVC112APWT	Digi-Reel	812		1	1 $1.16 10 $0.836 100 $0.6682 1000 $0.6682 10000 $0.6682	Buy Now
	SN74LVC112APWT	Cut Tape	812		1	1 $1.16 10 $0.836 100 $0.6682 1000 $0.6682 10000 $0.6682	Buy Now
	SN74LVC112APWT	Reel	750		250	1 - 10 - 100 - 1000 $0.62624 10000 $0.54101	Buy Now
Mouser Electronics	SN74LVC112APWT					1 $1.16 10 $0.757 100 $0.627 1000 $0.565 10000 $0.53	Get Quote
Rochester Electronics	SN74LVC112APWT		38,409		1	1 $0.55 10 $0.55 100 $0.517 1000 $0.4675 10000 $0.4675	Buy Now
Ameya Holding Limited	SN74LVC112APWT		23,880			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Win Source Electronics	SN74LVC112APWT		8,958			1 - 10 - 100 $0.8153 1000 $0.5436 10000 $0.5436	Buy Now
Texas Instruments SN74LVC112AD IC FF JK TYPE DUAL 1BIT 16SOIC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	SN74LVC112AD	Tube	627		1	1 $1.16 10 $0.836 100 $1.16 1000 $0.58004 10000 $0.54476	Buy Now
Mouser Electronics	SN74LVC112AD		950			1 $1.11 10 $0.723 100 $0.723 1000 $0.547 10000 $0.522	Buy Now
Verical	SN74LVC112AD		15,940		607	1 - 10 - 100 - 1000 $0.5844 10000 $0.5844	Buy Now
	SN74LVC112AD		3,457		607	1 - 10 - 100 - 1000 $0.5844 10000 $0.5844	Buy Now
	SN74LVC112AD		3,320		607	1 - 10 - 100 - 1000 $0.5844 10000 $0.5844	Buy Now
	SN74LVC112AD		1,760		607	1 - 10 - 100 - 1000 $0.5844 10000 $0.5844	Buy Now
	SN74LVC112AD		1,000		607	1 - 10 - 100 - 1000 $0.5844 10000 $0.5844	Buy Now
	SN74LVC112AD		878		607	1 - 10 - 100 - 1000 $0.6188 10000 $0.6188	Buy Now
Quest Components	SN74LVC112AD		20			1 $1.98 10 $1.584 100 $1.188 1000 $1.188 10000 $1.188	Buy Now
Rochester Electronics	SN74LVC112AD		26,715		1	1 $0.55 10 $0.55 100 $0.517 1000 $0.4675 10000 $0.4675	Buy Now

Ameya Holding Limited	SN74LVC112AD		5,086			1 - 10 - 100 - 1000 - 10000 -	Get Quote

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SN74LVC112 Datasheets (116)

Part	Manufacturer	Description	Datasheet Type	PDF
SN74LVC112A	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset	Original	PDF
SN74LVC112A	Texas Instruments	DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET	Original	PDF
SN74LVC112A	Texas Instruments	DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET	Original	PDF
SN74LVC112AD	Texas Instruments	SN74LVC112 - Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SOIC -40 to 85	Original	PDF
SN74LVC112AD	Texas Instruments	Logic - Flip Flops, Integrated Circuits (ICs), IC JK TYPE NEG TRG DUAL 16SOIC	Original	PDF
SN74LVC112AD	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SOIC -40 to 85	Original	PDF
SN74LVC112AD	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop with Clear and Preset	Original	PDF
SN74LVC112AD	Texas Instruments	DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET	Original	PDF
SN74LVC112ADB	Texas Instruments	DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET	Original	PDF
SN74LVC112ADBLE	Texas Instruments	SN74LVC112 - Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SSOP -40 to 85	Original	PDF
SN74LVC112ADBLE	Texas Instruments	DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET	Original	PDF
SN74LVC112ADBLE	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SSOP -40 to 85	Original	PDF
SN74LVC112ADBR	Texas Instruments	SN74LVC112 - Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SSOP -40 to 85	Original	PDF
SN74LVC112ADBR	Texas Instruments	Logic - Flip Flops, Integrated Circuits (ICs), IC JK TYPE NEG TRG DUAL 16SSOP	Original	PDF

SN74LVC112ADBR	Texas Instruments	DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET	Original	PDF
SN74LVC112ADBR	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SSOP -40 to 85	Original	PDF
SN74LVC112ADBR	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop with Clear and Preset	Original	PDF
SN74LVC112ADBRE4	Texas Instruments	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SSOP -40 to 85	Original	PDF
SN74LVC112ADBRE4	Texas Instruments	DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR and PRESET	Original	PDF
SN74LVC112ADBRE4	Texas Instruments	SN74LVC112 - Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-SSOP -40 to 85	Original	PDF

SN74LVC112 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A) SNS74LVC2G53 scyb014 scyb005 scym001	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
LCV112A Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289I – JANUARY 1993 – REVISED MARCH 2002 D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Inputs Accept Voltages to 5.5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN74LVC112A SCAS289I 000-V A114-A) A115-A) LCV112A	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
LC112A Abstract: LVC112A A115-A C101 SN74LVC112A SN74LVC112AD Text: SN74LVC112A DUAL NEGATIVEĆEDGEĆTRIGGERED JĆK FLIPĆFLOP WITH CLEAR AND PRESET SCAS289K − JANUARY 1993 − REVISED OCTOBER 2003 D D D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V	Original	SN74LVC112A SCAS289K 000-V A114-A) A115-A) LC112A LVC112A A115-A C101 SN74LVC112A SN74LVC112AD	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
A115-A Abstract: C101 SN74LVC112A SN74LVC112AD LC112 CPD14 Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A) A115-A C101 SN74LVC112A SN74LVC112AD LC112 CPD14	PDF
SN74LVC112A Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289H – JANUARY 1993 – REVISED JUNE 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN74LVC112A SCAS289H MIL-STD-883, SN74LVC112A	PDF
SN74LVC112A Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289B – JANUARY 1993 – REVISED SEPTEMBER 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C	Original	SN74LVC112A SCAS289B SN74LVC112A	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
A115-A Abstract: C101 SN74LVC112A SN74LVC112AD LC112A Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289K – JANUARY 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289K 000-V A114-A) A115-A) A115-A C101 SN74LVC112A SN74LVC112AD LC112A	PDF

SN74LVC112A Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289D – JANUARY 1993 – REVISED JANUARY 1997 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V	Original	SN74LVC112A SCAS289D MIL-STD-883, JESD-17 SN74LVC112A	PDF
A115-A Abstract: C101 SN74LVC112A SN74LVC112AD LC112A Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289J – JANUARY 1993 – REVISED AUGUST 2002 D D D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V	Original	SN74LVC112A SCAS289J 000-V A114-A) A115-A) A115-A C101 SN74LVC112A SN74LVC112AD LC112A	PDF
LC112A Abstract: A115-A C101 SN74LVC112A SN74LVC112AD Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A) LC112A A115-A C101 SN74LVC112A SN74LVC112AD	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V	Original	SN74LVC112A SCAS289L 000-V A114-A) A115-A)	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112 DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET _ SCAS28BA-JANUARY 1 9 9 3 - REVISED JULY 1995 EPIC Enhanced-Performance Implanted CMOS Submicron Process D, DB, OR PW PACKAGE (TOP VIEW) Typical V q l p (Output Ground Bounce)	OCR Scan	SN74LVC112 SCAS28BA-JANUARY	PDF
H723 Abstract: No abstract text available Text: SN74LVC112 DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289 - JANUARY 1993 - REVISED MARCH 1994 EPIC Enhanced-Performance Implanted CMOS S'übmicron Process Typical V q lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C	OCR Scan	SN74LVC112 SCAS289 -100MA IOH--12mA H723	PDF
SN74LVC112A Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET S C AS 289E - JA N U A R Y 1993 - R EVISED JA N U A R Y 1998 D EPIC Enhanced-Performance Implanted CMOS Submicron Process D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V	OCR Scan	SN74LVC112A SCAS289E MIL-STD-883, 10MHz, SN74LVC112A	PDF
Untitled Abstract: No abstract text available Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED Ü-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289E - JANUARY 1 9 9 3 - REVISED JANUARY 1996 • • • • "IToIfo R PACKAGE TOP VIEW EPICrM(Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per	OCR Scan	SN74LVC112A SCAS289E MIL-STD-883, JESD17	PDF
SM 7525 Abstract: 74LVC112 Text: SN74LVC112 DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET S C A S 2 8 9 -J A N U A R Y 1 9 9 3 - REVISED M ARCH 1994 , DB, OR PW PACKAGE TOP VIEW E P IC (Enhanced-Perform ance Implanted CM OS) Subm icron P rocess Typical V q l p (Output G round Bounce)	OCR Scan	SN74LVC112 11CLR SM 7525 74LVC112	PDF
SN74LVC112 Abstract: No abstract text available Text: SN74LVC112 DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET JANUARY 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch DB, DW, OR PW PACKAGE (TOP VIEW) • EPIC (Enhanced-Performance Implanted	OCR Scan	SN74LVC112 65-mm	PDF

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SN74LVC112 Search Results

SN74LVC112 Result Highlights (5)

SN74LVC112 Price and Stock

Texas Instruments SN74LVC112ADR

Texas Instruments SN74LVC112ANSR

Texas Instruments SN74LVC112ADBR

Texas Instruments SN74LVC112APWT

Texas Instruments SN74LVC112AD

SN74LVC112 Datasheets (116)

SN74LVC112 Datasheets Context Search

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LCV112A

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LC112A

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A115-A

SN74LVC112A

SN74LVC112A

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A115-A

SN74LVC112A

A115-A

LC112A

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H723

SN74LVC112A

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SM 7525

SN74LVC112