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    SSTUA32866 Search Results

    SSTUA32866 Result Highlights (4)

    Part ECAD Model Manufacturer Description Download Buy
    SSTUA32866BHLFT Renesas Electronics Corporation 25-Bit Configurable Registered Buffer for DDR2 Visit Renesas Electronics Corporation
    SSTUA32866BHLF Renesas Electronics Corporation 25-Bit Configurable Registered Buffer for DDR2 Visit Renesas Electronics Corporation
    74SSTUA32866BFG Renesas Electronics Corporation 1.8V Configurable Buffer with Address-Parity Test Visit Renesas Electronics Corporation
    74SSTUA32866BFG8 Renesas Electronics Corporation 1.8V Configurable Buffer with Address-Parity Test Visit Renesas Electronics Corporation

    SSTUA32866 Datasheets (16)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SSTUA32866 NXP Semiconductors Memory interfaces; Support logic for memory modules and other memory subsystems Original PDF
    SSTUA32866 Philips Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Original PDF
    SSTUA32866BHLF Integrated Circuit Systems Logic - Specialty Logic, Integrated Circuits (ICs), IC REGIST BUFFER 25BIT DDR 96BGA Original PDF
    SSTUA32866BHLFT Integrated Circuit Systems Logic - Specialty Logic, Integrated Circuits (ICs), IC REGIST BUFFER 25BIT DDR 96BGA Original PDF
    SSTUA32866EC NXP Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Original PDF
    SSTUA32866EC Philips Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Original PDF
    SSTUA32866EC,518 NXP Semiconductors SSTUA32866 - IC 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-536-1, LFBGA-96, FF/Latch Original PDF
    SSTUA32866EC,551 NXP Semiconductors SSTUA32866 - IC 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-536-1, LFBGA-96, FF/Latch Original PDF
    SSTUA32866EC,557 NXP Semiconductors SSTUA32866 - IC 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-536-1, LFBGA-96, FF/Latch Original PDF
    SSTUA32866EC/G NXP Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Original PDF
    SSTUA32866EC/G Philips Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Original PDF
    SSTUA32866EC-G Philips Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Original PDF
    SSTUA32866EC/G,518 NXP Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications; Package: SOT536-1 (LFBGA96); Container: Tape reel smd Original PDF
    SSTUA32866EC/G,551 NXP Semiconductors SSTUA32866 - IC 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96, FF/Latch Original PDF
    SSTUA32866EC/G,557 NXP Semiconductors SSTUA32866 - IC 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96, FF/Latch Original PDF
    SSTUA32866EC/G-T NXP Semiconductors 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Original PDF

    SSTUA32866 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    DDR2-667

    Abstract: Q11A SSTUA32866 SSTUA32866EC
    Text: SSTUA32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Rev. 01 — 15 July 2005 Product data sheet 1. General description The SSTUA32866 is a 1.8 V configurable register specifically designed for use on DDR2


    Original     		PDF SSTUA32866 25-bit 14-bit DDR2-667 SSTUA32866 Q11A SSTUA32866EC

    DDR2-667

    Abstract: Q11A SSTUA32866 SSTUA32866EC
    Text: SSTUA32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Rev. 02 — 26 March 2007 Product data sheet 1. General description The SSTUA32866 is a 1.8 V configurable register specifically designed for use on DDR2


    Original     		PDF SSTUA32866 25-bit 14-bit DDR2-667 SSTUA32866 Q11A SSTUA32866EC

    DDR2-667

    Abstract: SSTUA32864 SSTUA32866 SSTUA32S865 TFBGA160
    Text: SSTUA32S865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications Rev. 02 — 16 March 2007 Product data sheet 1. General description The SSTUA32S865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory


    Original     		PDF SSTUA32S865 28-bit DDR2-667 SSTUA32S865 14-bit DDR2-667 SSTUA32864 SSTUA32866 TFBGA160

    SSTUA32864

    Abstract: SSTUA32866
    Text: SSTUG32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications Rev. 01 — 23 April 2007 Product data sheet 1. General description The SSTUG32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank


    Original     		PDF SSTUG32868 28-bit SSTUG32868 14-bit SSTUA32864 SSTUA32866

    DDR2-800

    Abstract: SSTUA32864 SSTUA32866 E6G3
    Text: SSTUM32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 02 — 2 March 2007 Product data sheet 1. General description The SSTUM32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank


    Original     		PDF SSTUM32868 28-bit DDR2-800 SSTUM32868 14-bit SSTUA32864 SSTUA32866 E6G3

    DDR2-400

    Abstract: DDR2-533 DDR2-667 EBE20RE4ABFA EBE20RE4ABFA-4A-E EBE20RE4ABFA-5C-E EBE20RE4ABFA-6E-E CS 3820
    Text: PRELIMINARY DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE20RE4ABFA 256M words x 72 bits, 1 Rank Specifications Features • Density: 2GB • Organization  256M words × 72 bits, 1 rank • Mounting 18 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE20RE4ABFA 240-pin 667Mbps/533Mbps/400Mbps cycles/64ms M01E0107 E0873E30 DDR2-400 DDR2-533 DDR2-667 EBE20RE4ABFA EBE20RE4ABFA-4A-E EBE20RE4ABFA-5C-E EBE20RE4ABFA-6E-E CS 3820

    EBE10AD4AGFA-6E-E

    Abstract: DDR2-400 DDR2-533 DDR2-667 EBE10AD4AGFA EBE10AD4AGFA-4A-E EBE10AD4AGFA-5C-E E0865E11
    Text: PRELIMINARY DATA SHEET 1GB Registered DDR2 SDRAM DIMM EBE10AD4AGFA 128M words x 72 bits, 1 Rank Specifications Features • Density: 1GB • Organization  128M words × 72 bits, 1 rank • Mounting 18 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE10AD4AGFA 240-pin 667Mbps/533Mbps/400Mbps cycles/64ms M01E0107 E0865E11 EBE10AD4AGFA-6E-E DDR2-400 DDR2-533 DDR2-667 EBE10AD4AGFA EBE10AD4AGFA-4A-E EBE10AD4AGFA-5C-E E0865E11

    ICS98ULPA877A

    Abstract: 2506036017Y0 MO-205 410mH
    Text: ICS98ULPA877A Advance Information Integrated Circuit Systems, Inc. 1.8V Low-Power Wide-Range Frequency Clock Driver Recommended Application: • DDR2 Memory Modules / Zero Delay Board Fan Out • Provides complete DDR DIMM logic solution with ICSSSTU32864/SSTUF32864/SSTUF32866/


    Original     		PDF ICS98ULPA877A ICSSSTU32864/SSTUF32864/SSTUF32866/ SSTUA32864/SSTUA32866/SSTUA32S868/ SSTUA32S865/SSTUA32S869 52-Ball ICS98ULPA877AK ICS98ULPA877A 2506036017Y0 MO-205 410mH

    DDR2-667

    Abstract: EBE21RD4AEFA EDE5104AESK-6E-E
    Text: DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21RD4AEFA-6 256M words x 72 bits, 2 Ranks Features The EBE21RD4AEFA is a 256M words × 72 bits, 2 ranks DDR2 SDRAM Module, mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA package. Read and write operations are performed at the cross


    Original     		PDF EBE21RD4AEFA-6 EBE21RD4AEFA M01E0107 E0739E11 DDR2-667 EDE5104AESK-6E-E

    Untitled

    Abstract: No abstract text available
    Text: SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 04 — 22 April 2010 Product data sheet 1. General description The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank


    Original     		PDF SSTUB32868 28-bit DDR2-800 SSTUB32868 14-bit

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21RD4AEFA-6 256M words x 72 bits, 2 Ranks Description Features The EBE21RD4AEFA is a 256M words × 72 bits, 2 ranks DDR2 SDRAM Module, mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA (µBGA) package. Read and write operations are performed at


    Original     		PDF EBE21RD4AEFA-6 EBE21RD4AEFA M01E0107 E0739E10

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    INSSTE32882

    Abstract: maxim dallas 2501 P16CV SY100EL16 SN65MLVD201 SN65EPT22 INCU877 INCUA877 ttl crystal oscillator using 7404 P16CV857B
    Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: ICS97ULPA877A Integrated Circuit Systems, Inc. 1.8V Low-Power Wide-Range Frequency Clock Driver Recommended Application: • DDR2 Memory Modules / Zero Delay Board Fan Out • Provides complete DDR DIMM logic solution with ICSSSTU32864/SSTUF32864/SSTUF32866/


    Original     		PDF ICS97ULPA877A ICSSSTU32864/SSTUF32864/SSTUF32866/ SSTUA32864/SSTUA32866/SSTUA32S868/ SSTUA32S865/SSTUA32S869 52-Ball ICS97ULPA877AK 1088Bâ

    DDR2-800

    Abstract: SSTUA32866 SSTUB32866 ic PRESSURE SENSOR
    Text: SSTUP32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity and programmable output for DDR2-800 RDIMMs Rev. 02 — 14 September 2006 Product data sheet 1. General description The SSTUP32866 is a 1.8 V configurable register specifically designed for use on DDR2


    Original     		PDF SSTUP32866 25-bit 14-bit DDR2-800 SSTUP32866 SSTUA32866 SSTUB32866 ic PRESSURE SENSOR

    DDR2 SSTL class

    Abstract: SSTL_18 DDR1-400 DDR2 SDRAM with SSTL_18 interface TVSOP-48 SSTL-18 PCK2059 SSTV16857 DDR200 hp SSTU32866
    Text: Memory interfaces Support logic for memory modules and other memory subsystems Portfolio overview PC100 to PC133 • AVC, ALVC, AVCM, and ALVCH series registered drivers • PCK2509 and PCK2510 series PLL clock buffers DDR200 to DDR266 • SSTV and SSTL series registered drivers


    Original     		PDF PC100 PC133 PCK2509 PCK2510 DDR200 DDR266 DDR333 DDR400 PCKVF857 DDR2-400 DDR2 SSTL class SSTL_18 DDR1-400 DDR2 SDRAM with SSTL_18 interface TVSOP-48 SSTL-18 PCK2059 SSTV16857 hp SSTU32866

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21RD4AGFA 256M words x 72 bits, 2 Ranks Description Features The EBE21RD4AGFA is a 256M words × 72 bits, 2 ranks DDR2 SDRAM Module, mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA (µBGA)


    Original     		PDF EBE21RD4AGFA EBE21RD4AGFA M01E0107 E0794E10

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21AD4AGFA 256M words x 72 bits, 2 Ranks Specifications Features • Density: 2GB • Organization  256M words × 72 bits, 2 ranks • Mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA (µBGA)


    Original     		PDF EBE21AD4AGFA 240-pin 667Mbps/533Mbps/400Mbps cycles/64ms M01E0107 E0866E10

    DDR2-667

    Abstract: EBE20AE4ABFA EBE20AE4ABFA-6E-E
    Text: DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE20AE4ABFA 256M words x 72 bits, 1 Rank Specifications Features • Density: 2GB • Organization  256M words × 72 bits, 1 rank • Mounting 18 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE20AE4ABFA 240-pin 667Mbps cycles/64ms M01E0706 E0875E30 DDR2-667 EBE20AE4ABFA EBE20AE4ABFA-6E-E

    EBE51RD8AGFA

    Abstract: EBE51RD8AGFA-4A-E EBE51RD8AGFA-5C-E EBE51RD8AGFA-6E-E DDR2-400 DDR2-533 DDR2-667 E0793E31
    Text: DATA SHEET 512MB Registered DDR2 SDRAM DIMM EBE51RD8AGFA 64M words x 72 bits, 1 Rank Specifications Features • Density: 512MB • Organization  64M words × 72 bits, 1 rank • Mounting 9 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF 512MB EBE51RD8AGFA 512MB 240-pin 667Mbps/533Mbps/400Mbps cycles/64ms M01E0107 E0793E31 EBE51RD8AGFA EBE51RD8AGFA-4A-E EBE51RD8AGFA-5C-E EBE51RD8AGFA-6E-E DDR2-400 DDR2-533 DDR2-667 E0793E31

    Q22x

    Abstract: Q5A H7
    Text: SSTUM32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 01 — 12 September 2006 Product data sheet 1. General description The SSTUM32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank


    Original     		PDF SSTUM32868 28-bit DDR2-800 SSTUM32868 14-bit Q22x Q5A H7

    SMD capacitor aa4 aa5

    Abstract: J2 Q24A B sot932 Q5A H7 TFBGA176
    Text: SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 02 — 12 September 2006 Product data sheet 1. General description The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank


    Original     		PDF SSTUB32868 28-bit DDR2-800 SSTUB32868 14-bit SMD capacitor aa4 aa5 J2 Q24A B sot932 Q5A H7 TFBGA176

    INSSTE32882

    Abstract: maxim dallas 2501 insstua32866 INSSTU32864 INSSTU32866 ttl crystal oscillator using CIRCUIT DIAGRAM INCUA877 ps 2501 dallas GSM home automation block diagram INCU877
    Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer


    Original     		PDF

    AA7 smd diode

    Abstract: J2 Q24A B Q22x data sheet for all smd components diode smd m7 DDR2-800 SSTUA32864 SSTUA32866 Q20x SMD capacitor aa4 aa5
    Text: SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 04 — 22 April 2010 Product data sheet 1. General description The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank


    Original     		PDF SSTUB32868 28-bit DDR2-800 SSTUB32868 14-bit AA7 smd diode J2 Q24A B Q22x data sheet for all smd components diode smd m7 SSTUA32864 SSTUA32866 Q20x SMD capacitor aa4 aa5