ca1961
Abstract: 0X00 ADSP-21991 quadrature shaft encoder A3 TDI Sport - A1
Text: PRELIMINARY TECHNICAL DATA a Mixed Signal DSP Controller ADSP-21991 Preliminary Technical Data MIXED SIGNAL DSP CONTROLLER FEATURES ADSP-219x, 16-bit, Fixed Point DSP Core with up to 160 MIPS sustained performance 40K Words of On chip RAM, Configured as 32K Words
|
Original
|
PDF
|
ADSP-21991
ADSP-219x,
16-bit,
24-bit
16-bit
14-bit
ADSP-21991BBC
ADSP-21991BST
196-ball
176-lead
ca1961
0X00
ADSP-21991
quadrature shaft encoder
A3 TDI Sport - A1
|
ADSP-21990
Abstract: summit-ICE 0x009000 CCC03
Text: PRELIMINARY TECHNICAL DATA a Mixed Signal DSP Controller ADSP-21990 Preliminary Technical Data MIXED SIGNAL DSP CONTROLLER FEATURES ADSP-219x, 16-bit, Fixed Point DSP Core with up to 160 MIPS sustained performance 8K Words of On chip RAM, Configured as 4K Words On
|
Original
|
PDF
|
ADSP-21990
ADSP-219x,
16-bit,
24-bit
16-bit
14-bit
ADSP-21990BCA
ADSP-21990
summit-ICE
0x009000
CCC03
|
0X00
Abstract: ADSP-21992
Text: PRELIMINARY TECHNICAL DATA a Mixed Signal DSP Controller With CAN ADSP-21992 Preliminary Technical Data MIXED SIGNAL DSP CONTROLLER FEATURES ADSP-219x, 16-bit, Fixed Point DSP Core with up to 160 MIPS sustained performance 48K Words of On chip RAM, Configured as 32K Words
|
Original
|
PDF
|
ADSP-21992
ADSP-219x,
16-bit,
24-bit
16-bit
14-bit
ADSP-21992YST
176-lead
0X00
ADSP-21992
|
addressing modes in adsp-21xx
Abstract: ADSP-21990 AC Motor Speed Controller operational encoder speed sensor pwm based bidirectional dc motor speed pwm based bidirectional dc motor speed control ADSP21990 fsr 12.5 3 phase PWM inverters
Text: a Mixed-Signal DSP Controller ADSP-21990 FEATURES Dual 16-bit auxiliary PWM outputs 16 general-purpose flag I/O pins 3 programmable 32-bit interval timers SPI communications port with master or slave operation Synchronous serial communications port SPORT capable of
|
Original
|
PDF
|
ADSP-21990
16-bit
32-bit
196-ball
176-lead
ADSP-2199x,
16-bit,
ST-176)
ADSP-21990BBC
ADSP-21990BST
addressing modes in adsp-21xx
ADSP-21990
AC Motor Speed Controller
operational encoder speed sensor
pwm based bidirectional dc motor speed
pwm based bidirectional dc motor speed control
ADSP21990
fsr 12.5
3 phase PWM inverters
|
ADSP21991
Abstract: ADSP-21991 pwm based bidirectional dc motor speed control l2
Text: a Mixed Signal DSP Controller ADSP-21991 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 40K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 8K Words On-Chip 16-Bit Data RAM External Memory Interface
|
Original
|
PDF
|
ADSP-21991
ADSP-219x,
16-Bit,
24-Bit
16-Bit
14-Bit
MS-026-BGA.
ADSP-21991BBC
ADSP21991
ADSP-21991
pwm based bidirectional dc motor speed control l2
|
Untitled
Abstract: No abstract text available
Text: a Mixed Signal DSP Controller ADSP-21991 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 40K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 8K Words On-Chip 16-Bit Data RAM External Memory Interface
|
Original
|
PDF
|
ADSP-21991
ADSP-219x,
16-Bit,
24-Bit
16-Bit
14-Bit
MS-026-BGA.
ADSP-21991BBC
|
ADSP-21990
Abstract: No abstract text available
Text: a Mixed-Signal DSP Controller ADSP-21990 FEATURES ADSP-2199x, 16-bit, fixed-point DSP core with up to 160 MIPS sustained performance 8K words of on-chip RAM, configured as 4K words on-chip, 24-bit program RAM and 4K words on-chip, 16-bit data RAM External memory interface
|
Original
|
PDF
|
ADSP-21990
ADSP-2199x,
16-bit,
24-bit
16-bit
14-bit
ADSP-21990BBC
ADSP-21990BST
ADSP-21990BSTZ2
ADSP-21990
|
3 phase PWM inverters
Abstract: ADSP-21990
Text: a Mixed Signal DSP Controller ADSP-21990 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 8K Words of On-Chip RAM, Configured as 4K Words OnChip 24-Bit Program RAM and 4K Words On-Chip 16-Bit Data RAM External Memory Interface
|
Original
|
PDF
|
ADSP-21990
ADSP-219x,
16-Bit,
24-Bit
16-Bit
14-Bit
MS-026-BGA.
ADSP-21990BBC
3 phase PWM inverters
ADSP-21990
|
ADSP-2199x
Abstract: ADSP21992 ADSP-21992 sharc 217x
Text: Mixed-Signal DSP Controller with CAN ADSP-21992 Dual 16-bit auxiliary PWM outputs 16 general-purpose flag I/O pins 3 programmable 32-bit interval timers SPI communications port with master or slave operation Synchronous serial communications port SPORT capable of
|
Original
|
PDF
|
ADSP-21992
16-bit
32-bit
BC-196-2
ADSP-21992YBC
196-Ball
ADSP-21992BST
176-Lead
ST-176
ADSP-2199x
ADSP21992
ADSP-21992
sharc 217x
|
Untitled
Abstract: No abstract text available
Text: Mixed-Signal DSP Controller with CAN ADSP-21992 FEATURES Dual 16-bit auxiliary PWM outputs 16 general-purpose flag I/O pins 3 programmable 32-bit interval timers SPI communications port with master or slave operation Synchronous serial communications port SPORT capable of
|
Original
|
PDF
|
ADSP-21992
16-bit
32-bit
196-Ball
BC-196-2
ADSP-21992BST
176-Lead
ST-176
ADSP-21992BSTZ2
|
ADSP21992
Abstract: ADSP-21992
Text: a Mixed Signal DSP Controller With CAN ADSP-21992 KEY FEATURES ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 48K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 16K Words On-Chip 16-Bit Data RAM
|
Original
|
PDF
|
ADSP-21992
ADSP-219x,
16-Bit,
24-Bit
16-Bit
14-Bit
MS-026-BGA.
ADSP-21992BBC
ADSP21992
ADSP-21992
|
MT48LC16M16A2P75
Abstract: MT48LC16M16A2P-75
Text: System Demonstration Platform User Guide Revision 1.3, February 2011 Part Number 82-100110-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2011 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
|
Original
|
PDF
|
J4-45
PH15/COL
J4-76
J4-47
J4-74
J4-48
J4-73
J4-49
J4-72
J4-70
MT48LC16M16A2P75
MT48LC16M16A2P-75
|
LXV Series
Abstract: SPORT timing DIAGRAM OF ROM MRS 1031 4 bit by bit 4 multiplication IC db 3 xv 27 diagram for 4 bits binary multiplier circuit ADSP-21065L B-28 B-30
Text: , ,1' ; Numerics 32- and 48-bit memory words, using 5-30 32-bit data starting memory address 5-35 A AC (ALU fixed-point carry bit 2-16 described 2-18 fixed-point logic operations and 2-18 setting and clearing 2-18 AC condition 3-13 Access address fields for external memory
|
Original
|
PDF
|
48-bit
32-bit
16-bit
ADSP-21065L
LXV Series
SPORT
timing DIAGRAM OF ROM
MRS 1031
4 bit by bit 4 multiplication IC
db 3 xv 27
diagram for 4 bits binary multiplier circuit
B-28
B-30
|
ic 8255 pll
Abstract: br-112 hack ADSP-2191M F400 HA16 104A18 PMD 1000
Text: PRELIMINARY TECHNICAL DATA a DSP Microcomputer ADSP-2191M Preliminary Technical Data ADSP-219X DSP CORE FEATURES 64K Words of On-chip RAM, Configured as 32K Words On-chip 24-bit RAM and 32K Words On-chip 16-bit RAM 6.25 ns Instruction Cycle Time Internal , for up to
|
Original
|
PDF
|
ADSP-2191M
ADSP-219X
24-bit
16-bit
ADSP-218x
ADSP-2191MKST160X
ic 8255 pll
br-112
hack
ADSP-2191M
F400
HA16
104A18
PMD 1000
|
|
|
ADSP-2195
Abstract: ADSP-2195MBCA-140 2195 J2/STR 6757 OF equivalent
Text: 35 /,0,1$5< 7(&+1,&$/ '$7$ a DSP Microcomputer ADSP-2195 Preliminary Technical Data ADSP-219x DSP CORE FEATURES 6.25 ns Instruction Cycle Time (Internal , for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy -to-Use Algebraic Syntax
|
Original
|
PDF
|
ADSP-2195
ADSP-219x
ADSP-218x
ADSP-2195MKST
-160X
ADSP-2195MBST
-140X
ADSP-2195MKCA-160X
ADSP-2195MBCA-140X
ADSP-2195
ADSP-2195MBCA-140
2195
J2/STR 6757 OF equivalent
|
ADSP-2191
Abstract: No abstract text available
Text: 35 /,0,1$5< 7(&+1,&$/ '$7$ a DSP Microcomputer ADSP-2191 Preliminary Technical Data ADSP-219x DSP CORE FEATURES 6.25 ns Instruction Cycle Time (Internal , for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy -to-Use Algebraic Syntax
|
Original
|
PDF
|
ADSP-2191
ADSP-219x
ADSP-218x
ADSP-2191
|
GE Manual
Abstract: Transistor BFT 98 oscilloscope service manual mos 620 ADSP-21065L B-28 B-30 B-31
Text: , ,1' ; Numerics 32- and 48-bit memory words, using 5-30 32-bit data starting memory address 5-35 A AC (ALU fixed-point carry bit 2-16 described 2-18 fixed-point logic operations and 2-18 setting and clearing 2-18 AC condition 3-13 Access address fields for external memory
|
Original
|
PDF
|
48-bit
32-bit
16-bit
ADSP-21065L
GE Manual
Transistor BFT 98
oscilloscope service manual mos 620
B-28
B-30
B-31
|
ADSP-2196
Abstract: pF70
Text: 35 /,0,1$5< 7(&+1,&$/ '$7$ a DSP Microcomputer ADSP-2196 Preliminary Technical Data ADSP-219x DSP CORE FEATURES 6.25 ns Instruction Cycle Time (Internal , for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy -to-Use Algebraic Syntax
|
Original
|
PDF
|
ADSP-2196
ADSP-219x
ADSP-218x
ADSP-2196MKST
-160X
ADSP-2196MBST
-140X
ADSP-2196MKCA-160X
ADSP-2196MBCA-140X
ADSP-2196
pF70
|
Untitled
Abstract: No abstract text available
Text: 35 /,0,1$5< 7(&+1,&$/ '$7$ = DSP Microcomputer ADSP-2196 Preliminary Technical Data ADSP-219x DSP CORE FEATURES 6.25 ns Instruction Cycle Time (Internal , for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy -to-Use Algebraic Syntax
|
Original
|
PDF
|
ADSP-2196
ADSP-219x
ADSP-218x
ADSP-2196MKST
-160X
ADSP-2196MBST
-140X
ADSP-2196MKCA-160X
ADSP-2196MBCA-140X
|
User Manual
Abstract: CM-BF548 MHDR1X5 ADSP-BF548BBCZ-5X i2c labview MHDR1 ADSP-BF518 CM-BF533 DEV-BF548DA-Lite schematic usb extender
Text: Hardware User Manual CM-BF548 V1.x Contact Bluetechnix Mechatronische Systeme GmbH Lainzerstraße 162/3 A-1130 Vienna AUSTRIA/EUROPE [email protected] http://www.bluetechnix.com Document No.: 100-1241-1.0 Document Revision 13 Date: 2010-02-02 Blackfin CM-BF548 Hardware User Manual
|
Original
|
PDF
|
CM-BF548
CM-BF548.
User Manual
MHDR1X5
ADSP-BF548BBCZ-5X
i2c labview
MHDR1
ADSP-BF518
CM-BF533
DEV-BF548DA-Lite
schematic usb extender
|
ADSP-BF532
Abstract: No abstract text available
Text: a Blackfin Embedded Processor ADSP-BF531/ADSP-BF532/ADSP-BF533 FEATURES External Memory Controller with glueless support for SDRAM, SRAM, FLASH, and ROM Flexible memory booting options from SPI and external memory Up to 600 MHz high performance Blackfin processor
|
Original
|
PDF
|
ADSP-BF531/ADSP-BF532/ADSP-BF533
16-bit
40-bit
160-ball
169-ball
176-lead
duSBBC500
ADSP-BF533SBBZ5001
ADSP-BF532SBBC400
ADSP-BF532
|
CODE SPORT 2191
Abstract: H-a16t ADSP-2191M HA16 PRIMA ATA15
Text: a DSP Microcomputer ADSP-2191M PERFORMANCE FEATURES 6.25 ns Instruction Cycle Time, for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy to Use Algebraic Syntax Single-Cycle Instruction Execution Single-Cycle Context Switch between Two Sets of Computation and Memory Instructions
|
Original
|
PDF
|
ADSP-2191M
ADSP-218x
ADSP-2191MKST-160
ADSP-2191MBST-140
ADSP-2191MKCA-160
ADSP-2191MBCA-140
144-Lead
CODE SPORT 2191
H-a16t
ADSP-2191M
HA16
PRIMA
ATA15
|
AAG EEPROM
Abstract: ADSP-BF533 169ball ADSP-BF533 rev d
Text: Blackfin Embedded Processor ADSP-BF533 a FEATURES External memory controller with glueless support for SDRAM, SRAM, FLASH, and ROM Flexible memory booting options from SPI® and external memory Up to 600 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
|
Original
|
PDF
|
ADSP-BF533
16-bit
40-bit
160-ball
169-ball
BC-160
B-169
AAG EEPROM
ADSP-BF533
169ball
ADSP-BF533 rev d
|
EC38J
Abstract: ADSP-BF531 ADSP-BF532 ADSP-BF533 ADSP-BF531 Revision A ADSP-BF532SBSTZ400 ST1761 TX121 51169 aag2
Text: Blackfin Embedded Processor ADSP-BF531/ADSP-BF532/ADSP-BF533 a FEATURES External memory controller with glueless support for SDRAM, SRAM, FLASH, and ROM Flexible memory booting options from SPI and external memory Up to 600 MHz high performance Blackfin processor
|
Original
|
PDF
|
ADSP-BF531/ADSP-BF532/ADSP-BF533
16-bit
40-bit
160-ball
169-ball
176-lead
ADSP-BF531SBST400
ST-176-1
ADSP-BF531SBSTZ4001
EC38J
ADSP-BF531
ADSP-BF532
ADSP-BF533
ADSP-BF531 Revision A
ADSP-BF532SBSTZ400
ST1761
TX121
51169
aag2
|