Untitled
Abstract: No abstract text available
Text: CY7C130, CY7C130A CY7C131, CY7C131A 1 K x 8 Dual-Port Static RAM 1 K × 8 Dual-Port Static RAM Functional Description Features • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K × 8 organization ■ 0.65 micron CMOS for optimum speed and power
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CY7C130,
CY7C130A
CY7C131,
CY7C131A
CY7C130/130A/CY7C131/131A
CY7C140/CY7C141
CY7C130/130A/CY7C131/131A;
48-pinout
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CY7C
Abstract: CY7C130 CY7C131 CY7C140 CY7C141
Text: CY7C130, CY7C130A CY7C131, CY7C131A 1 K x 8 Dual-Port Static RAM 1 K × 8 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K × 8 organization ■ 0.65 micron CMOS for optimum speed and power
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Original
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CY7C130,
CY7C130A
CY7C131,
CY7C131A
CY7C130/130A/CY7C131/131A/CY7C140
CY7C141
CY7C130/130A/CY7C131/131A
CY7C
CY7C130
CY7C131
CY7C140
CY7C141
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CY7C130
Abstract: CY7C131 CY7C140 CY7C141
Text: CY7C130, CY7C130A CY7C131, CY7C131A 1 K x 8 Dual-Port Static RAM 1 K × 8 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K × 8 organization ■ 0.65 micron CMOS for optimum speed and power
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Original
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CY7C130,
CY7C130A
CY7C131,
CY7C131A
CY7C130/130A/CY7C131/131A
CY7C140/CY7C141
CY7C130/130A/CY7C131/131A;
48-pin
CY7C13ication
CY7C130
CY7C131
CY7C140
CY7C141
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a7r transistor
Abstract: transistor a4L A12L transistor A0LA A12L CY7C144 CY7C145
Text: CY7C144 8K x 8/9 Dual-Port Static RAM with SEM, INT, BUSY Features Functional Description • True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 8K x 8 organization CY7C144 ■ 8K x 9 organization (CY7C145) ■ 0.65-micron complementary metal oxide semiconductor
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Original
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CY7C144
CY7C144)
CY7C145)
65-micron
CY7C144
CY7C145
CY7C144/5
a7r transistor
transistor a4L
A12L transistor
A0LA
A12L
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transistor a4L
Abstract: a7l transistor 55AX A12L CY7C144 CY7C145 CY7C CY7C144-15AI
Text: CY7C144 CY7C145 8K x 8/9 Dual-Port Static RAM with SEM, INT, BUSY Features Functional Description • True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 8K x 8 organization CY7C144 ■ 8K x 9 organization (CY7C145)
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Original
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CY7C144
CY7C145
CY7C144)
CY7C145)
65-micron
transistor a4L
a7l transistor
55AX
A12L
CY7C145
CY7C
CY7C144-15AI
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CY7C136-55JC
Abstract: No abstract text available
Text: CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Functional Description Features • True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 2K x 8 organization ■ 0.65 micron CMOS for optimum speed and power
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Original
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CY7C132,
CY7C136
CY7C136A,
CY7C142,
CY7C146
CY7C132/CY7C136/CY7C136A
CY7C142/CY7C146
CY7C132/CY7C136/CY7C136A;
52-Pin
CY7C136-55JC
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transistor a4L
Abstract: CY7C132 CY7C136 CY7C142 CY7C146 a7r transistor CY7C136-55NC
Text: CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 2K x 8 organization ■ 0.65 micron CMOS for optimum speed and power
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Original
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CY7C132,
CY7C136
CY7C136A,
CY7C142,
CY7C146
CY7C136,
transistor a4L
CY7C132
CY7C136
CY7C142
CY7C146
a7r transistor
CY7C136-55NC
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CY7C136E
Abstract: No abstract text available
Text: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Functional Description Features • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization
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Original
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CY7C131E,
CY7C131AE
CY7C136E,
CY7C136AE
52-pin
CY7C136E
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PDF
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CY7C136E
Abstract: No abstract text available
Text: CY7C131E/CY7C131AE CY7C136E/CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization
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Original
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CY7C131E/CY7C131AE
CY7C136E/CY7C136AE
CY7C131E
CY7C131AE
CY7C136E
CY7C136AE
CY7C136Eout
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CY7C136E
Abstract: CY7C131AE-15JXI CY7C136AE-55NXI
Text: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization
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Original
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CY7C131E,
CY7C131AE
CY7C136E,
CY7C136AE
CY7C131E
CY7C136E
CY7C136AE
CY7C131AE-15JXI
CY7C136AE-55NXI
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CY7C131E-55
Abstract: N5210 30380 CY7C136E
Text: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location CY7C131E / CY7C131AE / CY7C136E / CY7C136AE are
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Original
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CY7C131E,
CY7C131AE
CY7C136E,
CY7C136AE
CY7C131E
CY7C136E
CY7C136AE
CY7C131E-55
N5210
30380
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PDF
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CY7C136E-55NXC
Abstract: CY7C131E-55 cy7c136e CY7C131E-15NXI CY7C136AE-55NXI
Text: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization
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Original
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CY7C131E,
CY7C131AE
CY7C136E,
CY7C136AE
CY7C136E-55NXC
CY7C131E-55
cy7c136e
CY7C131E-15NXI
CY7C136AE-55NXI
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Untitled
Abstract: No abstract text available
Text: CY7C007A16 K x 8 Dual-Port Static RAM CY7C006A 16 K × 8 Dual-Port Static RAM 16 K × 8 Dual-Port Static RAM Features • Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device ■ On-chip arbitration logic ■
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CY7C007A16
CY7C006A
CY7C006A)
35-micron
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CY7C136E
Abstract: No abstract text available
Text: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization
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Original
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CY7C131E,
CY7C131AE
CY7C136E,
CY7C136AE
CY7C131E
CY7C136E
CY7C136AE
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PDF
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CY7C09099V
Abstract: No abstract text available
Text: CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09099V CY7C09179V 3.3 V 32K/128K x 8/9 Synchronous Dual-Port Static RAM 3.3 V 32 K/64 K/128 K × 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which enable simultaneous access of the same memory location
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CY7C09079V/89V/99V
CY7C09179V/89V/99V
CY7C09099V
CY7C09179V
32K/128K
K/128
CY7C09179V)
CY7C09099V)
CY7C09099V
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Untitled
Abstract: No abstract text available
Text: CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3 V 8 K / 16 K x 8 Dual-Port Static RAM CY7C144AV CY7C006AV 3.3 V 8 K / 16 K × 8 Dual-Port Static RAM 3.3 V 8 K / 16 K × 8 Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous
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CY7C138AV
CY7C139AV
CY7C144AV
CY7C145AV
CY7C006AV
CY7C016AV
CY7C007AV
CY7C017AV
CY7C006AV
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CY7C09279V
Abstract: CY7C09389V-9AI
Text: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells that allow simultaneous access of the same memory location
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CY7C09269V/79V/89V
CY7C09369V/89V
CY7C09269V/369V)
CY7C09279V)
CY7C09289V/389V)
CY7C09279V
CY7C09389V-9AI
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • ■ True dual-ported memory cells that allow simultaneous access of the same memory location
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Original
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CY7C09269V/79V/89V
CY7C09369V/89V
CY7C09269V/369V)
CY7C09279V)
CY7C09289V/389V)
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells that allow simultaneous access of the same memory location
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Original
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CY7C09269V/79V/89V
CY7C09369V/89V
100-pin
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Untitled
Abstract: No abstract text available
Text: electronic June 1992 M 67024 DATA SHEET_ 4 k x 16 CMOS DUAL PORT RAM FEATURES . FAST ACCESS TIME : 35 NS TO 55 NS 30 NS PRELIMINARY FOR COMMERCIAL ONLY . WIDE TEMPERATURE RANGE: - 55°C TO + 125°C . 67024 L LOW POWER 67024 V VERY LOW POWER
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OCR Scan
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67024/Rev.
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PDF
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MS6130L-70JC
Abstract: No abstract text available
Text: MS6130 FEBRUARY 1992 1K x 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • High-speed - 55/70/90 ns The MOSEL MS6130 is a 8,192 bit dual port static random access memory organized as 1,024 words by 8 bits. It is built with MOSEL's high perofrmance twin tub CMOS process. Eight-transistor full CMOS memory cell
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OCR Scan
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MS6130
MS6130
48-pin
52-pin
325mW
MS6130-70PC
MS6130L-70PC
MS6130-90PC
MS6130L-90PC
MS6130L-70JC
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PDF
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Untitled
Abstract: No abstract text available
Text: Temic Semiconductors 2 K x 8 CMOS Dual Port RAM M67132/M67142 Description The M67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or
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OCR Scan
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M67132/M67142
M67132/67142
SCC9301033)
67I32E
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PDF
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431AM
Abstract: 6 PIN 36AA
Text: MTE D • SöböMSb D G O in i IIIÌmÌIII I V l M P Advance Information HI-REL DATA SHEET_ 430 — ■ NMHS MATRA T = ^ - ^ - /Z M H S January 1991 M 671 32/M 67142 2 kx 8 CMOS DUAL PORT RAM FEATURES . . . ACCESS TIME MILITARY : 35 TO 55 ns max .
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OCR Scan
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PDF
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Untitled
Abstract: No abstract text available
Text: M ill PRELIMINARY DATA SHEET_ HM 65688A 16 K x 4 ULTIMATE CMOS SRAM FEATURES . ACCESS TIME COMMERCIAL : 35/45 ns max MILITARY/INDUSTRIAL : 45/55 ns (max) . VERY LOW POWER CONSUMPTION ACTIVE : 175.0 mW (typ) STANDBY : 0.5 |lW (typ)
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OCR Scan
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5688A
5688A
5688A/Rev
Sflb04Sb
GDD327b
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PDF
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