DDR PHY ASIC
Abstract: ddr ram memory ic CP-01024-1 FLEX10K DDR2-800
Text: DesignCon 2007 Calibration Techniques for HighBandwidth Source-Synchronous Interfaces Manoj Roge, Altera Corporation Andy Bellis, Altera Corporation Phil Clarke, Altera Corporation Joseph Huang, Altera Corporation Mike Chu, Altera Corporation Yan Chong, Altera Corporation
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CP-01024-1
DDR PHY ASIC
ddr ram memory ic
FLEX10K
DDR2-800
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VR 10K preset
Abstract: Signal Path Designer
Text: DesignCon 2008 A Reset Control Apparatus for PLL Power-Up Sequence and Auto-Synchronization Kazi Asaduzzaman, Altera Corporation Tim Hoang, Altera Corporation Kang-Wei Lai, Altera Corporation Wanli Chang, Altera Corporation Leon Zheng, Altera Corporation Mian Smith, Altera Corporation
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CP-01037-1
VR 10K preset
Signal Path Designer
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9524 pc
Abstract: cp-01035 IC K140 90 nm hspice
Text: DesignCon 2008 A Fast Algorithm to Instantly Predict FPGA SSN for Various I/O Pin Assignments Geping Liu, Altera Corporation [[email protected]] Zhuyuan Liu, Altera Corporation Kundan Chand, Altera Corporation San Wong, Altera Corporation Kaiyu Ren, Altera Corporation
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CP-01035-1
9524 pc
cp-01035
IC K140
90 nm hspice
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LMS adaptive filter model for FPGA
Abstract: hyperlynx 90 nm hspice FIR filter matlaB design altera digital graphic equalizer ic LMS matlab CP-01025-1
Text: Equalization Challenges for 6-Gbps Transceivers Addressed by PELE—A Software-Focused Solution! Tina Tran, Altera Corporation Gary Pratt, Mentor Graphics Corporation Kazi Asaduzzaman, Altera Corporation Mei Luo, Altera Corporation Simar Maangat, Altera Corporation
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CP-01025-1
LMS adaptive filter model for FPGA
hyperlynx
90 nm hspice
FIR filter matlaB design altera
digital graphic equalizer ic
LMS matlab
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F487 transistor
Abstract: 2A86 transistor D889 65e9 4B71 65e9 transistor ix 2933 F487 529B 0674
Text: Altera Software Installation and Licensing Version 10.0 Altera Software Installation and Licensing Version 10.0 Altera Corporation 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com Altera Software Installation and Licensing Version 10.0
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MNL-01054-1
F487 transistor
2A86
transistor D889
65e9
4B71
65e9 transistor
ix 2933
F487
529B
0674
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351nF DesignCon 2010 Analysis FPGA Noise Propagation Package Modeling Altera Corporation
Abstract: 400um XCItepi powersi 50GHZ 351nF Design Seminar Signal Transmission Fabrication process steps metal core pcb
Text: DesignCon 2010 Analysis of FPGA PDN Noise Propagation by Die & Package 3D Modeling Zhe Li, Altera Corporation [email protected] Dr. Hong Shi, Altera Corporation [email protected] Kenneth Kwan, Altera Corporation [email protected] Dr. John Y. Xie, Altera Corporation
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pll 02 a
Abstract: 800E-02 finite state machine frequency detection using FPGA
Text: DesignCon 2009 Method and Apparatus of Continuous PLL Adaptation to Variable Reference Input Frequency Tim Hoang, Altera Corporation Sergey Shumarayev, Altera Corporation Kazi Asaduzzaman, Altera Corporation Leon Zheng, Altera Corporation CP-01051-1.0 February 2009
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CP-01051-1
pll 02 a
800E-02
finite state machine
frequency detection using FPGA
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b548
Abstract: d67b datasheet mb 8719 3BA6 3C37 altera jtag ethernet b824 B824 transistor D896 d975
Text: Altera Software Installation and Licensing Version 9.1 Altera Software Installation and Licensing Version 9.1 Altera Corporation 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com Altera Software Installation and Licensing Version 9.1
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MNL-01050-1
b548
d67b
datasheet mb 8719
3BA6
3C37
altera jtag ethernet
b824
B824 transistor
D896
d975
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altera de1
Abstract: vhdl code for codec WM8731 music keyboard encoder schematic UART using VHDL rs232 driver Altera Cyclone II 2C20 FPGA Board VHDL audio de1 Altera DE1 Board Using Cyclone II FPGA Circuit WM8731 Altera II 2C20 FPGA verilog code for codec WM8731
Text: Altera DE1 Board DE1 Development and Education Board User Manual Version 1.1 Copyright 2006 Altera Corporation Altera DE1 Board CONTENTS Chapter 1 DE1
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interlaken rtl
Abstract: gearbox rev 10 Gbps ethernet phy analog devices select guide 2010 AN320 CRC32 IP-10GBASERPCS xaui xgmii ip core altera interlaken PHY interface for PCI EXPRESS
Text: Altera Transceiver PHY IP Core User Guide Altera Transceiver PHY IP Core User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01080-1.0 Subscribe Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, and specific device designations
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UG-01080-1
interlaken rtl
gearbox rev
10 Gbps ethernet phy
analog devices select guide 2010
AN320
CRC32
IP-10GBASERPCS
xaui xgmii ip core altera
interlaken
PHY interface for PCI EXPRESS
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SCHEMATIC USB to VGA
Abstract: schematic diagram video converter rca to vga vhdl code for codec WM8731 3 digit seven segment 11 pin display schematic diagram vga to tv pin configuration of seven segment usb video player circuit diagram
Text: Altera DE2 Board DE2 Development and Education Board User Manual Version 1.5 Copyright 2012 Altera Corporation Altera DE2 Board CONTENTS Chapter 1 DE2
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INTERPOLATOR 6 BITS SIN COS DATA CLK
Abstract: CP-01066-1 altera 48 fpga
Text: DesignCon 2010 An On-Die Scope Based on a 40-nm Process FPGA Transceiver Weichi Ding, Altera Corporation Email: [email protected] Mingde Pan, Altera Corporation Email: [email protected] Tina Tran, Altera Corporation Email: [email protected] Wilson Wong, Altera Corporation
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CP-01066-1
INTERPOLATOR 6 BITS SIN COS DATA CLK
altera 48 fpga
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ALTERA
Abstract: No abstract text available
Text: How to Contact Altera February 1997 For additional information about Altera® products, consult the sources shown in Table 1. Table 1. How to Contact Altera Information Type Literature Access Altera Express USA & Canada 800 5-ALTERA All Other Locations
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ALTERA
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altddio_out
Abstract: altera double data rate megafunction altddio_in
Text: Altera Double Data Rate Megafunctions User Guide 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com Quartus II Version: Document Version: Document Date: 2.2 1.0 May 2003 Copyright Altera Double Data Rate Megafunctions User Guide Copyright 2003 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo,
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vhdl code for lcd display for DE2 altera
Abstract: mp3 altera de2 board altera de2 board sd card VHDL audio codec ON DE2 altera de2 board vga connector de2 altera Schematic LED panel display tv de2 video image processing altera vhdl code for rs232 receiver altera schematic diagram pc vga to tv rca converter
Text: Altera DE2 Board DE2 Development and Education Board User Manual Version 1.42 Copyright 2008 Altera Corporation Altera DE2 Board CONTENTS Chapter 1 DE2
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Untitled
Abstract: No abstract text available
Text: Early SSN Estimator User Guide for Altera Programmable Devices 101 Innovation Drive San Jose, CA 95134 www.altera.com Document Version: Document Date: 1.0 November 2009 Copyright © 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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hdmi SDI
Abstract: PC48F4400P0VB00 Si570 gx d-vda led full color screen fpga schematic usb to lan cable adapter USB 2.0 SPI Flash Programmer schematic LT2418
Text: Audio Video Development Kit, Stratix IV GX Edition User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01066-2.0 November 2009 Altera Corporation Based on Altera Complete Design Suite version 9.1 Copyright © 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the
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UG-01066-2
hdmi SDI
PC48F4400P0VB00
Si570
gx d-vda
led full color screen fpga
schematic usb to lan cable adapter
USB 2.0 SPI Flash Programmer schematic
LT2418
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ieee floating point vhdl
Abstract: verilog code for single precision floating point multiplication ieee floating point multiplier vhdl object counter project report to download AN391 EP3C120 vhdl code for floating point multiplier
Text: Using Nios II Floating-Point Custom Instructions Tutorial 101 Innovation Drive San Jose, CA 95134 www.altera.com TU-N2FLTNGPNT-2.0 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, and specific device designations are trademarks and/or service marks of Altera Corporation
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8257D
Abstract: 81134A E4440A UFX9836 pll 02 a SANWO 8131a Noisecom UFX
Text: DesignCon 2008 A Jitter Estimation Method for Cascaded, Programmable PhaseLocked Loops Daniel Chow, Altera Corporation [email protected] Vincent Tsui, Altera Corporation [email protected] San Wong, Altera Corporation [email protected] CP-01036-1.0 February 2008
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CP-01036-1
8257D
81134A
E4440A
UFX9836
pll 02 a
SANWO
8131a
Noisecom UFX
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electrical engineering projects
Abstract: "toan nguyen" 90 nm CMOS CLK180 PRBS23 TSMC 40nm 32nm tsmc TSMC 90nm TSMC 40nm layout issue
Text: DesignCon 2008 Using Programmable Logic for Receiver Offset and Yield Enhancement Simar Maangat, Altera Corporation Email: [email protected] Toan Nguyen, Altera Corporation Email: [email protected] Wilson Wong, Altera Corporation Email: [email protected]
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CP-01043-1
electrical engineering projects
"toan nguyen"
90 nm CMOS
CLK180
PRBS23
TSMC 40nm
32nm tsmc
TSMC 90nm
TSMC 40nm layout issue
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altera jtag
Abstract: altera TQFP 32 PACKAGE MAX 7000 Timing
Text: MAX 7000 Contents March 2000 Application Notes AN 39 IEEE 1149.1 JTAG Boundary-Scan Testing in Altera Devices AN 41 PCI Bus Applications in Altera Devices AN 42 Metastability in Altera Devices AN 74 Evaluating Power for Altera Devices AN 80 Selecting Sockets for Altera Devices
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7000S
7000S
altera jtag
altera TQFP 32 PACKAGE
MAX 7000 Timing
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Untitled
Abstract: No abstract text available
Text: My First Nios II Software Tutorial 101 Innovation Drive San Jose, CA 95134 www.altera.com TU-01003-2.0 January 2010 Altera Corporation Based on Altera Complete Design Suite version 9.1 Copyright © 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the
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intel embedded microcontroller handbook
Abstract: intel 8288 intel 8288 bus generator 8288 bus controller by intel intel 8288 bus controller explain the 8288 bus controller MISO Matlab code uclinux embedded system projects embedded system projects pdf free download
Text: Embedded Design Handbook 101 Innovation Drive San Jose, CA 95134 www.altera.com ED_HANDBOOK-2.7 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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Abstract: No abstract text available
Text: ALTDQ_DQS2 Megafunction User Guide ALTDQ_DQS2 Megafunction User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01089-1.0 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, and specific device designations are trademarks and/or service marks of Altera Corporation in the U.S. and
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