GPON block diagram
Abstract: 10G EPON motorola iptv GPON OLT OLT block diagram GPON 10g EPON olt Olt block diagram GPON Xelerated GPON olt block diagram
Text: White Paper Customizing Multi-Service Access Network Silicon Introduction Network operators continue to invest in upgrading their access networks to improve delivery of high-bandwidth services. This investment has stimulated innovation throughout the supply chain to support the bandwidth, reliability,
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interlaken network processor
Abstract: design ideas content-addressable-memory GPON block diagram interlaken altera olt block diagram GPON MAC block diagram
Text: Low-cost building blocks and custom options DSL solutions from Altera To be competitive in a climate of evolving system architectures, regional requirements, and scrutinized R&D budgets, your DSL platforms must be easy and costefficient to develop. Offering high-quality triple-play services means you need to
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SS-01025-2
interlaken network processor
design ideas
content-addressable-memory
GPON block diagram
interlaken
altera olt block diagram
GPON MAC block diagram
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ip dslam
Abstract: 20-Gbps DSLAM configuration ENET3500 DSLAM structure vdsl2 phy GPON olt block diagram gpon optical line termination EP2S90 HC210
Text: White Paper Building Flexible, Cost-Efficient Broadband Access Equipment Line Cards Telecommunications equipment manufacturers TEMs are facing tough challenges with triple play (voice, video and data offerings) concentration and distribution equipment, including digital subscriber line access multiplexers
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EPF6016 app note
Abstract: No abstract text available
Text: FLEX 6000 M U M Features. • Programmable Logic Device Family May 1999. ver. ■ ■ Provides an ideal low-cost, pro g ram m ab le alternative to highvolum e gate array applications an d allow s fast design changes d u rin g p ro to ty p in g or design testing
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96-mil
EPF6024AB256
EPF6016B256
EPF6016AT100
EPF6010AT100
EPF6010AT144
EPF6016 app note
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DIOD 147 C26
Abstract: No abstract text available
Text: FLEX10KE Embedded Programmable Logic Family N ovem ber 19SS* v er. 1.Q1 Features. D ata S h e e t $§ Prelim inary Information 88 ^ E m b edded program m able logic device PLD fam ily, p ro v id in g system integration in a single device E nhanced e m b ed d ed array for im plem enting m egafunctions
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FLEX10KE
16-bit
DIOD 147 C26
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em 513 diode
Abstract: No abstract text available
Text: FLE X 10KE Embedded Programmable Logic Family August 1998, ver. 1 Date Sheet £8 Features. P re lim in a ry M o rm a tio n 38 88 88 E m bedded program m able logic device PLD fam ily, p ro v id in g system integration in a single device E nhanced em b ed d ed array for im p lem enting m egafunctions
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16-bit
800-EPLD
em 513 diode
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Altera flex 10k10
Abstract: EP10K altera flex10k
Text: FLEX 10K Embedded Programmable Logic Family January 1 0 8 , ver. Features. Data Sheet * • ■ ^ h e in d u stry ’s first em b ed d ed p ro gram m able logic device PLD fam ily, pro v id in g system integration in a single device E m bedded array for im plem enting m egafunctions, such as
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EPF10K100A
600-pin
Altera flex 10k10
EP10K
altera flex10k
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pf815
Abstract: sim 300 v 703 p10n10
Text: F L E X 8000 Programmable Logic Device Family J a n u a r y 1 9 9 8 . v e r. 9 Features. D a ta S h e e t • ■ ■ ■ ■ Low -cost, high-density, register-rich CMOS p ro gram m able logic device PLD fam ily (see Table 1) 2,500 to 16,000 usable gates
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EPF8636GC192
EPF8636A
EPF8820A
EPF81500A
pf815
sim 300 v 703
p10n10
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Untitled
Abstract: No abstract text available
Text: M UM FLEX 8000 Programmable Logic Device Family June 1999, ver. 10. Features. • ■ ■ ■ ■ Low-cost, high-density, register-rich CMOS p ro g ram m ab le logic device PLD fam ily (see Table 1) 2,500 to 16,000 usable gates 282 to 1,500 registers System -level features
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EPF8820A
EPF81500A
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lsi 3256a
Abstract: 22VIO
Text: MAX 3000A Programmable Logic Device Family May 1999» ver. 1 Features. Preliminary Data Sheet H igh-perform ance, low -cost CMOS EEPROM -based p rogram m able logic devices PLDs b u ilt on a M ultiple A rray M atriX (MAX ) architecture (see 'Libie 1) 3.3-V in-system p ro g ram m ability (ISP) th ro u g h the b uilt-in
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Untitled
Abstract: No abstract text available
Text: M AX 7000A Includes MAX 7000AE Programmable Logic Device Family July 1998. ver. 1.11 Data Sheet Features. F orm erly k n o w n as M ichelangelo devices H igh-perform ance CMOS EEPROM -based pro g ram m ab le logic devices PLDs b u ilt o n second-generation M ultiple A rray M atriX
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7000AE
EPM7128A
EPM7256A
pl000A
44-pin
144-pin
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ALP 102 B4
Abstract: an35 cu hen ma
Text: FLEX 10KE Embedded Programmable Logic Family Data Sheet May 1999, ver. 2 Fe a tu re s . Prelim inary Information block EAB • ■ " E m bed d ed p rogram m able logic devices (PLDs), p ro v id in g System -on-a-Program m able-C hip integration in a single device
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16-bit
256-Pin
484-Pin
672-Pin
EPF10K30E
EPF10K50E
EPF10K50S
EPF10K100B
EPF10K100E
EPF10K130E
ALP 102 B4
an35 cu hen ma
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Untitled
Abstract: No abstract text available
Text: M AX 7000A Includes MAX 7000AE Programmable Logic Device Family June 1998. ver. 1.10 Data Sheet Features. F orm erly k n o w n as M ichelangelo devices H igh-perform ance CMOS EEPROM -based pro g ram m ab le logic devices PLDs b u ilt o n second-generation M ultiple A rray M atriX
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7000AE
EPM7128A
EPM7256A
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alien h3
Abstract: epm7192s pin
Text: includes MAX 7000E& MAX 700OS M AX 7000 Programmable Logic Device Family July ^898, ver. 5.03 Features . . . S8 88 £8 S8 SSS H igh-perform ance, EEPROM -based p rogram m able logic devices PLDs based on second-generation M ultiple A rray MatriX (MAX)
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7000E&
700OS
7000S
alien h3
epm7192s pin
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Untitled
Abstract: No abstract text available
Text: M AX 3000A M Ï Ï I 3 Â Programmable Logic Device Family . July 1999. ver. 1. Features. P re lim in a r y In fo rm a tio n Data Sheet High-performance, low-cost CMOS EEPROM-based program m able logic devices PLDs built on a M ultiple A rray M atrix (MAX )
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AG45
Abstract: W47A EPF20K
Text: APEX 20K X ’ Programmable Logic Device Family Data Sheet May 1999, ver. 2 Features . 11 P re lim in a ry In fo rm a tio n • In d u stry 's first p ro g ram m ab le logic device PLD incorporating System -on-a-Program m able-C hip integration M ultiCore™ architecture integ ratin g look-up table (LUT) logic,
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TI 046 EPROM
Abstract: EPF10K10 epc1213 EPc1441 EPC1064 EPC1064V EPF10K10A EPF10K20 EPF10K30 EPF10K30A
Text: Configuration EPROMs for FLEX Devices Features • ■ ■ ■ ■ ■ ■ ■ Altera Corporation A-DS-EPROM-09 Serial EPROM family for configuring FLEX devices Easy-to-use 4-pin interface to FLEX devices Low current during configuration and near-zero standby current
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System/6000
20-pin
32-pin
pac005
40-Pin
764of
TI 046 EPROM
EPF10K10
epc1213
EPc1441
EPC1064
EPC1064V
EPF10K10A
EPF10K20
EPF10K30
EPF10K30A
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M7064A
Abstract: alien h3 EPM7384
Text: MAX 7000A Includes M A X 7 Q00A E Programmable Logic Device Family January 1999, ver. 1.3 Data Sheet Features. “ Preliminary Ini ormati on • 88 588 & 88 588 Form erly kn o w n as M ichelangelo devices H igh-perform ance CMOS EEPROM -based program m able logic
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EPM7128A
EPM7256
M7064A
alien h3
EPM7384
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Untitled
Abstract: No abstract text available
Text: MAX 7000 Includes MAX 7000E & MAX 7000S Programmable Logic Device Family April 1998. ver. 5.02 Data Sheet Features. . P ^ ^ * ^ P ^ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array M atrix (MAX) architecture
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7000E
7000S
7000S
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73d12
Abstract: epm7032 algorithm
Text: Includes MAX 7000E & MAX 7000S M A X 7000 Programmable Logic Device Family May 1999. ver. 6 Data Sheet Featll res • ■ ■ ■ ■ ■ H igh-perform ance, EEPROM -based p rogram m able logic devices PLDs based on second-generation M ultiple A rray M a trix (MAX®)
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7000S
EPM7256E
192-Pin
208-Pin
EPM7256S
73d12
epm7032 algorithm
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programming manual EPLD EPS448
Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Text: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,
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-DB-0793-01
EP330,
EP610,
EP610A,
EP610T,
EP910,
EP910A,
EP910T,
EP1810,
EP1810T,
programming manual EPLD EPS448
Altera EPM5128
EPM7064-12
leap u1
EP-900910
PLE3-12a
tcl tv circuit
altera eplds
EP610 "pin compatible"
ALTERA MAX 5000
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epm7064 adapter
Abstract: epm7192
Text: Incudes MAX 7000 MAX 7D00E& MAX 7QO0S Programmable Logic Device Family May 1999» ver. 6 Data Sheet Features. * S3 88 M 88 W. H igh-perform ance, EEPROM -based p ro g ram m ab le logic devices PLDs b ased on second-generation M ultiple A rray M atriX (MAX )
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7D00E&
7000S
192-Pin
EPM7256E
208-Pin
EPM7256S
epm7064 adapter
epm7192
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ATIC 164 D2 48 pin
Abstract: EPM7000AE MAX-7Q 0
Text: MAX 7000A Includes MAX 7000AE Programmable Logic Device Family October 1998, ver, 1,2 Data Sheet Features. Form erly know n as M ichelangelo devices H igh-perform ance CM O S EEPRO M -based program m able logic devices PLDs built on second-generation M ultiple Array M atriX
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7000AE
ATIC 164 D2 48 pin
EPM7000AE
MAX-7Q 0
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TI 35X35 BGA 368 BGA
Abstract: EPF20K
Text: APEX 20K Programmable Logic Device Family November 1999. ver. 2.05 FeatU r6S D atasheet P re lim in a r y In fo rm a tio n • Industry's first program m able logic device PLD incorporating System -on-a-Program m able-Chip integration M ultiCore™ architecture integrating look-up table (LUT) logic,
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