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    AND GATE 74LS138 Search Results

    AND GATE 74LS138 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TLP5702H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TLP5705H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation

    AND GATE 74LS138 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    smb schottky diode s4

    Abstract: MM74HCA138 54LS138 74LS138 C1995 MM74HCA138N N16E 74ls138 truth table
    Text: MM74HCA138 3-to-8 Line Decoder General Description Features This decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications The circuit features high noise immunity and low power consumption usually associated with


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    PDF MM74HCA138 smb schottky diode s4 54LS138 74LS138 C1995 MM74HCA138N N16E 74ls138 truth table

    74LS138 pins

    Abstract: 02830
    Text: Revised February 1999 MM74HCT138 3-to-8 Line Decoder General Description The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits feature high noise immunity and low power consumption usually


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    PDF MM74HCT138 MM74HCT138M MM74HCT138SJX MM74HCT138SJ MM74HCT138MTC MM74HCT138MTCX MM74HCT138N 74LS138 pins 02830

    MM74HC138N

    Abstract: 74LS138 3 to 8 decoder notes 54HC 54LS138 74HC 74LS138 C1995 MM54HC MM54HC138 MM74HC
    Text: MM54HC138 MM74HC138 3-to-8 Line Decoder General Description This decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications The circuit features high noise immunity and low power consumption usually associated with


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    PDF MM54HC138 MM74HC138 MM74HC138 MM74HC138N 74LS138 3 to 8 decoder notes 54HC 54LS138 74HC 74LS138 C1995 MM54HC MM74HC

    MM74HC138M

    Abstract: 74LS138 DATASHEET MM74HC138 and gate 74LS138 74HC 74LS138 M16A M16D MM74HC138MTC MM74HC138N
    Text: Revised February 1999 MM74HC138 3-to-8 Line Decoder General Description The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features high noise immunity and low power consumption usually


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    PDF MM74HC138 MM74HC138 MM74HC138M 74LS138 DATASHEET and gate 74LS138 74HC 74LS138 M16A M16D MM74HC138MTC MM74HC138N

    MM74HCT138

    Abstract: 74ls138 fairchild 74LS138 DATASHEET 74HCT 74LS138 M16A M16D MM74HCT138M MM74HCT138MTC MM74HCT138N
    Text: Revised February 1999 MM74HCT138 3-to-8 Line Decoder General Description The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits feature high noise immunity and low power consumption usually


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    PDF MM74HCT138 MM74HCT138 74LS138. MM74HCT MM74Hr 74ls138 fairchild 74LS138 DATASHEET 74HCT 74LS138 M16A M16D MM74HCT138M MM74HCT138MTC MM74HCT138N

    74LS08 fan-in

    Abstract: 74LS398 74LS273 74LS14 Hex Inverter definition MC74F579 74LS181 74ls795 74LS299 Decade Up/Down counter 3 State ttl buffer 74LS245
    Text: Selection Information FAST/LS TTL 1 Circuit Characteristics 2 Design Considerations, Testing and Applications Assistance Form 3 FAST Data Sheets 4 LS Data Sheets 5 Reliability Data 6 Package Information Including Surface Mount 7 FAST AND LS TTL DATA CLASSIFICATION


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    PDF 81LS96) 81LS97) 81LS98) 74LS08 fan-in 74LS398 74LS273 74LS14 Hex Inverter definition MC74F579 74LS181 74ls795 74LS299 Decade Up/Down counter 3 State ttl buffer 74LS245

    lm294oct

    Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
    Text: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12


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    PDF 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 lm294oct d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C

    FZH115B

    Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
    Text: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P


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    PDF 74INTEGRATED Line-to-10 150ns 16-DIL 150ns 18-pin 250ns 300ns FZH115B fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104

    74LS382

    Abstract: C1602A C350AVB 74LS08 fan-in 74ls517 74LS556 74LS183 74LS86 full adder MB64H 74LS381
    Text: ix u jD U Lu ra n ctiu F U JIT S U _ mmm CWiOS Gate Array GENERAL INFORMATION The Fujitsu CMOS gate array family consists of twentyeight devlcs types which are fabricated with advanced silicon gate CMOS technology. And more than 14devlc«s are coming. Fujitsu CMOS gate array are configured In a


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    PDF veF178 74LS181 74LS190 F191H 74LS191 74LS192 74LS193 74LS194A 74LS195A 74S260 74LS382 C1602A C350AVB 74LS08 fan-in 74ls517 74LS556 74LS183 74LS86 full adder MB64H 74LS381

    74LS80

    Abstract: 74LS198 74LS150 74LS94 OAI32 74LS179 TTL 74LS198 MUX21H TTL 74ls138 to 7 segment 7476 3 bit ripple counter
    Text: 4flE ]> • 77MLjbciO 0001L3M 4bO « P C H T- °J EK-044-9004 CMOS Gate Array 5GV Series RICOH CORP/ ELECTRONIC The RICOH gate array 5GV series complies with the CMOS 1.5ju rule, and offers high speed operation with a gate delay time of 1.0 ns. The 5GV series inherits the rich library of 5GF gate array series. The cell library is compatible with


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    PDF 77MLjbc 0001L3M TEK-044-9004 RSC-15 TBF368 M390C M393C CM16BR* M540C M541C 74LS80 74LS198 74LS150 74LS94 OAI32 74LS179 TTL 74LS198 MUX21H TTL 74ls138 to 7 segment 7476 3 bit ripple counter

    C350AVB

    Abstract: full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder
    Text: FUJITSU MICROELECTRONICS F U JIT S U wmmm 7flC D B 37MT7bH □D03c]4b 3 • JZ CMOS Gate Array GENERAL INFORMATION The Fujitsu CM O S gate array fam ily consists of tw en tyeight device types which are fabricated w ith advanced silicon gate CMOS technology. And more than 14 devices


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    PDF 37MT7bH 74LS175 74LS181 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A C350AVB full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder

    16 bit comparator using 74*85 IC

    Abstract: 74LSI39 74LS80 shift register 74ls96 4 bit synchronous ic 7476 74ls150 74LS94 74ls91 counter OAI211 74ls179
    Text: EKG-3-8805 CMOS Gate Array 5GF Series • O u tlin e T he R icoh gate a rray 5GF series com plies w ith th e CMOS 1.5 m rule, and o ffe rs high speed o p e ra tio n w ith a gate delay tim e o f 1.0 ns. T he 5G F series in h e rits th e rich lib ra ry o f th e 5GH series, and th e S R A M and mask RO M can be used


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    PDF EKG-3-8805 RSC-15 74LS279 74LS298 74LS353 74LS367A 74LS368A 74LS390 74LS393 74LS399 16 bit comparator using 74*85 IC 74LSI39 74LS80 shift register 74ls96 4 bit synchronous ic 7476 74ls150 74LS94 74ls91 counter OAI211 74ls179

    Untitled

    Abstract: No abstract text available
    Text: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES


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    PDF G01341Q 4TLS03 0G13411 HD14070B 1407IB HD14556B HD14558B HD14560B HD14562B HD14072B

    Untitled

    Abstract: No abstract text available
    Text: s e m i c o n d u c t o r Revised February 1999 MM74HCT138 3-to-8 Line Decoder the 74LS138. All inputs are protected from damage due to static discharge by diodes to Vc c and ground. General Description The MM74HCT138 decoder utilizes advanced silicon-gate


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    PDF MM74HCT138 74LS138. MM74HCT138 MM74HCT

    Untitled

    Abstract: No abstract text available
    Text: January 1988 MM54HC138/MM74HC138 3-to-8 Line Decoder General Description This decoder utilizes advanced silicon-gate CMOS technol­ ogy, and is well suited to memory address decoding or data routing applications. The circuit features high noise immuni­ ty and low power consumption usually associated with


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    PDF MM54HC138/MM74HC138 54LS138/74LS138. MM54HC138/MM74HC138

    74HCT138N

    Abstract: No abstract text available
    Text: A I R C H I L D Revised February 1999 S E M I C D N D U C T D R tm MM74HCT138 3-to-8 Line Decoder General Description the 74LS138. All inputs are protected from dam age due to static discharge by diodes to V c c and ground. The M M 74H C T138 deco d e r utilizes advanced silicon-gate


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    PDF MM74HCT138 74HCT138N

    74LS82

    Abstract: 74LS176 74LS94 74LS286 74ls150 74LS177 74LS116 74ls198 7400 TTL 74ls521
    Text: GOULD 4055916 GOULD SEMICONDUCTOR SEMICONDUCTOR DIV DIV 03E D | 03E MDSSTlb 09920 D UCICmEU T-4 3I-V 7400 TTL Cells •> GOULD CM OS Gate Array and Standard Cell Library Electronics Features General Description • Over 200 functions available. 7400 TTL Cells, a member of Gould’s EXPERT ASIC


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    PDF

    Untitled

    Abstract: No abstract text available
    Text: MM54HC138/MM74HC138 NA TI ON AL SEMICOND {LOGIC} 10E D | b S 0 H 2 2 National Semiconductor “ GQbSESE 0 | 6 * 7 - 2 / “S 'S ' MM54HC138/MM74HC138 3-to-8 Line Decoder G en eral Description This decoder utilizes advanced silicon-gate CMOS technol­ ogy, and is well suited to memory address decoding or data


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    PDF MM54HC138/MM74HC138 MM54HC138/MM74HC138 MM54HC130/MM74HC138

    74LS138P

    Abstract: M74LS138P 20-PIN pin diagram 14 demultiplexer 3DCX
    Text: DESCRIPTION The M 74LS138P is a consisting o f a 3 -b it s em ico n d u c to r b in a ry -o c ta l in teg rated c irc u it PIN CONFIGURATION TOP VIEW d e c o d e r/d e m u ltip le x e r w ith enable inputs. FEATURES • 3 classes o f enable in puts • 4 t o 1 6 d e c o rd e r/d e m u ltip le x e r fu n c tio n s are provid ed


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    PDF M74LS138P 0013Sbl 14-PIN 16-PIN 20-PIN 74LS138P pin diagram 14 demultiplexer 3DCX

    TTL 74ls138

    Abstract: No abstract text available
    Text: SANYO SEM ICONDUCTOR CORP 7 cH 7 a 7 b OOIOERM 57Ô « T S A J S3E ]> T- 6 7 - 2 \-SS MLC74HC138AM CMOS High-Speed Standard Logic 3 to 8-Line Decoder Features • The MLC74HC138AM is 3-to-8 decoders. •Uses CMOS silicon gate process technology to achieve operating speeds similar to LS - TTL 74LS138


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    PDF MLC74HC138AM MLC74HC138AM 74LS138) 54LS/74LS TTL 74ls138

    l381

    Abstract: and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138
    Text: y SP74SC138 DECODER/DEMULTIPLEXER PIN CONFIGURATION A FEATURES B • Designed for high performance memory decoders in microprocessor systems ■ 3 to 8 line decoders include 3 enable inputs ■ Pin com patible with 74LS138 ■ SPI CMOS technology ■ Full TTL interface capability


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    PDF SP74SC138 74LS138 SP74SC138 74LS138. 400//A l381 and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138

    and gate 74LS138

    Abstract: SP74HCT138N TTL 74ls138 74LS138 LOGIC OF 74LS138 pin for 74LS138 74LS138 pin configuration SP74HCT138 SP74HCT138J 74LS138 pin
    Text: SPI •jri- SP74HCT138 DECODER/DEMULTIPLEXER PIN CONFIGURATION A FEATURES B ■ Designed for high performance memory decoders in microprocessor systems ■ 3 to 8 line decoders include 3 enable inputs ■ Pin com patible with 74LS138 ■ SPI CM OS technology


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    PDF SP74HCT138 74LS138 SP74HCT138 74LS138. 20/iA and gate 74LS138 SP74HCT138N TTL 74ls138 74LS138 LOGIC OF 74LS138 pin for 74LS138 74LS138 pin configuration SP74HCT138J 74LS138 pin

    74LS324

    Abstract: 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74C923 equivalent Flip-Flop 7473 74LS324 equivalent 74C08 equivalent
    Text: N T E ELECTRONICS INC 17E H ^3125=1 G0G513S Q B - o S V. ! - TRANSISTOR-TRANSISTOR LOGIC INCLUDES SERIES 74C CMOS NTE TYPE NO. •DESCRIPTION . 7214 7400 74C00 74H00 74LS00 74S00 3-State Sel/Mlpx Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos Quad 2-Input Pos


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    PDF G0G513S 74C00 74H00 74LS00 74S00 74H01 74LS01 74C02 74LS02 74S02 74LS324 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74C923 equivalent Flip-Flop 7473 74LS324 equivalent 74C08 equivalent

    logos 4012B

    Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
    Text: L p i > « , * S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY S E M IC O N IN D E X E S L IM IT E D THE SEMICON INDEX SERIES CONSISTS OF VOLUME 1 TRANSISTOR INDEX VOLUME 2 DIODE & SCR INDEX


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    PDF TDA1510 TDA1510A logos 4012B 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485