AP2301D Search Results

AP2301D Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
AP2301D		BCD Semiconductor	1.5A DDR TERMINATION REGULATOR		Original	PDF

AP2301D Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: Preliminary Datasheet 1.5A DDR TERMINATION REGULATOR AP2301 General Description Features The AP2301 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 1.5A current continuously, offers enough	Original	AP2301 AP2301 SSTL-18 25VTT)	PDF
Untitled Abstract: No abstract text available Text: Preliminary Datasheet 1.5A DDR TERMINATION REGULATOR AP2301 General Description Features The AP2301 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 1.5A current continuously, providing	Original	AP2301 AP2301 SSTL-18 25VTT) S6-21-6485	PDF
AP2301D Abstract: 3987 AP2301 AP2301M SSTL-18 2525l 2301M Text: Preliminary Datasheet 1.5A DDR TERMINATION REGULATOR AP2301 General Description Features The AP2301 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 1.5A current continuously, offers enough	Original	AP2301 AP2301 SSTL-18 25VTT) AP2301D 3987 AP2301M 2525l 2301M	PDF
Untitled Abstract: No abstract text available Text: Product Brief 1.5A DDR TERMINATION REGULATOR AP2301 Description Benefits The AP2301 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 1.5A current continuously, providing enough current	Original	AP2301 AP2301 SSTL-18 AP2301D AP2301D-E1 AP2301DTR AP2301DTR-E1	PDF
Untitled Abstract: No abstract text available Text: Preliminary Datasheet 1.5A DDR TERMINATION REGULATOR AP2301 General Description Features The AP2301 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 1.5A current continuously, providing	Original	AP2301 AP2301 SSTL-18 25VTT) S6-21-6485	PDF