Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    BB209A Search Results

    SF Impression Pixel

    BB209A Price and Stock

    Eaton Electronics BB2-09 (ALTERNATE: BB2-09)

    A2, LP2, CB2 COVER 9 POLE | Eaton Electronics BB2-09
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    RS BB2-09 (ALTERNATE: BB2-09) Bulk 8 Weeks 500
    • 1 -
    • 10 -
    • 100 -
    • 1000 $1.698
    • 10000 $1.698
    		Get Quote

    BB209A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY7C1470BV33

    Abstract: No abstract text available
    Text: CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit CY7C1470BV33, CY7C1472BV33, CY7C1474BV33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1441AV25 CY7C1443AV25 CY7C1447AV25 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 2.5V core power supply • 2.5V/1.8V I/O power supply


    Original     		PDF CY7C1441AV25 CY7C1443AV25 CY7C1447AV25 36-Mbit 36/2M 18/512K 133-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 3.3V core power supply • 2.5V or 3.3V I/O power supply


    Original     		PDF CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 36-Mbit 36/2M 18/512K 133-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1480V33 CY7C1482V33 CY7C1486V33 PRELIMINARY 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200,167 MHz • Registered inputs and outputs for pipelined operation


    Original     		PDF CY7C1480V33 CY7C1482V33 CY7C1486V33 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz

    CY7C1461AV33

    Abstract: CY7C1463AV33 CY7C1465AV33 K1061 u946 B897
    Text: CY7C1461AV33 CY7C1463AV33 CY7C1465AV33 PRELIMINARY 36-Mbit 1M x 36/2 M x 18/512K x 72 Flow-Through SRAM with NoBL Architecture Features • JTAG boundary scan for BGA and fBGA packages • No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.


    Original     		PDF CY7C1461AV33 CY7C1463AV33 CY7C1465AV33 36-Mbit 18/512K 133-MHz 100-MHz CY7C1461AV33 CY7C1463AV33 CY7C1465AV33 K1061 u946 B897

    CY7C1480V33

    Abstract: CY7C1482V33 CY7C1486V33
    Text: CY7C1480V33 CY7C1482V33 CY7C1486V33 PRELIMINARY 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200,167 MHz • Registered inputs and outputs for pipelined operation


    Original     		PDF CY7C1480V33 CY7C1482V33 CY7C1486V33 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz CY7C1480V33 CY7C1482V33 CY7C1486V33

    CY7C1441AV33

    Abstract: CY7C1443AV33 CY7C1447AV33
    Text: CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 PRELIMINARY 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 3.3V –5% and +10% core power supply (VDD)


    Original     		PDF CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 36-Mbit 36/2M 18/512K 133-MHz CY7C1441AV33 CY7C1443AV33 CY7C1447AV33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1441AV25 CY7C1447AV25 36-Mbit 1 M x 36/512 K × 72 Flow-Through SRAM 36-Mbit (1 M × 36/512 K × 72) Flow-Through SRAM Features Functional Description • Supports 133 MHz bus operations ■ 1 M × 36/512 K × 72 common I/O ■ 2.5 V core power supply


    Original     		PDF CY7C1441AV25 CY7C1447AV25 36-Mbit CY7C1441AV25/CY7C1447AV25

    cy7c1470v25

    Abstract: No abstract text available
    Text: CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBLTM Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit CY7C1470V25/CY7C1472V25/CY7C1474V25

    CY7C1440AV33

    Abstract: CY7C1442AV33 CY7C1446AV33
    Text: CY7C1440AV33 CY7C1442AV33 CY7C1446AV33 36-Mbit 1 M x 36/2 M × 18/512 K × 72 Pipelined Sync SRAM 36-Mbit (1 M × 36/2 M × 18/512 K × 72) Pipelined Sync SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200 and 167 MHz


    Original     		PDF CY7C1440AV33 CY7C1442AV33 CY7C1446AV33 36-Mbit 250-MHz CY7C1440AV33 CY7C1442AV33 CY7C1446AV33

    CY7C1460AV25

    Abstract: CY7C1462AV25 CY7C1464AV25
    Text: CY7C1460AV25 CY7C1462AV25 CY7C1464AV25 36-Mbit 1 M x 36/2 M × 18/512 K × 72 Pipelined SRAM with NoBL Architecture 36-Mbit (1 M × 36/2 M × 18/512 K × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1460AV25 CY7C1462AV25 CY7C1464AV25 36-Mbit 250-MHz CY7C1460AV25 CY7C1462AV25 CY7C1464AV25

    Untitled

    Abstract: No abstract text available
    Text: CYF0018V CYF0036V CYF0072V 18/36/72-Mbit Programmable FIFOs 18/36/72-Mbit Programmable FIFOs Functional Description Features The Cypress programmable FIFO family offers the industry’s highest-density programmable FIFO memory device. It has independent read and write ports, which can be clocked up to


    Original     		PDF CYF0018V CYF0036V CYF0072V 18/36/72-Mbit

    L1131

    Abstract: CY7C1441AV25 CY7C1443AV25 CY7C1447AV25
    Text: CY7C1441AV25 CY7C1443AV25 CY7C1447AV25 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • 2.5V core power supply • 2.5V/1.8V I/O power supply


    Original     		PDF CY7C1441AV25 CY7C1443AV25 CY7C1447AV25 36-Mbit 36/2M 18/512K 133-MHz L1131 CY7C1441AV25 CY7C1443AV25 CY7C1447AV25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBLTM Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1470V25 CY7C1472V25 CY7C1474V25 72-Mbit 200-MHz CY7C1470V25/CY7C1472V25/CY7C1474V25

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    Untitled

    Abstract: No abstract text available
    Text: CYF0018V CYF0036V CYF0072V 18/36/72-Mbit Programmable FIFOs 18/36/72-Mbit Programmable FIFOs Features Functional Description • Memory organization ❐ Industry’s largest first in first out FIFO memory densities: 18-Mbit, 36-Mbit, and 72-Mbit ❐ Selectable memory organization: x 9, × 12, × 16, × 18, × 20,


    Original     		PDF CYF0018V CYF0036V CYF0072V 18/36/72-Mbit 18-Mbit, 36-Mbit, 72-Mbit 133-MHz

    Untitled

    Abstract: No abstract text available
    Text: CYF2018V CYF2036V CYF2072V 18/36/72-Mbit Programmable Multi-Queue FIFOs 18/36/72-Mbit Programmable Multi-Queue FIFOs Features Functional Description • Memory organization ❐ Industry’s largest first in first out FIFO memory densities: 18-Mbit, 36-Mbit and 72-Mbit


    Original     		PDF CYF2018V CYF2036V CYF2072V 18/36/72-Mbit

    Untitled

    Abstract: No abstract text available
    Text: CY7C1481V25 CY7C1483V25 CY7C1487V25 PRELIMINARY 72-Mbit 2M x 36/4M x 18/1M x 72 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations • 2M X 36/4M X 18/1M x72 common I/O • 2.5V core power supply (VDD) • 2.5V or 1.8V I/O supply (VDDQ)


    Original     		PDF CY7C1481V25 CY7C1483V25 CY7C1487V25 72-Mbit 36/4M 18/1M 133-MHz

    Untitled

    Abstract: No abstract text available
    Text: CYF1018V CYF1036V CYF1072V 18/36/72-Mbit Programmable 2-Queue FIFOs 18/36/72-Mbit Programmable 2-Queue FIFOs Features Functional Description • Memory organization ❐ Industry’s largest first in first out FIFO memory densities: 18-Mbit, 36-Mbit, 72-Mbit


    Original     		PDF CYF1018V CYF1036V CYF1072V 18/36/72-Mbit

    CY7C1440AV25

    Abstract: CY7C1442AV25 CY7C1446AV25
    Text: CY7C1440AV25 CY7C1442AV25 CY7C1446AV25 36-Mbit 1M x 36/2M x 18/512K x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation


    Original     		PDF CY7C1440AV25 CY7C1442AV25 CY7C1446AV25 36-Mbit 36/2M 18/512K 250-MHz CY7C1440AV25, CY7C1442AV25 CY7C1440AV25 CY7C1446AV25

    CY7C1441AV33

    Abstract: CY7C1443AV33 CY7C1447AV33
    Text: CY7C1441AV33 CY7C1443AV33,CY7C1447AV33 36-Mbit 1M x 36/2M x 18/512K x 72 Flow-Through SRAM Features Functional Description • Supports 133-MHz bus operations ■ 1M x 36/2M x 18/512K x 72 common IO ■ 3.3V core power supply ■ 2.5V or 3.3V IO power supply


    Original     		PDF CY7C1441AV33 CY7C1443AV33 CY7C1447AV33 36-Mbit 36/2M 18/512K 133-MHz CY7C1441AV33 CY7C1447AV33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1441AV33 36-Mbit 1 M x 36 Flow-Through SRAM 36-Mbit (1 M × 36) Flow-Through SRAM Features Functional Description • Supports 133-MHz bus operations ■ 1 M × 36 common I/O ■ 3.3 V core power supply ■ 2.5 V or 3.3 V I/O power supply ■ Fast clock-to-output times


    Original     		PDF CY7C1441AV33 36-Mbit CY7C1441AV33 133-MHz