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    Untitled

    Abstract: No abstract text available
    Text: Silicon Technology Reliability www.vishay.com Vishay Siliconix N-CHANNEL ACCELERATED OPERATING LIFE TEST RESULT Sample Size 18 368 Equivalent Device Hours 2 954 669 261 Failure Rate in FIT 2.505 Failure Rate in FIT is calculated according to JEDEC Standard JESD85, Methods for Calculating Failure Rates in Units of FITs,


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    JESD85, 23-Apr-12 PDF

    Untitled

    Abstract: No abstract text available
    Text: Silicon Technology Reliability Vishay Siliconix BCD-18 TECHNOLOGY ACCELERATED OPERATING LIFE TEST RESULT Sample Size Equivalent Device Hours Failure Rate in FIT 82 3 566 796 255.131 Failure Rate in FIT is calculated according to JEDEC standard JESD85, Methods for Calculating Failure Rates in Units of FITs,


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    BCD-18 JESD85, 18-Nov-10 PDF

    Untitled

    Abstract: No abstract text available
    Text: Silicon Technology Reliability www.vishay.com Vishay Siliconix P-CHANNEL ACCELERATED OPERATING LIFE TEST RESULT Sample Size 14 265 Equivalent Device Hours 2 779 173 437 Failure Rate in FIT 11.910 Failure Rate in FIT is calculated according to JEDEC Standard JESD85, Methods for Calculating Failure Rates in Units of FITs,


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    JESD85, 23-Apr-12 PDF

    Silicon Technology Reliability

    Abstract: silicon
    Text: Silicon Technology Reliability www.vishay.com Vishay Siliconix N-CHANNEL ACCELERATED OPERATING LIFE TEST RESULT Sample Size 232 395 Equivalent Device Hours 28 904 254 900 Failure Rate in FIT 1.073 Failure Rate in FIT is calculated according to JEDEC Standard JESD85, Methods for Calculating Failure Rates in Units of FITs,


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    JESD85, 23-Apr-12 Silicon Technology Reliability silicon PDF

    EB251

    Abstract: M68HC16 MC68HC16 DSA003655
    Text: Order this document by EB251/D Motorola Semiconductor Engineering Bulletin EB251 How to Calculate Instruction Times on the MC68HC16 By Sharon Darley Austin, Texas Introduction The M68HC16 Family CPU16 Reference Manual Rev. 2, Motorola document order number CPU16RM/AD, explains how to calculate


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    EB251/D EB251 MC68HC16 M68HC16 CPU16 CPU16RM/AD, EB251 MC68HC16 DSA003655 PDF

    Untitled

    Abstract: No abstract text available
    Text: Precision Digital Power Monitor ISL28022 Features The ISL28022 is a bi-directional high-side and low-side digital current sense and voltage monitor with serial interface. The device monitors current and voltage and provides the results digitally along with calculated power. The ISL28022 provides


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    ISL28022 ISL28022 16-bit 5m-1994. FN8386 PDF

    virtex 5 fpga based image processing

    Abstract: DSP48A DSP48A1 DSP48E DSP48E1 Xilinx ISE Design Suite XICSI
    Text: LogiCORE IP Image Characterization v1.1 DS727 September 21, 2010 Product Specification Introduction LogiCORE IP Facts Table The Xilinx Image Characterization LogiCORE IP calculates important statistical data for video input streams. The Image Characterization LogiCORE is an


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    DS727 1080p virtex 5 fpga based image processing DSP48A DSP48A1 DSP48E DSP48E1 Xilinx ISE Design Suite XICSI PDF

    ANIP9931E

    Abstract: Calculation of major IGBT operating parameters the calculation of the power dissipation for the IGBT IGBT JUNCTION TEMPERATURE CALCULATION calculation of the major IGBT operating calculation of IGBT parameter diode b2 SGP20N60
    Text: ANIP9931E Calculation of major IGBT operating parameters CALCULATION OF MAJOR IGBT OPERATING PARAMETERS This application note covers how to calculate major IGBT operating parameters - power dissipation; - continuous collector current; - total power losses;


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    ANIP9931E SGP20N60. SGP20N60 August-99 ANIP9931E Calculation of major IGBT operating parameters the calculation of the power dissipation for the IGBT IGBT JUNCTION TEMPERATURE CALCULATION calculation of the major IGBT operating calculation of IGBT parameter diode b2 PDF

    spectrum

    Abstract: No abstract text available
    Text: Post-Route Timing Analysis T We take you to the leaders. HDL VERIFICATION SPECIAL SECTION by Tom Hill, FPGA Relations Manager, Exemplar, tom.hill@ exemplar.com 38 he Xilinx Alliance Series place and route environment has built-in timing analysis that calculates actual delays for the chip and verifies timing.


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    mc1498

    Abstract: NE592 NE592 Application note constant k filter 8T20 dc coupled high frequency amplifier NE592 balanced modulator MC1496 MC1496 120MHz 10MHz filter AN141
    Text: INTEGRATED CIRCUITS AN141 Using the NE/SA592 video amplifier 1991 Dec Philips Semiconductors Philips Semiconductors Application note Using the NE/SA/SE592 video amplifier AN141 Since the stage gain is calculated by dividing the collector load impedance by the emitter impedance, the high impedance


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    AN141 NE/SA592 NE/SA/SE592 120MHz. MC1498 SL00835 100mV/DIV. mc1498 NE592 NE592 Application note constant k filter 8T20 dc coupled high frequency amplifier NE592 balanced modulator MC1496 MC1496 120MHz 10MHz filter AN141 PDF

    544C

    Abstract: ML4835
    Text: August 1999 Application Brief 42019 Calculating Frequency Setting Resistors when Using the ML4835 INTRODUCTION SOLVE FOR RSET This Application Brief describes a procedure that can be used to calculate the value of resistors used to set preheating, starting, and full power operating frequencies.


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    ML4835 50kHz 40kHz, ML4835 544C PDF

    AD5933 rev. c

    Abstract: AD5933 AD5933BRSZ-U1 INFRARED SENSOR
    Text: Preliminary Technical Data 1 MSPS 12-Bit Impedance Converter, Network Analyzer AD5933 point. The magnitude of the impedance and relative phase of the impedance at each frequency point along the sweep is easily calculated using the following equations: FEATURES


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    12-bit AD5933 equati40 16-Lead AD5933 AD5933 rev. c AD5933BRSZ-U1 INFRARED SENSOR PDF

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Technical Data 250 kSPS 12-Bit Impedance Converter, Network Analyzer AD5934 impedance at each frequency point along the sweep is easily calculated using the following equations: FEATURES 100 kHz max excitation output Impedance range 0.1 kΩ to 10 MΩ, 12-bit resolution


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    12-bit AD5934 RS-16) AD5934-U1 AD5934BRSZ-U11 AD5934BRSZ-U11 16-Lead PDF

    inhx32

    Abstract: PIC16F87X DS30292 PIC16C87X INHX8M DS33014 TB026 PIC16F87X programme datasheet PIC16C7X PIC16F87X PIC17CXXX
    Text: M TB026 Calculating Program Memory Checksums Using a PIC16F87X Author: Rodger Richey Microchip Technology Inc. INTRODUCTION Many applications require the microcontroller to calculate a checksum on the program memory to determine if the contents have been corrupted. Until now,


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    TB026 PIC16F87X PIC17CXXX PIC16F87X 14-bit PIC16C7X DS91026A-page inhx32 PIC16F87X DS30292 PIC16C87X INHX8M DS33014 TB026 PIC16F87X programme datasheet PDF

    ASR16

    Abstract: 16-bit dsp
    Text: INSTRUCTION TIMING A.6 INSTRUCTION TIMING This section describes how one can calculate the 16-bit DSP instruction timing manually using the tables provided in this section. Three complete examples are presented to illustrate the “layered” nature of the tables. Alternatively, the user can obtain the number of


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    16-bit subsequeA-15 ASR16 16-bit dsp PDF

    hyperlynx

    Abstract: Ever Ohms chip resistor AN-375 AN-433 RC32355 tcomp Signal Path Designer
    Text: Board Timing Adjustment Using Hyperlynx Software Application Note AN-433 By Harold Gomard Notes Background Because of ever higher clock frequencies, general board timings, such as setup and hold times, must be calculated more accurately than ever. When designing systems, this basic issue now requires more attention and more resources because timing margins have been significantly reduced.


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    AN-433 100MHz) hyperlynx Ever Ohms chip resistor AN-375 AN-433 RC32355 tcomp Signal Path Designer PDF

    ICS98ULPA877A

    Abstract: IDT74SSTUBF32868A IDTCSPUA877A Q22B
    Text: DATASHEET 28-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Description occurred on the open-drain QERR pin active low . The convention is even parity, i.e., valid parity is defined as an even number of ones across the DIMM-independent data inputs combined with the parity input bit. To calculate parity,


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    28-BIT cyc284 199707558G ICS98ULPA877A IDT74SSTUBF32868A IDTCSPUA877A Q22B PDF

    74als74

    Abstract: Theoretically Calculated Max Power Consumption
    Text: Section 2 – Circuit Characteristics Power Dissipation CPD values for CMOS devices are calculated by measuring the power consumption of a device at two different frequencies. CPD is calculated in the following manner: One advantage to using CMOS logic is its extremely low


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    Untitled

    Abstract: No abstract text available
    Text: Roxar subsea Sand monitor Non-intrusive acoustic detector Data Sheet Real time sand monitoring for oil, gas or multiphase pipelines The Roxar subsea Sand monitors are intelligent non-intrusive devices that utilize the acoustic noise produced by sand particles to calculate real-time


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    FA-S120F/050614 M-501, M-630, M-650 S31803) MR-0175 PDF

    7483 adder/subtractor

    Abstract: ic 7483 full adder ttl 7483 FULL ADDER of IC 7483 7483 full adder 7483 adder
    Text: Understanding MAX 5000 & Classic Timing January 1998, ver. 2 Introduction A pplication Note 78 Altera devices provide performance that is consistent from simulation to application. Before programming a device, you can determine the worstcase timing delays for any design. You can calculate propagation delays


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    Untitled

    Abstract: No abstract text available
    Text: Understanding FLEX 8000 Timing Introduction Altera devices provide predictable performance that is consistent from simulation to application. Before configuring a device, you can determine the worst-case timing delays for any design. You can calculate propagation delays either with the MAX+PLUS® II Timing Analyzer or


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    Untitled

    Abstract: No abstract text available
    Text: -5* NOTE 1. APPLICABLE STRANDED WI R E WI T H CALCULATED AREA 0 . 3 — 0 . 5mm2 AND OVERALL FINISHED DIAMETER 80 *5 0 d z i z - o - d o a at* 2. NO 3. ITEM 0 1. 4 — PLATING NAME ON AND 1• 4> 1 .7 ( A V S S THE 3-0. 1 . 4 — rf 1 . 2 . SHEARED QUANTITY


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    M47S65H4FA PDF

    MD3250

    Abstract: MD3250A MD3251 MD3251A MQ3251 MQ3261 m0325 M-0325 M03251
    Text: M D3250,A,AF,F, MQ3251 ,A ,A F ,F , MQ3251 continued T H E R M A L C O U P LIN G AND E F F E C T IV E T H E R M A L R E S IS T A N C E In m ultiple chip devices, coupling of heat between die occurs. The junction temperature can be calculated as follows:


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    MD3250 MQ3251 MD3251 MD3250' MD3251, MD3250A MD3251 MD3251A MQ3251 MQ3261 m0325 M-0325 M03251 PDF

    Untitled

    Abstract: No abstract text available
    Text: SAHA CARBON FILM RESISTORS CERAMIC CAPACITORS TANTALUM CAPACITORS Performance Characteristics ELECTRICAL 1.1 RESISTANCE TEMPERATURE COEFFICIENT FILM CAPACITORS This value calculated with the following relation shall remain within the values indicated. B ^ B fi-


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