93LC46
Abstract: 93LC46C 93LC56 93LC56C 93LC66 93LC66C 9786
Text: Not recommended for new designs – Please use 93LC46C, 93LC56C or 93LC66C. 93LC46/56/66 1K/2K/4K 2.5V Microwire Serial EEPROM Features: Package Types CS CLK 1 2 DI DO 3 8 7 VCC NU 6 4 5 ORG VSS NU VCC 1 2 8 7 ORG VSS CS CLK 3 6 DO DI ROTATED SOIC 93LC46X
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93LC46C,
93LC56C
93LC66C.
93LC46/56/66
93LC46X
93LC56X
93LC66X
93LC46
93LC56
93LC66
93LC46
93LC46C
93LC56
93LC66
93LC66C
9786
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SN0410
Abstract: 93LC76 93C76 93C86 93LC76C 93LC86C MS-001
Text: Not recommended for new designs – Please use 93LC76C or 93LC86C. 93C76/86 8K/16K 5.0V Microwire Serial EEPROM Features: PDIP Package CS 1 CLK DI DO 2 3 4 93C76/86 8 VCC 7 6 5 PE ORG VSS SOIC Package CS CLK DI DO 1 2 3 4 93C76/86 • Single 5.0V supply • Low-power CMOS technology
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93LC76C
93LC86C.
93C76/86
8K/16K
16-bit
93C76)
93C86)
SN0410
93LC76
93C76
93C86
93LC86C
MS-001
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37LV128
Abstract: 37LV36 37LV65 XC1700
Text: Obsolete Device 37LV36/65/128 36K, 64K, and 128K Serial EPROM Family FEATURES 8 VCC 7 VPP 6 CEO 4 5 VSS DATA 1 8 VCC CLK 2 7 VPP RESET/OE 3 6 CEO CE 4 5 VSS DATA 1 CLK 2 RESET/OE 3 CE SOIC 37LV36 37LV65 37LV128 PLCC Bits Programming Word 37LV36 36,288 1134 x 32
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37LV36/65/128
37LV36
37LV65
37LV128
37LV128
37LV36
37LV65
XC1700
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Untitled
Abstract: No abstract text available
Text: Obsolete Device 37LV36/65/128 36K, 64K, and 128K Serial EPROM Family FEATURES DATA 1 CLK 2 RESET/OE 3 CE 8 VCC 7 VPP 6 CEO 4 5 VSS DATA 1 8 VCC CLK 2 7 VPP RESET/OE 3 6 CEO CE 4 5 VSS SOIC 37LV36 37LV65 37LV128 PLCC Bits Programming Word 37LV36 36,288 1134 x 32
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37LV36/65/128
37LV36
37LV65
37LV128
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93AA66
Abstract: 93AA46 93AA46C 93AA56 93AA56C 93AA66C 56XT
Text: Not recommended for new designs – Please use 93AA46C, 93AA56C or 93AA66C. 93AA46/56/66 1K/2K/4K 1.8V Microwire Serial EEPROM Features: Package Types +70°C -40°C to +85°C 1 8 V CC CLK 2 7 NU DI 3 6 ORG DO 4 5 V SS CS 1 8 V CC CLK 2 7 NU DI 3 6 ORG DO 4
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93AA46C,
93AA56C
93AA66C.
93AA46/56/66
93AA46X
93AA56X
93AA66X
93AA46
93AA56
93AA66
93AA66
93AA46
93AA46C
93AA56
93AA66C
56XT
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DSX221S
Abstract: SiW3500 bluetooth Coexistence 3-wire OEN 46 1458 CLK32 l8838 bluetooth transmitter receiver parallel chip mobile
Text: SiW3500 Preliminary • Bluetooth specification V1.2 qualified including mandatory and optional functions such as AFH and eSCO. PLL Control ADDRESS BUS VDD_P VBB_OUT VCC_OUT VBATT_DIG VBATT_ANA XTAL_N CLK_REQ_IN XTAL_P/CLK CLK_REQ_OUT VTUNE • RF System on Chip SoC for
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SiW3500
18-micron
R00Irf
DSX221S
bluetooth Coexistence 3-wire
OEN 46
1458
CLK32
l8838
bluetooth transmitter receiver parallel chip mobile
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CQFP 240
Abstract: 8Kx32 ADSP-21060 16Kx32 ADSP21060 AD14060
Text: DIGITAL SIGNAL PROCESSING: FLOATING POINT MODEL MODEL MFLOPS MIPS CYLCE TIME nsec CLK IN MHZ PROGRAM RAM ROM DATA RAM CACHE SERIAL PORTS HOST PORT SISD Single Instruction Single Data NO NO NO NO +3.3V NO NO NO NO 64Kx32 64Kx32 64Kx32 64Kx32 64Kx32 64Kx32
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ADSP21020
ADSP21060
ADSP21060C
CQFP 240
8Kx32
ADSP-21060
16Kx32
AD14060
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Untitled
Abstract: No abstract text available
Text: CDCV857B, CDCV857BI 2.5-V PHASE-LOCK LOOP CLOCK DRIVER SCAS689 – FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz
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CDCV857B,
CDCV857BI
SCAS689
48-Pin
56-Ball
CDCV857BGQLR
CDCV857BIDGG
CDCV857BIDGGR
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CPU 6502
Abstract: K133 6502 CPU RESONATOR 4MHZ 6502C type pd21 009F NT6868C NT6868CH K131
Text: NT6868C Keyboard Controller Features n n n n n n Mask optional for built-in RC oscillator with an external resistor or external ceramic resonator applied n Mask optional for DATA/CLK driving capability n Watch-dog timer n Built-in power-on reset n Built-in low voltage reset
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NT6868C
NT6868C
CPU 6502
K133
6502 CPU
RESONATOR 4MHZ
6502C
type pd21
009F
NT6868CH
K131
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93AA76
Abstract: 93AA76C 93AA86 93AA86C MS-001 SN0410
Text: Not recommended for new designs – Please use 93AA76C or 93AA86C. 93AA76/86 8K/16K 1.8V Microwire Serial EEPROM Features: PDIP Package 1 CLK DI DO 2 3 4 8 VCC 7 6 5 PE ORG 93AA76/86 CS 93AA76/86 • Single supply operation down to 1.8V • Low-power CMOS technology:
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93AA76C
93AA86C.
93AA76/86
8K/16K
16-bit
93AA76)
93AA86)
93AA76
93AA86
93AA86C
MS-001
SN0410
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F5401
Abstract: io 1207 100MHZ 54-PIN F5402
Text: PRELIMINARY SPACE ELECTRONICS INC. 1 GIGABIT SYNCHRONOUS DRAM SPACE PRODUCTS VDD 1 97SD10004RP 54 VSS CS 7 NC VDDQ VSSQ CS 6 NC DQ0 DQ3 VSSQ VDDQ CS 5 NC CS 4 NC VDDQ VSSQ CS 3 NC DQ1 DQ2 VSSQ VDDQ CS 2 VDD VSS CS 1 NC/RFU WE DQM NC/A13 CAS CLK RAS CKE CS 0
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97SD10004RP
NC/A13
NC/A12
A10/AP
99Rev0
F5401
io 1207
100MHZ
54-PIN
F5402
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maa 502
Abstract: VT82C596B VT82C693 SUPER-7
Text: JEDEC PC133 Unbuffered DIMM Timing Margin Review March 3, 1999 Min a n d m a x lo a d s o f DRAM s ig n a ls • • • • • • CS CLK SRAS,SCAS,SWE,MA MD/DQM CKE Max 5 Loads 5 Loads 36 Loads 8 Loads 9 Loads Min 2 Loads 2 Loads 4 Loads 1 Load 4 Load DRAM Re a d Cycle s : DQs
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PC133
133MHz
VT82C596B
maa 502
VT82C596B
VT82C693
SUPER-7
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BBUF
Abstract: AO4A
Text: Macro Library Guide June 1998 Actel Corporation, Sunnyvale, CA 94086 1998 Actel Corporation. All rights reserved. Part Number: 5029009-2 June 1998 No part of this document may be copied or reproduced in any form or by any means without prior written consent of Actel.
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3200DX
Abstract: FCTD16C TA191 CNT4A AO11 TA273 dece2x4
Text: Macro Library Guide 1995 This document was created with FrameMaker 4.0.2 Actel Corporation, Sunnyvale, CA 94086 1995 Actel Corporation. All rights reserved. Part Number: 5029009-0 September 1995 No part of this document may be copied or reproduced in any form or by any means
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vhdl code for 8-bit signed adder
Abstract: 5 to 32 decoder using 38 decoder vhdl code one hot state machine
Text: Actel HDL Coding Style Guide Actel HDL Coding Style Guide Actel Corporation, Sunnyvale, CA 94086 1997 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5029105-0 Release: November 1997 No part of this document may be copied or reproduced in any form or by any
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8086 vhdl
Abstract: structural vhdl code for multiplexers vhdl coding R3216 3 to 8 line decoder vhdl IEEE format vhdl code 2 to 4 line decoder vhdl IEEE format verilog code 12 bit one hot state machine 8 bit carry select adder verilog code
Text: Actel HDL Coding Style Guide Actel Corporation, Mountain View, CA 94043 2009 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5029105-8 Release: July 2009 No part of this document may be copied or reproduced in any form or by any means without prior written
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Untitled
Abstract: No abstract text available
Text: Actel HDL Coding Style Guide Windows ® and Unix ® Environments Actel Corporation, Sunnyvale, CA 94086 2001 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5029105-6 Release: June 2002 No part of this document may be copied or reproduced in any form or by any
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HP700
Abstract: 1N201 SIGNAL PATH designer
Text: Synopsys VSS Simulation Guide for the SunTM and HP700TM Environment Actel Corporation, Sunnyvale, CA 94086 1995 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5029077-0 Release: October 1995 No part of this document may be copied or reproduced in any form or by any
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HP700TM
HP700
1N201
SIGNAL PATH designer
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HP700
Abstract: verilog code for 8 bit carry look ahead adder carry save adder verilog program catalogue book
Text: Synopsys Synthesis tm Methodology Guide for the UnixTM Workstations Environments Actel Corporation, Sunnyvale, CA 94086 1995 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5029076-0 Release: October 1995 No part of this document may be copied or reproduced in any form or by any
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verilog code of 8 bit comparator
Abstract: verilog code of 16 bit comparator verilog code of 2 bit comparator verilog code for timer HP700 verilog code finite state machine uPD 1719 G
Text: Verilog Simulation Guide for the PC WindowsTM and UnixTM Workstation Environments Actel Corporation, Sunnyvale, CA 94086 1995Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5029078-0 Release: October 1995 No part of this document may be copied or reproduced in any form or by any
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1995Actel
verilog code of 8 bit comparator
verilog code of 16 bit comparator
verilog code of 2 bit comparator
verilog code for timer
HP700
verilog code finite state machine
uPD 1719 G
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vhdl code for a updown counter for FPGA
Abstract: vhdl led palasm palasm user vhdl code for traffic light control HP700 PAL16R4 traffic light using VHDL vhdl code for full subtractor using logic equations vhdl code for counter value to display on multiplexed seven segment
Text: ACTmap VHDL Synthesis Methodology Guide Windows & UNIX® Environments Actel Corporation, Sunnyvale, CA 94086 1996 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 5029002-0 Release: June 1996 No part of this document may be copied or reproduced in any form or by any
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Untitled
Abstract: No abstract text available
Text: HD74ALVCH16820 Preliminary 3.3-V 10-bit Flip Flops with Dual Outputs Description The flip flops of the HD74ALVCH16820 are edge triggered D-type flip flops. On the positive transition of the clock CLK input, the device provides true data at the Q outputs. A buffered output enable (OE) input
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HD74ALVCH16820
10-bit
HD74ALVCH16820
HiDt4ALVCH16820
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PDF
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Untitled
Abstract: No abstract text available
Text: 16M SDRAM TIMING LG Semicon Timing Waveforms BankO Active BankO Préchargé BankO Read B urst length = 4 BankO A ccess H i = V ih o r V», 495 16M SDRAM TIMING L6 Semicon Timing Waveforms Write Cycle tCK KM tc k l •* in t' CLK tKC CKE V ih* tRP tRAS ÎRCD
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Untitled
Abstract: No abstract text available
Text: USH5022 HIGH VOLTAGE 8-CHANNEL ANALOG SWITCH Universa! Semiconductor FEATURES GENERAL DESCRIPTION Full D ielectric Isolation fo r High Reliability 6 0 dB typ ica l O u tp u t O ff Isolation at 10 Mhz The U SH 5022 is an 8-channel high voltage analog s w itc h
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USH5022
13bfl341
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