CQ 945
Abstract: CQ12B CQ22B CD50A HP4192A ISO-14001 TS-16949 2x70mH
Text: CD & CQ Series CM Interface Chokes for Data and Signal Lines Features • High attenuation over a wide frequency range • Low interwinding and coupling capacitance • Wide inductance range • Excellent quality at extremely competitive price due to high volume production
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ISO-9001
TS-16949
ISO-14001
J-STD-020C
42Vac
50/60Hz)
80Vdc
IEC68-1
CQ 945
CQ12B
CQ22B
CD50A
HP4192A
2x70mH
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PDF
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Untitled
Abstract: No abstract text available
Text: Systems in Silicon Contact Information: Wind River Systems, Inc. Corporate Headquarters, 510-748-4100 or 800-545-WIND 1010 Atlantic Avenue Alameda, California 94501 FAX: 510 749-2010 E-mail: [email protected] URL: www.wrs.com AMD Embedded Processor Division, FusionE86 Support
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800-545-WIND
FusionE86
UTQ31)
15RYce2\TW!
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PDF
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DIODE CQ
Abstract: PE26C31 PE926C31 PE926C31-01 PE926C31-21 PE926C31-EK
Text: Product Specification PE926C31 Product Description The PE926C31 is a high performance monolithic CMOS RS-422 line driver. Its operating supply range is 3.0 to 3.6 V, with an output signal overvoltage range of 0 – 6 V. The PE26C31 offers higher speed and lower power than other
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PE926C31
PE926C31
RS-422
PE26C31
DIODE CQ
PE926C31-01
PE926C31-21
PE926C31-EK
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1410BV18, CY7C1425BV18 CY7C1412BV18, CY7C1414BV18 36-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■
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CY7C1410BV18,
CY7C1425BV18
CY7C1412BV18,
CY7C1414BV18
36-Mbit
CY7C1410BV18
CY7C1425BV18
CY7C1412BV18
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8342Q08/09/18/36BD-357/333/300/250 357 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface
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Original
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GS8342Q08/09/18/36BD-357/333/300/250
165-Bump
165-bump,
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8342Q08/09/18/36BD-357/333/300/250 357 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface
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Original
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GS8342Q08/09/18/36BD-357/333/300/250
165-Bump
165-bump,
GS8342Q36BD-300T.
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8342Q08/09/18/36BD-357/333/300/250 357 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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GS8342Q08/09/18/36BD-357/333/300/250
165-Bump
165-bump,
GS8342Q36BD-300T.
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8342Q08/09/18/36BD-357/333/300/250 357 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface
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Original
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GS8342Q08/09/18/36BD-357/333/300/250
165-Bump
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8342Q08/09/18/36BD-357/333/300/250 357 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface
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Original
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GS8342Q08/09/18/36BD-357/333/300/250
165-Bump
165-bump,
Scheme2Q36BD-300T.
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8342Q08/09/18/36BD-357/333/300/250 357 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface
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Original
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GS8342Q08/09/18/36BD-357/333/300/250
165-Bump
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PDF
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GS8182Q18BGD-200
Abstract: No abstract text available
Text: GS8182Q08/09/18/36BD-333/300/250/200/167/133 18Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–133 167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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182Q08/09/18/36BD-333/300/250/200/167/133
165-Bump
144Mb
165-bump,
165-BGA
GS8182Q18BGD-200
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PDF
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GS8182Q08BD-200
Abstract: GS8182Q09BGD-200 GS818 GS8182Q18BGD-250 GS8182Q36BD-250 GS8182Q08BD-133 GS8182Q08BD-167 GS8182Q08BD-250 GS8182Q09BD-250 GS8182Q09BGD-167
Text: GS8182Q08/09/18/36BD-333/300/250/200/167/133 18Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–133 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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182Q08/09/18/36BD-333/300/250/200/167/133
165-Bump
144Mb
165-bump,
165-BGA
GS8182Q08BD-200
GS8182Q09BGD-200
GS818
GS8182Q18BGD-250
GS8182Q36BD-250
GS8182Q08BD-133
GS8182Q08BD-167
GS8182Q08BD-250
GS8182Q09BD-250
GS8182Q09BGD-167
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8182Q08/09/18/36BD-333/300/250/200/167/133 18Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–133 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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182Q08/09/18/36BD-333/300/250/200/167/133
165-Bump
144Mb
165-bump,
133test
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8182Q08/09/18/36BD-333/300/250/200/167/133 18Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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182Q08/09/18/36BD-333/300/250/200/167/133
165-Bump
144Mb
165-bump,
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PDF
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|
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Untitled
Abstract: No abstract text available
Text: GS8182Q08/09/18/36BD-333/300/250/200/167/133 18Mb SigmaQuad-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–133 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface
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182Q08/09/18/36BD-333/300/250/200/167/133
165-Bump
36rawing
165-BGA
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8662DT06/11/20/38BD-450M 165-Bump BGA Military Temp 450 MHz 1.8 V VDD 1.8 V or 1.5 V I/O 72Mb SigmaQuad-II+TM Burst of 4 SRAM Features • Military Temperature Range • 2.5 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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GS8662DT06/11/20/38BD-450M
165-Bump
165-bump,
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8662D06/11/20/38BD-450M 165-Bump BGA Military Temp 450 MHz 1.8 V VDD 1.8 V or 1.5 V I/O 72Mb SigmaQuad-II+TM Burst of 4 SRAM Features • Military Temperature Range • 2.5 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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GS8662D06/11/20/38BD-450M
165-Bump
165-bump,
GS8662D11BD-450M
GS8662D20BD-450M
GS8662D38BD-450M
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8342QT07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342QT07/10/19/37BD-357/333/300/250/200
165-Bump
GS8342QT37BGD-200I
GS8342QTxxBD-300T.
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PDF
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GS8342Q10BD-357
Abstract: GS8342Q37BD-200I 8342Q07101937B
Text: GS8342Q07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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Original
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GS8342Q07/10/19/37BD-357/333/300/250/200
165-Bump
165-bump,
GS8342QxxBD-300T.
GS8342Q10BD-357
GS8342Q37BD-200I
8342Q07101937B
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8342QT07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342QT07/10/19/37BD-357/333/300/250/200
165-Bump
165-bump,
GS8342QTxxBD-300T.
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PDF
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AN1021
Abstract: No abstract text available
Text: Preliminary GS8342Q07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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GS8342Q07/10/19/37BD-357/333/300/250/200
165-Bump
165-bump,
GS8342Q37BGD-200I
GS8342QxxBD-300T.
AN1021
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8342Q07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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Original
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GS8342Q07/10/19/37BD-357/333/300/250/200
165-Bump
D-200I
GS8342QxxBD-300T.
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PDF
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Untitled
Abstract: No abstract text available
Text: GS8342T06/11/20/38BD-550/500/450/400/350 36Mb SigmaDDRTM-II+ Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.5 Clock Latency • Simultaneous Read and Write SigmaDDRTM Interface • JEDEC-standard pinout and package • Double Data Rate interface
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GS8342T06/11/20/38BD-550/500/450/400/350
165-Bump
165-bump,
GS8342T38BD-400T.
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PDF
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lm1m8crh
Abstract: QML-38535 lm1m8crh-v25x 9IY2 5962-96877 5962h96877
Text: REVISIONS LTR DESCRIPTION A DATE Added device types 02-06 and case outline “Y " . Dimensional changes to case outline "X". Changes to C i^ and Cq l j t - " APPROVED y r - m o - d a 98-03-16 Raymond Monnin REV SHEET REV A A A A A A A A A A A A SHEET 15
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OCR Scan
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RADIATION-HARDENTRH-V25X
LM1M8TRH-Q25Y
LM1M8TRH-V25Y
T00H70Ã
lm1m8crh
QML-38535
lm1m8crh-v25x
9IY2
5962-96877
5962h96877
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PDF
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