Untitled
Abstract: No abstract text available
Text: THIS SPEC IS OBSOLETE Spec No: 38-05548 Spec Title: CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/ CY7C1387FV25 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Sunset Owner: N Vijay Kumar (VKN) Replaced by: None CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25
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Original
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CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/
CY7C1387FV25
18-Mbit
36/1M
CY7C1386DV25,
CY7C1386FV25
CY7C1387DV25,
CY7C1387FV25
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description [1] Features • Supports bus operation up to 250 MHz The CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/ CY7C1387FV25 SRAM integrates 512K x 36 and 1M x 18
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Original
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CY7C1386DV25,
CY7C1386FV25
CY7C1387DV25,
CY7C1387FV25
18-Mbit
36/1M
CY7C1386DV25/CY7C1387DV25
CY7C1387FV25
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PDF
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AN1064
Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
Text: CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit 512K x 36/1 Mbit x 18 Pipelined DCD Sync SRAM Functional Description [1] Features • Supports bus operation up to 250 MHz The CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F SRAM integrates 512K x 36/1M x 18 SRAM cells with
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Original
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CY7C1386D,
CY7C1386F
CY7C1387D,
CY7C1387F
18-Mbit
CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F
36/1M
CY7C1386F
AN1064
CY7C1386D
CY7C1387D
CY7C1387F
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PDF
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AN1064
Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
Text: CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit 512 K x 36/1-Mbit × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1-Mbit × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200, and 167 MHz
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Original
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CY7C1386D,
CY7C1386F
CY7C1387D,
CY7C1387F
18-Mbit
36/1-Mbit
CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F
AN1064
CY7C1386D
CY7C1386F
CY7C1387D
CY7C1387F
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PDF
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AN1064
Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
Text: CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit 512K x 36/1 Mbit x 18 Pipelined DCD Sync SRAM Functional Description [1] Features • Supports bus operation up to 250 MHz The CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F SRAM integrates 512K x 36/1M x 18 SRAM cells with
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Original
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CY7C1386D,
CY7C1386F
CY7C1387D,
CY7C1387F
18-Mbit
CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F
36/1M
CY7C1386F
AN1064
CY7C1386D
CY7C1387D
CY7C1387F
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PDF
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AN1064
Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
Text: CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 250 MHz The CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F
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Original
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CY7C1386D,
CY7C1386F
CY7C1387D,
CY7C1387F
18-Mbit
CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F
AN1064
CY7C1386D
CY7C1386F
CY7C1387D
CY7C1387F
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PDF
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AN1064
Abstract: CY7C1386DV25 CY7C1386FV25 CY7C1387DV25 CY7C1387FV25
Text: CY7C1386DV25, CY7C1386FV25 CY7C1387DV25, CY7C1387FV25 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description [1] Features • Supports bus operation up to 250 MHz The CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/ CY7C1387FV25 SRAM integrates 512K x 36 and 1M x 18
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Original
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CY7C1386DV25,
CY7C1386FV25
CY7C1387DV25,
CY7C1387FV25
18-Mbit
36/1M
CY7C1386DV25/CY7C1387DV25/CY7C1386FV25/
CY7C1387FV25
CY7C1386FV25
AN1064
CY7C1386DV25
CY7C1387DV25
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PDF
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AN1064
Abstract: CY7C1386F CY7C1387F
Text: CY7C1386D/CY7C1386F CY7C1387D/CY7C1387F 18-Mbit 512K x 36/1 Mbit x 18 Pipelined DCD Sync SRAM Features Functional Description • Supports Bus Operation up to 250 MHz The CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F SRAM[1] integrates 512K x 36/1M x 18 SRAM cells with
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Original
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CY7C1386D/CY7C1386F
CY7C1387D/CY7C1387F
18-Mbit
CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F
36/1M
AN1064
CY7C1386F
CY7C1387F
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■
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Original
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CY7C1386D
CY7C1387D
18-Mbit
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■
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Original
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CY7C1386D
CY7C1387D
18-Mbit
CY7C1386D/CY7C1387D
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■
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Original
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CY7C1386D
CY7C1387D
18-Mbit
CY7C1386D/CY7C1387D
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■
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Original
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CY7C1386D
CY7C1387D
18-Mbit
CY7C1386D/CY7C1387D
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7C1386D CY7C1387D 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades are 200, and 167 MHz ■
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Original
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CY7C1386D
CY7C1387D
18-Mbit
CY7C1386D/CY7C1387D
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PDF
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