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CY7C2170KV18 Price and Stock

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Infineon Technologies AG CY7C2170KV18-400BZC IC SRAM 18MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C2170KV18-400BZC	Tray				1 - 10 - 100 - 1000 - 10000 -	Buy Now
Rochester Electronics LLC CY7C2170KV18-400BZC IC SRAM 18MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C2170KV18-400BZC	Tray			8	1 - 10 $39.82 100 $39.82 1000 $39.82 10000 $39.82	Buy Now
Flip Electronics CY7C2170KV18-400BZXC IC SRAM 18MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C2170KV18-400BZXC	Tray			20	1 - 10 - 100 $31.49 1000 $31.49 10000 $31.49	Buy Now
Rochester Electronics LLC CY7C2170KV18-400BZXC IC SRAM 18MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C2170KV18-400BZXC	Bulk			8	1 - 10 $39.08 100 $39.08 1000 $39.08 10000 $39.08	Buy Now
Infineon Technologies AG CY7C2170KV18-400BZXC IC SRAM 18MBIT PARALLEL 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C2170KV18-400BZXC	Tray			680	1 - 10 - 100 - 1000 $36.37047 10000 $36.37047	Buy Now
Avnet Americas	CY7C2170KV18-400BZXC	Tray		0 Weeks, 2 Days	22	1 - 10 - 100 $33.054 1000 $31.1652 10000 $31.1652	Buy Now

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CY7C2170KV18 Datasheets (3)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
CY7C2170KV18-400BZC		Cypress Semiconductor	Integrated Circuits (ICs) - Memory - IC SRAM 18M PARALLEL 165FBGA		Original	PDF
CY7C2170KV18-400BZXC		Cypress Semiconductor	Integrated Circuits (ICs) - Memory - IC SRAM 18M PARALLEL 165FBGA		Original	PDF
CY7C2170KV18-550BZXC		Cypress Semiconductor	Integrated Circuits (ICs) - Memory - IC SRAM 18M PARALLEL 165FBGA		Original	PDF

CY7C2170KV18 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: CY7C2168KV18/CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (1 M x 18, 512 K × 36)	Original	CY7C2168KV18/CY7C2170KV18 18-Mbit 550-MHz CY7C2168KV18 CY7C2170KV18	PDF
3M Touch Systems Abstract: No abstract text available Text: CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (1 M x 18, 512 K × 36)	Original	CY7C2168KV18, CY7C2170KV18 18-Mbit CY7C2168KV18 550-MHz 3M Touch Systems	PDF
Untitled Abstract: No abstract text available Text: CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (1 M x 18, 512 K × 36)	Original	CY7C2168KV18, CY7C2170KV18 18-Mbit 550-MHz CY7C2168KV18	PDF
3M Touch Systems Abstract: No abstract text available Text: CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT Features Configurations • 18 Mbit density (2 M x 8, 2 M x 9, 1 M x 18, 512 K x 36) With Read Cycle Latency of 2.5 cycles:	Original	CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit 550-MHz CY7C2166KV18 3M Touch Systems	PDF
CY7C2168KV18 Abstract: CY7C2170KV18 3M Touch Systems Text: CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (1 M x 18, 512 K × 36)	Original	CY7C2168KV18, CY7C2170KV18 18-Mbit CY7C2168KV18 550-MHz CY7C2168KV18 CY7C2170KV18 3M Touch Systems	PDF
3M Touch Systems Abstract: No abstract text available Text: CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture 2.5 Cycle Read Latency with ODT 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features Configurations • 18-Mbit density (2 M x 8, 2 M × 9, 1 M × 18, 512 K × 36)	Original	CY7C2166KV18, CY7C2177KV18 CY7C2168KV18, CY7C2170KV18 18-Mbit CY7C2166KV18 CY7C2177KV18 CY7C2168KV18 3M Touch Systems	PDF