TAA 611 T12
Abstract: x48 chipset IDT72T6360 IDT72T6480 D25N3
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
BB324)
72T6480
drw45
TAA 611 T12
x48 chipset
IDT72T6360
IDT72T6480
D25N3
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PDF
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Untitled
Abstract: No abstract text available
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
BB324)
72T6360
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PDF
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Untitled
Abstract: No abstract text available
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
BB324)
72T6480
drw45
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PDF
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TAA 611 T12
Abstract: 72T6480 BA1-B11 d25n3 BA0-C11 k4h561638f A11-C10 q35t Q35T1 A7D9
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
drw44
BB324)
72T6480
drw45
TAA 611 T12
72T6480
BA1-B11
d25n3
BA0-C11
k4h561638f
A11-C10
q35t
Q35T1
A7D9
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PDF
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72T6480
Abstract: dsc-6358 IDT72T6360 IDT72T6480 D2312
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
133MHz
IDT72T6480
x48in
x48out
x24out
x12out
72T6480
dsc-6358
IDT72T6360
IDT72T6480
D2312
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PDF
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IDT72T6360
Abstract: IDT72T6480 2x16Mb
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
BB324)
72T6360
IDT72T6360
IDT72T6480
2x16Mb
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PDF
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72T63
Abstract: No abstract text available
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
BB324)
72T6360
72T63
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PDF
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72T63
Abstract: No abstract text available
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
166MHz
IDT72T6360
x36in
x36out
x18out
x18in
72T63
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PDF
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Untitled
Abstract: No abstract text available
Text: MICRON SEMICONDUCTOR INC b7E ]> • blllS^H DOQTSTb 122 ■ MRN ADVANCE MICRON 64K MT58LC64K18A6 18 SYNCHRONOUS SRAM 64K x 18 SRAM +3.3V SUPPLY, FULLY REGISTERED I/O AND LINEAR BURST COUNTER FEATURES • • • • • « • • • • • • • Fast access times: 7,10,12 and 15ns
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OCR Scan
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MT58LC64K18A6
MT58LC64K18A6EJ-10
MT56LC64K18A6
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PDF
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Untitled
Abstract: No abstract text available
Text: ML *««93 ADVANCE MICRON I 64K SEMICONDUCTOR. MC SYNCHRONOUS SRAM X MT58LC64K18C4 18 SYNCHRONOUS SRAM 6 4 K x 18 SRAM +3.3V SUPPLY, FULLY REGISTERED INPUTS AND OUTPUTS AND BURST COUNTER FEATURES • • • • • • • • • • • • • Fast access times: 7 ,1 0 ,1 2 and 15ns
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OCR Scan
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MT58LC64K18C4
486/Pentium
MT58LC64K18C4EJ-10
LC64K16C4
C1993.
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PDF
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Untitled
Abstract: No abstract text available
Text: H Y 6 7 V 1 8 1 1 0 /1 1 1 64K X 18 Bit SYNCHRONOUS CMOS SRAM -HYUNDAI PRELIMINARY DESCRIPTION This device integrates high-speed 64K x18 SRAM core, address registers, data input registers, a 2-bit burst ad dress counter and Non-pipelined output. All synchronous inputs pass through registers controlled by a positiveedge triggered clock K .
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OCR Scan
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486/Pentium
20ns/25ns/30ns
40MHz
00DbP77
1DH04-11-MAY95
HY67V18110/111
HY67V18110C
HY67V18111C
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PDF
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ida5
Abstract: No abstract text available
Text: KM418C256B CMOS DRAM 256K x 18 Bit CM OS Dynamic RAM with Fast Page Mode DESCRIPTION This is a family of 262,144 x 18 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Access time -6, -7 or -8 , power consumption (Normal
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OCR Scan
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KM418C256B
256Kx18
ida5
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PDF
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Untitled
Abstract: No abstract text available
Text: S G S -T H O M S O N D M a iC T G S tM O ! M 2 8 F 1 0 2 1 Megabit 64K x 16, Chip Erase FLASH MEMORY • FAST ACCESS TIME: 90ns ■ LOW POWER CONSUMPTION - Standby Current: 1OOpA Max ■ 10,000 ERASE/PROGRAM CYCLES ■ 12V PROGRAMMING VOLTAGE ■ TYPICAL BYTE PROGRAMMING TIME 10[is
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OCR Scan
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PLCC44
TSOP40
PLCC44
M28F102
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PDF
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Untitled
Abstract: No abstract text available
Text: JUL S 9 1983 ADVANCE llilll— p n M I MT58LC64K18A6 64Kx 18 SYNCHRONOUS SRAM SYNCHRONOUS 64K x 18 SRAM g n r tlV I + 3 -3V SUPPLY, FULLY REGISTERED I/O AND LINEAR BURST COUNTER QR AM FEATURES • • • • • • • • • • • • • Fast access times: 7,10,12 and 15ns
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OCR Scan
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MT58LC64K18A6
MT58LC64K18A6EJ-10
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PDF
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Untitled
Abstract: No abstract text available
Text: SGS-THOMSON M27V402 R f f lD ^ [ llL liO T IjîO ll i LOW VOLTAGE _ 4 Megabit 256K x 16 UV EPROM and OTP EPROM PRELIMINARY DATA • LOW VOLTAGE READ OPERATION: 3V to 5.5V ■ FAST ACCESS TIME: 120ns ■ LOW POW ER ’’CMOS” CONSUMPTION:
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OCR Scan
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M27V402
120ns
24sec.
M27V402
M27C4002
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PDF
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Untitled
Abstract: No abstract text available
Text: unir n «i nim ii i mui i iiiij.j.m u i.HHiHnj; MICRON TECHNOLOGY INC b lllS H T 3flE D QG0SÖ73 S • MRN ADVANCE T 'H L -2Z - H 16K x 16 SRAM SRAM WITH A D D R E SS / DATA INPUT LATCHES a FEATURES • • • • • • • • • PIN A SSIG N M EN T Top View)
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OCR Scan
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T-46-23-14
00G20Ã
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PDF
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Untitled
Abstract: No abstract text available
Text: MICRON TECHNOLOGY INC 7 36E D • b l l l S M 11! 0 0 0 2 ^ 2 1 , pi h i i in11 jjgiy iip.j“1v .ut*. w j' i. w - mT Wjgri 1 HHRN ADVANCE 11 7 = V 6 > 2 3 -W 16K X 18 SRAM SYNCHRONOUS SRAM W ITH CLOCKED, REGISTERED INPUTS >V >.-. < FEATURES • • • •
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OCR Scan
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PDF
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M29F800A3BT12
Abstract: M29F800A3BR10 M29F800A3BR80
Text: Order this document by M29F800A3/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA M29F800A3 8M CMOS Flash Memory The M29F800A3 is a 3.3 V high speed 8,388,608-bit CMOS Boot Block Flash Memory suitable for use in systems such as mobile, personal computing, and communication products.
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OCR Scan
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M29F800A3/D
M29F800A3
608-bit
48-pin
M29F800A3C
RMFAX09email
M29F800A3BT12
M29F800A3BR10
M29F800A3BR80
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PDF
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diagram power supply LG 32 lh 35 fr
Abstract: No abstract text available
Text: ADVANCE M IC R O N MT58LC64K18B2 6 4 K x 18 SYNCHRONOUS SRAM I SYNCHRONOUS SRAM 64Kx 18 SRAM +3.3V SUPPLY WITH CLOCKED, REGISTERED INPUTS AND BURST COUNTER FEATURES • • • • • • • • • • • • Fast access times: 9 ,1 0 ,1 2 and 17ns Fast OE: 5 ,6 and 7ns
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OCR Scan
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MT58LC64K18B2
52-Pin
DQ12A3.
MT58LC64K18B2EJ-12
C64KI8
diagram power supply LG 32 lh 35 fr
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PDF
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Untitled
Abstract: No abstract text available
Text: M I CR ON T E C H N O L O G Y INC 3 SE » • bill 5 4*1 ODDEflfl? S ■ M R N ? = V á ~ 2 l-l¿ J 16K X 18 SRAM SRAM WITH ADDRESS / DATA INPUT LATCHES FEATURES • • • • • • Fast access times: 15,17,20 and 25ns Fast output enable: 6,8 and 10ns
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OCR Scan
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52-pin
T-46-23-14
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PDF
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Untitled
Abstract: No abstract text available
Text: • h ÉidMiuiilBHááttaSflÉ BflE D MICRON TECHNOLOGY INC b llIS H T G G O E Tll =i ■ MRN ADVANCE ÉtaB*6â*ù^ÂeeÂfcâi - uMMüff T4C-2Z-/< 16K X 16 SRAM SYNCHRONOUS SRAM W ITH CLOCKED, REGISTERED INPUTS FEATURES • • • • OPTIONS MARKING « Timing
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OCR Scan
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DQ12C
DQ13C
DQ14C
52-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: H Y 5 1 V 1 6 1 6 0 B “H Y U N D A I S e r ie s 1M x 16-bit CMOS DRAM with 2ÜÄ5 DESCRIPTION The HY51V16160B is the new generation and fast dynamic RAM organized 1,048,576 x 16-bit. The HY51V16160B utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques
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OCR Scan
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16-bit
HY51V16160B
16-bit.
42/42pin
11B3S
0083P31Q
GDG47SÃ
1AD55-10-MAY95
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PDF
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Untitled
Abstract: No abstract text available
Text: 28F016SV 16-MBIT 1 MBIT x 16,2 MBIT x 8 FlashFileTM MEMORY • SmartVoltage Technology — User-Selectable 3.3V or 5V Vcc — User-Selectable 5V or 12V Vpp ■ 65 ns Access Time ■ 1 Million Erase Cycles per Block ■ 30.8 MB/sec Burst Write Transfer Rate
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OCR Scan
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28F016SV
16-MBIT
56-Lead
28F016SA,
28F008SA
28F008SA
E28F016SV
E28F106SV
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PDF
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Untitled
Abstract: No abstract text available
Text: •HYUNDAI H Y 6 7 1 6 1 1 0 /1 1 1 64K X 16 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64Kx16 SRAM core, address registers, data input registers, a 2-bit burst address counter and Non-pipelined output. All synchronous inputs pass through registers controlled by a
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OCR Scan
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64Kx16
486/Pentium
15ns/20ns/25ns
67MHz
1DH07-11-MAY95
HY6716110/111
HY6716110C
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PDF
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