TAA 611 T12
Abstract: x48 chipset IDT72T6360 IDT72T6480 D25N3
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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128Mb
256Mb
BB324)
72T6480
drw45
TAA 611 T12
x48 chipset
IDT72T6360
IDT72T6480
D25N3
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PDF
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Untitled
Abstract: No abstract text available
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 36 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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128Mb
256Mb
BB324)
72T6360
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PDF
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Untitled
Abstract: No abstract text available
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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128Mb
256Mb
BB324)
72T6480
drw45
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PDF
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TAA 611 T12
Abstract: 72T6480 BA1-B11 d25n3 BA0-C11 k4h561638f A11-C10 q35t Q35T1 A7D9
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
drw44
BB324)
72T6480
drw45
TAA 611 T12
72T6480
BA1-B11
d25n3
BA0-C11
k4h561638f
A11-C10
q35t
Q35T1
A7D9
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PDF
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72T6480
Abstract: dsc-6358 IDT72T6360 IDT72T6480 D2312
Text: 2.5V SEQUENTIAL FLOW-CONTROL DEVICE 48 BIT WIDE CONFIGURATION For use with 128Mb to 256Mb DDR SDRAM FEATURES • IDT Standard mode or FWFT mode of operation • Empty and full flags for monitoring memory status • Programmable Almost-Empty and Almost-Full flags, each flag
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Original
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128Mb
256Mb
133MHz
IDT72T6480
x48in
x48out
x24out
x12out
72T6480
dsc-6358
IDT72T6360
IDT72T6480
D2312
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PDF
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Untitled
Abstract: No abstract text available
Text: •HYUNDAI H Y 6 7 V 1 8 1 0 0 /1 0 1 64K X 18 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64K x18 SRAM core, address registers, data input registers, a 2-bit burst ad dress counter and pipelined output. All synchronous inputs pass through registers controlled by a positiveedge triggered clock K .
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486/Pentium
7ns/12ns/17ns
67MHz
486/Pent
00DbSS3
1DH02-22-MAY95
HY67V18100/101
HY67V18100C
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PDF
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Untitled
Abstract: No abstract text available
Text: IBM14N1372 IBM14N3272 IBM14N6472 High Perform ance SRAM Modules Features • 256K, 512K, and 1MB secondary cache module family using Synchronous and Asynchronous SRAMs. • Organized as a 32K, 64K, or 128K x 72 package on a 4.3” x 1.1”, 160-lead, Dual Read-out DIMM
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IBM14N1372
IBM14N3272
IBM14N6472
160-lead,
i486/PentiumTM
50MHz
66MHz
256KB,
512KB,
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PDF
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Untitled
Abstract: No abstract text available
Text: JÊL S» 1993 ADVANCE M IC R O N I .w r ^ w . ^ MT58LC64K18B2 64K x 18 SYNCHRONOUS SRAM SYNCHRONOUS SRAM 64Kx 18 SRAM +3.3V SUPPLY WITH CLOCKED, REGISTERED INPUTS AND BURST COUNTER FEATURES • • • • • • • • • • • • Fast access times: 9 ,1 0 ,1 2 and 17ns
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MT58LC64K18B2
MT58LC64K18B2EJ-12
MTMLC64K18B2
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PDF
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Untitled
Abstract: No abstract text available
Text: ML *««93 ADVANCE MICRON I 64K SEMICONDUCTOR. MC SYNCHRONOUS SRAM X MT58LC64K18C4 18 SYNCHRONOUS SRAM 6 4 K x 18 SRAM +3.3V SUPPLY, FULLY REGISTERED INPUTS AND OUTPUTS AND BURST COUNTER FEATURES • • • • • • • • • • • • • Fast access times: 7 ,1 0 ,1 2 and 15ns
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MT58LC64K18C4
486/Pentium
MT58LC64K18C4EJ-10
LC64K16C4
C1993.
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PDF
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LT1248
Abstract: No abstract text available
Text: r r i m LT15Q9 Power Factor and PWM Controller m TECHNOLOGY fcaturcs D€SCMPTIOn • PFC and PWM Single Chip Solution The LT 1509 is a complete solution for universal off-line switching power supplies utilizing active power factor correction. The PFC section is identical to the LT1248 PFC
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LT15Q9
LT1248
300kHz
250pA
LT1241-5
500kHz
LT1247
LT1248
16-Lead
LT1249
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PDF
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Untitled
Abstract: No abstract text available
Text: ADVANCE 64K x 18 SRAM SYNCHRONOUS SRAM +3.3V SUPPLY, PIPELINED, BURST COUNTER AND SINGLE CYCLE DESELECT FEATURES PIN ASSIGNMENT Top View • Fast access tim e s : 4 .5 ,5 ,6 ,7 and 8ns • Fast OE access time: 5 and 6ns • • • • • • • • •
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MT58LC64K18D7
160-PIN
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PDF
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ea423
Abstract: No abstract text available
Text: N E C E LECTRONI CS INC blE ì> m b427525 NEC 0D34317 MC-422000A 32 2,097,152 X 32-Bit Dynamic CMOS RAM Module NEC Electronics Inc. Description Pin Configuration The MC-422000A32 is a fast-page dynamic RAM mod ule organized as 2,097,152 words by 32 bits and de
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b427525
0D34317
MC-422000A
32-Bit
MC-422000A32
-422000A
0G34331
ea423
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PDF
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Untitled
Abstract: No abstract text available
Text: H Y 6 7 V 1 8 1 1 0 /1 1 1 64K X 18 Bit SYNCHRONOUS CMOS SRAM -HYUNDAI PRELIMINARY DESCRIPTION This device integrates high-speed 64K x18 SRAM core, address registers, data input registers, a 2-bit burst ad dress counter and Non-pipelined output. All synchronous inputs pass through registers controlled by a positiveedge triggered clock K .
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486/Pentium
20ns/25ns/30ns
40MHz
00DbP77
1DH04-11-MAY95
HY67V18110/111
HY67V18110C
HY67V18111C
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PDF
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY MT58LC64K18B2/M1 64K X 18 SYNCBU RST SRAM I^ICZROiSI 64K x 18 SRAM SYNCHRONOUS SRAM +3.3V SUPPLY WITH CLOCKED, REGISTERED INPUTS, BURST COUNTER FEATURES • • • • • • • • PIN ASSIGNMENT Top View Fast access times: 9 ,1 0 ,1 1 ,1 2 and 14ns
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MT58LC64K18B2/M1
MT58LC64K18B2EJ-12
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Untitled
Abstract: No abstract text available
Text: HY UN DA I 64K X HY6718100/101 18 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64K x 18 SRAM core, address registers, data input registers, a 2-bit burst address counter and pipelined output. All synchronous inputs pass through registers controlled by a positive-edge
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HY6718100/101
486/Pentium
6ns/9ns/12ns
75MHz
486/Pentlum
1DH01-22-MAY95
HY6718100/101
1DH01-22-MAY9S
HY6718100C
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PDF
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Untitled
Abstract: No abstract text available
Text: •HYUNDAI HY67V16100/101 64K X 16 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64Kx16 SRAM core, address registers, data input registers, a 2-bit burst address counter and pipelined output. All synchronous inputs pass through registers controlled by a positive-edge
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HY67V16100/101
64Kx16
486/Pentium
7ns/12ns/17ns
67MHz
1DH06-11-MAY95
HY67V16100/101
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PDF
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M27C4002
Abstract: M27V402 Q0-Q15
Text: ¿ = 7 S C S -TH O M S O N ^ 7# » EfflD g[Hì(Q lIiL[|(gTniì(o)l] Ì M27V402 LOW VOLTAGE 4 Megabit (256K x 16) UV EPROM and OTP EPROM PRELIMINARY DATA i LOW VOLTAGE READ OPERATION: 3V to 5.5V FAST ACCESS TIME: 120ns LOW POWER ’’CMOS” CONSUMPTION:
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M27V402
120ns
24sec.
M27V402
M27C4002
TSOP40-
Q0-Q15
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PDF
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Untitled
Abstract: No abstract text available
Text: S G S -T H O M S O N D M a iC T G S tM O ! M 2 8 F 1 0 2 1 Megabit 64K x 16, Chip Erase FLASH MEMORY • FAST ACCESS TIME: 90ns ■ LOW POWER CONSUMPTION - Standby Current: 1OOpA Max ■ 10,000 ERASE/PROGRAM CYCLES ■ 12V PROGRAMMING VOLTAGE ■ TYPICAL BYTE PROGRAMMING TIME 10[is
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PLCC44
TSOP40
PLCC44
M28F102
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PDF
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Untitled
Abstract: No abstract text available
Text: MICRON SEMICONDUCTOR INC b3E D • blllSM S 000057=5 T4 4 « U R N ADVANCE MICRON ■ 64K KMICOMDUCTOR MC SYNCHRONOUS SRAM M T58LC 64K 18F5 X 18 SYNCHRONOUS SRAM 64Kx 18 SRAM +3.3V SUPPLY, FULLY REGISTERED INPUTS AND LATCHED OUTPUTS FEATURES • • • •
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MT58LC64K18F5
MT58LC64K1IF5
C1993,
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PDF
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Untitled
Abstract: No abstract text available
Text: unir n «i nim ii i mui i iiiij.j.m u i.HHiHnj; MICRON TECHNOLOGY INC b lllS H T 3flE D QG0SÖ73 S • MRN ADVANCE T 'H L -2Z - H 16K x 16 SRAM SRAM WITH A D D R E SS / DATA INPUT LATCHES a FEATURES • • • • • • • • • PIN A SSIG N M EN T Top View)
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T-46-23-14
00G20Ã
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PDF
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Untitled
Abstract: No abstract text available
Text: HY6718110/111 HYUNDAI 64K X 18 Bit SYNCHRONOUS CMOS SRAM PRELIMINARY DESCRIPTION This device integrates high-speed 64K x18 SRAM core, address registers, data input registers, a 2-bit burst address counter and Non-pipelined output. All synchronous inputs pass through registers controlled by a
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HY6718110/111
486/Pentium
15ns/20ns/25ns
50MHz
486/Pentium
4b75066
1DH03-11-MAY95
HY6718110/111
4b75DÃ
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PDF
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Untitled
Abstract: No abstract text available
Text: P R iy if flD I iO M Ÿ in te i EXTENDED TEMPERATURE 28F016SA 16-MBIT 1 MBIT x 16, 2 MBIT x 8 FlashFileTM MEMORY Extended Temperature Operation 40°C to +85°C User-Selectable 3.3V or 5V Vcc , „ , . „ User-Configurable x8 or x16 Operation 100 ns Maximum Access Time at 5V
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28F016SA
16-MBIT
56-Lead
28F008SA
28F016SA
16-Mbit
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PDF
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M27C1024
Abstract: plcc44 drawing
Text: 7 7 S G S -T H O M S O N kI t *, MtgOSmitgTTDMQtg M27C1024 1 Megabit 64K x16 UV EPROM and OTP ROM • FAST ACCESS TIME: 70ns ■ COMPATIBLE with HIGHSPEED MICROPROCESSORS, ZERO WAIT STATE ■ LOW POWER "CMOS’ CONSUMPTION: - Active Current 35mA - Standby Current 10O^iA
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M27C1024
M27C1024
plcc44 drawing
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PDF
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Untitled
Abstract: No abstract text available
Text: SHARP SPEC No. ISSUE: May 15 1996 T o ; SPECIFICATIONS Product Type_ 8 M F l a s h F i l e M e m o r y L H 2 8 F 8 0 0 S U R — 10 Mo d e l No. L H F 8 0 S 0 8 _ j&This s p e c if ic a tio n s c o n ta in s 44 pages in clu d in g th e cover and appendix.
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