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    DRAM MEMORY CONTROLLER 25 MHZ Search Results

    DRAM MEMORY CONTROLLER 25 MHZ Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SSM6J808R Toshiba Electronic Devices & Storage Corporation MOSFET, P-ch, -40 V, -7 A, 0.035 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K819R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 100 V, 10 A, 0.0258 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K809R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 60 V, 6.0 A, 0.036 Ohm@10V, TSOP6F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM6K504NU Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 30 V, 9.0 A, 0.0195 Ohm@10V, UDFN6B, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation
    SSM3K361R Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 100 V, 3.5 A, 0.069 Ohm@10V, SOT-23F, AEC-Q101 Visit Toshiba Electronic Devices & Storage Corporation

    DRAM MEMORY CONTROLLER 25 MHZ Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    82425EX

    Abstract: 82426EX 82420 82420EX t34i osa-104 AA T37B t17c tag044 82C42
    Text: 82420EX PCISET DATA SHEET 82425EX PCI SYSTEM CONTROLLER PSC AND 82426EX ISA BRIDGE (IB) Y Y Y Y Host CPU 25 – 33 MHz Intel486 TM and OverDrive TM Processors L1 Write-Back Support Integrated DRAM Controller 1 to 128 MByte Main Memory 70 ns Fast Page Mode DRAM SIMMs


    Original     		82420EX 82425EX 82426EX Intel486 27-bits 82420 t34i osa-104 AA T37B t17c tag044 82C42 PDF

    simple heart rate monitor circuit diagram

    Abstract: amd 29030 VF132A AA10 C1995 NSBMC292 NSBMC292-16 NSBMC292VF V292BMC 11806 equivalent
    Text: NSBMC292 TM -16 -25 -33 Burst Memory Controller General Description The NSBMC292 Burst Memory Controller is an integrated circuit which implements all aspects of DRAM control for high performance systems using an Am29030TM or Am29035 Processor The NSBMC292 is functionally equivalent to the V292BMC TM


    Original     		NSBMC292 Am29030TM Am29035 V292BMC simple heart rate monitor circuit diagram amd 29030 VF132A AA10 C1995 NSBMC292-16 NSBMC292VF 11806 equivalent PDF

    AA10

    Abstract: C1995 NSBMC096 NSBMC096-16 NSBMC096VF V96BMC VF132A
    Text: NSBMC096-16 -25 -33 Burst Memory Controller General Description The NSBMC096 Burst Memory Controller is an integrated circuit which implements all aspects of DRAM control for high performance systems using an i960 CA CF SuperScalar Embedded Processor The NSBMC096 is functionally equivalent to the V96BMC TM


    Original     		NSBMC096-16 NSBMC096 V96BMC AA10 C1995 NSBMC096VF VF132A PDF

    fast sram 200mhz 8k

    Abstract: KS32C50100 ARM10TDMI block diagram ARM7 set associative ARM10TDMI ARM920T 1997 KS* I2C UART buffer ic KS32C5000A 196QFP
    Text: Rev. 1.8 W - Network Business KS32C5000A 32-bit RISC Microcontroller for Networking Dec. 1998 Network Group , SYSTEM LSI ELECTRONICS December ‘98 Network Team CPU Roadmap KS32C5000A 1996 1997 1998 • 150 ~ 200MHz ARM9TDMI • 0.35/0.25um TLM • 1.0mA/[email protected]


    Original     		KS32C5000A 32-bit 200MHz S-ARM920T S-ARM1020T 300MHz ARM10TDMI 40MHz fast sram 200mhz 8k KS32C50100 ARM10TDMI block diagram ARM7 set associative ARM10TDMI ARM920T 1997 KS* I2C UART buffer ic KS32C5000A 196QFP PDF

    Untitled

    Abstract: No abstract text available
    Text: ASSP CMOS SPARClite Series 32-Bit RISC Embedded Processor MB86832 Package ¥ 176-pin, Plastic SQFP ¥ FPT-176P-M01 Features • 66, 80, or 100 MHz CPU with on-chip clock multiplier • Bus interface support for 8-, 16-, or 32-bit wide memory • SPARC high performance RISC architecture


    Original     		32-Bit MB86832 176-pin, FPT-176P-M01 EC-DS-20501-6/98 PDF

    sparclite

    Abstract: ADR11 MB86831 MB86832 MB86832-100PFV-G MB86832-66PFV-G MB86832-80PFV-G MB86930 ADR27
    Text: ASSP CMOS SPARClite Series 32-Bit RISC Embedded Processor MB86832 Package ¥ 176-pin, Plastic SQFP ¥ FPT-176P-M01 Features • 66, 80, or 100 MHz CPU with on-chip clock multiplier • Bus interface support for 8-, 16-, or 32-bit wide memory • SPARC high performance RISC architecture


    Original     		32-Bit MB86832 176-pin, FPT-176P-M01 EC-DS-20501-6/98 sparclite ADR11 MB86831 MB86832 MB86832-100PFV-G MB86832-66PFV-G MB86832-80PFV-G MB86930 ADR27 PDF

    2AP10

    Abstract: No abstract text available
    Text: ASSP CMOS SPARClite Series 32-Bit RISC Embedded Processor MB86831 Package ¥ 176-pin, Plastic SQFP ¥ FPT-176P-M01 Features • 66 or 80 MHz CPU with on-chip clock multiplier • Bus interface support for 8-, 16-, or 32-bit wide memory • SPARC high performance RISC architecture


    Original     		32-Bit MB86831 176-pin, FPT-176P-M01 EC-DS-20386-6/98 2AP10 PDF

    sparclite

    Abstract: MB86833 ADR11 ADR14 MB86833PFV-G bit3116 MB8683X
    Text: ASSP CMOS SPARClite Series 32-Bit RISC Embedded Processor MB86833 Package • 144-pin, Plastic LQFP • FPT-144-M08 Features • 66 MHz CPU with on-chip clock multiplier • Bus interface support for 8-, 16-, or 32-bit wide memory • SPARC high performance RISC architecture


    Original     		32-Bit MB86833 144-pin, FPT-144-M08 EC-DS-20517-8/98 sparclite MB86833 ADR11 ADR14 MB86833PFV-G bit3116 MB8683X PDF

    855PM cpu support

    Abstract: 855PM lan hub 82801DBM AC97 DDR200 DDR266 PC2100 Intel 855PM x86 855pm MOTHERBOARD CIRCUIT diagram
    Text: R Intel 855PM Chipset Memory Controller Hub MCH DDR 200/266 MHz Datasheet May 2004 Revision Number 003 Order Number: 252613-003 R Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


    Original     		855PM 855PM cpu support lan hub 82801DBM AC97 DDR200 DDR266 PC2100 Intel 855PM x86 855pm MOTHERBOARD CIRCUIT diagram PDF

    sparclite

    Abstract: ADR11 ADR14 MB86833 MB86833PFV-G MB86930 cs2105
    Text: ASSP CMOS SPARClite Series 32-Bit RISC Embedded Processor MB86833 Package ¥ 144-pin, Plastic LQFP ¥ FPT-144-M08 Features • 66 MHz CPU with on-chip clock multiplier • Bus interface support for 8-, 16-, or 32-bit wide memory • SPARC high performance RISC architecture


    Original     		32-Bit MB86833 144-pin, FPT-144-M08 EC-DS-20517-6/98 sparclite ADR11 ADR14 MB86833 MB86833PFV-G MB86930 cs2105 PDF

    S1m aa25

    Abstract: 252613 pentium processor block diagram 855PM SHARED MEMORY 855pm MOTHERBOARD CIRCUIT diagram 855PM cpu support
    Text: R Intel 855PM Chipset Memory Controller Hub MCH DDR 200/266 MHz Datasheet January 2004 Order Number: 252613-002 R Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual


    Original     		855PM S1m aa25 252613 pentium processor block diagram 855PM SHARED MEMORY 855pm MOTHERBOARD CIRCUIT diagram 855PM cpu support PDF

    MSL9350

    Abstract: 80386dx pipeline sl9350 via sl9350 via flexset
    Text: SL9350 80386DX Page Mode Memory Controller PRELIMINARY FEATURES • Supports 80386DX based AT Designs. • Up to 25 MHz Performance. • Enhanced Fast Page Mode DRAM Controller. • Supports 16 M byte of on Board Memory. • Shadow RAM Feature. • Programmable Wait State Options.


    OCR Scan     		SL9350 80386DX A2-A16, A20GATE, CLK8042, ADD20, NBUS16, MSL9350 80386dx pipeline via sl9350 via flexset PDF

    logical block diagram of 80286

    Abstract: TL4A A20GATE sl93 sl90 LIM EMS 4.0 SL9151
    Text: SL9151 80286 Page Interleave Memory Controller PRELIMINARY FEATURES • Supports 80286 based designs. • 16,20 or 25 MHz Options. • Enhanced Fast Page Mode/Page Interleave DRAM Controller. • Hardware support for EMS LIM 4.0 standard and EEMS. • Supports up to 8 M byte of on board memory.


    OCR Scan     		SL9151 120ns 25MHz. NRDY16 NCAS00-31 SL9151 logical block diagram of 80286 TL4A A20GATE sl93 sl90 LIM EMS 4.0 PDF

    80486 interface with keyboard

    Abstract: m027 80486 m029 laptop motherboard block diagram AT40493 8042 Keyboard Controller M010 RAM Cache control logic burst controller coprocessor
    Text: AT40493/392 Features • Two-Chip PC/AT Compatible Chip Set «or 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Wait State Cache Read Hit and Programmable 0/1 Walt State


    OCR Scan     		AT40493/392 AT40493 AT40392 160-Pin 000572b AT40493-25 AT40392-25 AT40493-33 80486 interface with keyboard m027 80486 m029 laptop motherboard block diagram 8042 Keyboard Controller M010 RAM Cache control logic burst controller coprocessor PDF

    CACHE MEMORY FOR 80386DX

    Abstract: 80386DX C9012 386DX 386DX bios 386DX motherboard 80387DX Cache Controller 80386DX 16 BIT
    Text: AT40391B/392 Features • Two-Chip PC/AT Compatible Chip Set for 80386DX Systems Operating up to 40 MHz AT40391B System and Cache Controller AT40392 Data Buffer Controller Two 160-Pin Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Walt State Cache Read Hit and Programmable 0/1 Wait State


    OCR Scan     		AT40391 B/392 80386DX AT40391B AT40392 160-Pin AT40391B/392 AT40391B-25 CACHE MEMORY FOR 80386DX C9012 386DX 386DX bios 386DX motherboard 80387DX Cache Controller 80386DX 16 BIT PDF

    AT40391B25

    Abstract: 80386DX 16 BIT AMI 8042 AT40391B-40
    Text: AT40391B/392 Features • Two-Chip PC/AT Compatible Chip Set for 80386DX Systems Operating up to 40 MHz AT40391B System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Walt State Cache Read Hit and Programmable 0/1 Wait State


    OCR Scan     		AT40391B/392 80386DX AT40391B AT40392 160-Pln AT40391B-25 AT40391B25 80386DX 16 BIT AMI 8042 AT40391B-40 PDF

    82424TX

    Abstract: 82424 82423 487 SX "snoop filter" Intel486DX2 rde l2 40 82424ZX
    Text: intei 82424 CACHE AND DRAM CONTROLLER CDC • Supports 25 MHz/33 MHz/50 MHz Intel486 SX, l n t e l 4 8 7 TM SX, Intel486 DX, Intel486 DX2, O v e r D r i v e ™ for Intel486 and OverDrive for DX2 Processors ■ Fully Synchronous, 25 MHz/33 MHz PCI Bus Capable of Supporting Bus


    OCR Scan     		Hz/33 Hz/50 Intel486 160-Mbyte TYD-40 82424TX 82424 82423 487 SX "snoop filter" Intel486DX2 rde l2 40 82424ZX PDF

    04fi

    Abstract: Atmel 122 m019 M-022 80486 set
    Text: b4E D • 1 0 7 4 17 7 GüD3fiüb 0=14 ■ A T M ATME L CORP ^ m "m I AT40493/392 Features • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller • Two 160-Pin Quad Flatpacks


    OCR Scan     		AT40493/392 AT40493 AT40392 160-Pin PESS22KG1RDRDCDLN6CNSAH 107M177 Ga0361G AT40493/ AT40493-25 04fi Atmel 122 m019 M-022 80486 set PDF

    73d25

    Abstract: at40206 peripheral controller
    Text: AT40493/392 Features • • • • • • • • • • • • • • • • • • • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller Two 160-Pin Quad Flatpacks


    OCR Scan     		AT40493/392 AT40493 AT40392 160-Pin AT40493-25 AT40392-25 AT40493-33 AT40392-33 73d25 at40206 peripheral controller PDF

    Untitled

    Abstract: No abstract text available
    Text: AT40493/392 Features • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Wait State Cache Read Hit and Programmable 0/1 Wait State


    OCR Scan     		AT40493/392 AT40493 AT40392 160-Pln G00572b AT40493-25 AT40392-25 AT40493-33 PDF

    IP 8082 BL

    Abstract: INTEL 8082 CPU 82C382 Interface 8Kx8 RAM memory using 4kx4 memory chips 82c381 82C482 opti 486 chipset 82C481 etherlink III schematic IC-1406
    Text: HiD/386 AT CHIPSET HIGH INTEGRATION DIRECT MAPPED CACHE AT 82C381 /82C382D-25/33 Software configurable Command Delays, Wait States and Memory Organization 100% IBM PC/AT Compatible 386/AT Chipset for 25 and 33 MHz systems Designed to provide the most cost-effective, higji


    OCR Scan     		HiD/386 82C381 /82C382D-25/33 386/AT 128KB GateA20 82C382D IP 8082 BL INTEL 8082 CPU 82C382 Interface 8Kx8 RAM memory using 4kx4 memory chips 82C482 opti 486 chipset 82C481 etherlink III schematic IC-1406 PDF

    80286 microprocessor pin out diagram

    Abstract: 80286 microprocessor features 80286 application note 80286 memory microprocessor 80286 Word Size 80286 80286 microprocessor pin ibm at motherboard 80286 faraday 80286 ic 80286
    Text: 80286 High Performance Memory Interface True Zero Wait State versus Page-Interleaved by Linda Bishop PREFACE This application note will detail the approach to high performance, yet cost-effective, page interleaved mem­ ory to support a 16-MHz 80286-based system.


    OCR Scan     		16-MHz 80286-based 12-MHz 9863A 80286 microprocessor pin out diagram 80286 microprocessor features 80286 application note 80286 memory microprocessor 80286 Word Size 80286 80286 microprocessor pin ibm at motherboard 80286 faraday 80286 ic 80286 PDF

    74F765

    Abstract: No abstract text available
    Text: Signetics FAST 74F1763 Intelligent DRAM Controller IDC FAST Products Product Specification FEATURES TYPE • DRAM signal timing ganerator TYPICAL SUPPLY CURRENT (TOTAL) 150 mA Wx 74F1763 100 MHz • Automatic refresh circuitry • Selectable row address


    OCR Scan     		74F1763 48-Pin 44-Pin N74F1763N N74F1763A 74F764 74F1763 F160A A4-A12 74F765 PDF

    80286 schematic

    Abstract: lp9 pinout fe3031 FE3021A 8042 "Keyboard Controller" A1981 8042 keyboard controller LIM EMS 4.0 tl982 c3fff
    Text: FE3021 DESCRIPTION 1.0 DESCRIPTION 1.1 The FE3021 is a 16 MHz AT address buffer and memory controller in a 132-pin JEDEC package. Chip count is significantly reduced by integrating the memory controller, AT bus address buffers, and I/O into one chip. The memory controller is a


    OCR Scan     		FE3021 FE3021 132-pin FE3021. FE3600B aS5S23s36S3 0io10 Tl982 132POSN 80286 schematic lp9 pinout fe3031 FE3021A 8042 "Keyboard Controller" A1981 8042 keyboard controller LIM EMS 4.0 c3fff PDF