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    Text: SDR SDRAM E0364M11 Ver.1.1 (Previous Rev.0.3e) February 2004 (K) Japan PRELIMINARY DATA SHEET M2V64S50ETP-I 64M Single Data Rate Synchronous DRAM WTR (Wide Temperature Range) DESCRIPTION M2V64S50ETP-I is a 4-bank x 524,288-word x 32-bit, synchronous DRAM, with LVTTL interface.


    Original     		PDF E0364M11 M2V64S50ETP-I M2V64S50ETP-I 288-word 32-bit, 100MHz 133MHz M01E0107