ELECTRICAL CHARACTERISTICS OF 8096 Search Results

ELECTRICAL CHARACTERISTICS OF 8096 Result Highlights (5)

Part	Manufacturer	Description
MC28F008-10/B	Rochester Electronics LLC	EEPROM,
X28C512JI-12	Rochester Electronics LLC	EEPROM, 64KX8, 120ns, Parallel, CMOS, PQCC32, PLASTIC, LCC-32
FM93CS46M8	Rochester Electronics LLC	EEPROM, 64X16, Serial, CMOS, PDSO8, 0.150 INCH, PLASTIC, SO-8
NM93C56EN	Rochester Electronics LLC	EEPROM, 128X16, Serial, CMOS, PDIP8, PLASTIC, DIP-8
X28C512DM-15	Rochester Electronics LLC	EEPROM, 64KX8, 150ns, Parallel, CMOS, CDIP32, HERMETIC SEALED, CERDIP-32

ELECTRICAL CHARACTERISTICS OF 8096 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
i486 sx Abstract: 80960CX 80960JF 80960RD 80960RP 272736 272918 INTEL386 pipeline architecture Text: Intel i960® RX I/O Processor at 3.3 Volts Datasheet • 33 MHz, 3.3 Volt Version 80960RP 33/3.3 • 66 MHz, 3.3 Volt Version (80960RD 66/3.3) - Clock Doubled 80960JF Core • Complies with PCI Local Bus Specification, Revision 2.1 • 5 Volt PCI Signalling Environment	Original	80960RP 80960RD 80960JF 32-Bit 32-Bit i486 sx 80960CX 272736 272918 INTEL386 pipeline architecture	PDF
80960Cx Abstract: PCI80960 80960JF 80960RP i960RP Text: Intel i960® RP I/O Processor Datasheet • 33 MHz, 5 Volt Version 80960RP 33/5.0 • Complies with PCI Local Bus Specification, Revision 2.1 Product Features • ■ ■ ■ ■ High Performance 80960JF Core —Sustained One Instruction/Clock Execution	Original	80960RP 80960JF 32-Bit 32-Bit 64-Byte Forwar80960RP-series 80960RP 80960Cx PCI80960 i960RP	PDF
am3 socket pin diagram Abstract: gc80303 socket AM2 pinout socket am3 pinout differential relay 273358 PAD45 Text: Intel 80303 I/O Processor •66 MHz PCI-to-PCI Bridge MHz SDRAM and Internal Bus ■Complies with PCI Local Bus Specification, Revision 2.2 ■Universal 5 V and 3.3 V PCI Signaling Environment ■100 Datasheet Product Features ■ ■ ■ ■ High Performance 100 MHz Intel® 80960JT	Original	80960JT 32-Bit Hz/64-bit am3 socket pin diagram gc80303 socket AM2 pinout socket am3 pinout differential relay 273358 PAD45	PDF
QFP PACKAGE thermal resistance Abstract: 80960SA 80960SB N80960SB1 65A176 AD928 Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture ■ Built-in Interrupt Controller — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache	Original	80960SB 32-BIT 16-BIT 512-Byte 80960SA 80960SA 80960SB QFP PACKAGE thermal resistance N80960SB1 65A176 AD928	PDF
80960CA Abstract: Non-Pipelined Single-Cycle processor 80960CA-16 80960CA-25 270710 Text: SPECIAL ENVIRONMENT 80960CA-25 -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR Two Instructions Clock Sustained Execution Four 59 Mbytes s DMA Channels with Data Chaining Demultiplexed 32-bit Burst Bus with Pipelining Y 32-bit Parallel Architecture Two Instructions clock Execution	Original	80960CA-25 32-BIT 64-bit 128-bit 80960CA Non-Pipelined Single-Cycle processor 80960CA-16 270710	PDF
80960SA Abstract: 80960SB 65A176 272206-003 Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached	Original	80960SA 32-BIT 16-BIT 512-Byte 80960SB 80-Lead 80960SA 80960SB 65A176 272206-003	PDF
80960SA Abstract: 80960SB 65A176 AD427 Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded ■ Pin Compatible with 80960SB Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache	Original	80960SA 32-BIT 16-BIT 80960SB 512-Byte 80960SA 80960SB 65A176 AD427	PDF
intel packaging handbook 240800 Abstract: 25809 80960JA 80960JD 80960JF 27248 Text: A PRELIMINARY 80960JA/JF EMBEDDED 32-BIT MICROPROCESSOR • Pin/Code Compatible with all 80960Jx Processors ■ High-Performance Embedded Architecture — One Instruction/Clock Execution — Load/Store Programming Model — Sixteen 32-Bit Global Registers	Original	80960JA/JF 32-BIT 80960Jx 80960JA 80960JF intel packaging handbook 240800 25809 80960JD 27248	PDF
Non-Pipelined processor Abstract: 80960CF 80960CA intel packaging handbook 240800 80960CF-33 80960CF-40 Non-Pipelined Single-Cycle processor 270710 Text: A PRELIMINARY 80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR • ■ ■ ■ ■ ■ • Socket and Object Code Compatible with 80960CA • Two Instructions/Clock Sustained Execution • Four 71 Mbytes/s DMA Channels with Data Chaining	Original	80960CF-40, 32-BIT 80960CA 64-Bit Non-Pipelined processor 80960CF 80960CA intel packaging handbook 240800 80960CF-33 80960CF-40 Non-Pipelined Single-Cycle processor 270710	PDF
QFP PACKAGE thermal resistance Abstract: 65a176 AD427 80960SA 80960SB x80960SB 272207 D010D Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture ■ Built-in Interrupt Controller — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz ■ 512-Byte On-Chip Instruction Cache	Original	80960SB 32-BIT 16-BIT 512-Byte 80960SA 80960SA 80960SB QFP PACKAGE thermal resistance 65a176 AD427 x80960SB 272207 D010D	PDF
80960CA-33 Abstract: ALI 3105 80960CA 80960CA-25 FCX-03 Text: 80960CA-33, -25, -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR • Two Instructions/Clock Sustained Execution • Four 59 Mbytes/s DMA Channels with Data Chaining • Demultiplexed 32-bit Burst Bus with Pipelining • 32-bit Parallel Architecture ■ ■	Original	80960CA-33, 32-BIT 64-bit 80960CA 80960CA and18 80960CA-33 ALI 3105 80960CA-25 FCX-03	PDF
80960c Abstract: 80960CF 80960CA 80960CF-33 80960CF-40 272886 270710 Text: 80960CF-40, -33, -25 32-Bit High-Performance Superscalar Embedded Microprocessor Datasheet Product Features • ■ ■ ■ Socket and Object Code Compatible with 80960CA Two Instructions/Clock Sustained Execution Four 71 Mbytes/s DMA Channels with Data Chaining	Original	80960CF-40, 32-Bit 80960CA 64-Bit CX049A CX050A 80960c 80960CF 80960CA 80960CF-33 80960CF-40 272886 270710	PDF
Untitled Abstract: No abstract text available Text: 80960HA/HD/HT 1.0 ABOUT THIS DOCUMENT This document provides a preview of Intel’s 80960Hx embedded superscalar microprocessors. Future revisions of this document will provide targeted electrical characteristics. Detailed descriptions for functional topics — other than parametric perfor	OCR Scan	80960HA/HD/HT 80960Hx 80960Hxâ	PDF
8096 processor architecture Abstract: No abstract text available Text: intei 1.0 8 0 9 6 0 H A/H D / H T This docum ent provides a preview of Intel’s 80960Hx embedded superscalar microprocessors. Future revisions of this docum ent will provide targeted electrical characteristics. Detailed descriptions for functional topics — other than param etric perfor	OCR Scan	80960Hx 80960H 80960Cx 8096 processor architecture	PDF

80960CF Abstract: Q1730 80960CA 80960CF-33 80960CF-40 FCX-04 fcx-02 CX020A til 701 Text: intèi 1.0 80960CF-40, -33, -25, -16 PURPOSE 2.0 This document provides electrical characteristics of Intel’s i960 CF embedded microprocessor. For functional descriptions consult the i96 P Cx Micro processor User's Manual (270710 . To obtain data sheet updates and errata, contact Intel at any of the	OCR Scan	80960CF-40, 80960CF 80960CA 80960HA/HD/HT. worldwide0960CF-40, Q1730 80960CF-33 80960CF-40 FCX-04 fcx-02 CX020A til 701	PDF
Untitled Abstract: No abstract text available Text: in te i 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped	OCR Scan	80960SA 32-BIT 16-BIT 512-Byte 80960SB 16-Bit 80960SA	PDF
advantages of instruction set architecture intel i3 Abstract: No abstract text available Text: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • H ig h -P e rfo rm a n c e E m bedded A rc h ite c tu re — 16 M IPS* B u rst E xecution at 16 M H z — 5 M IPS S u stain ed E xecution at 16 M Hz ■ B uilt-in In te rru p t C o n tro lle r	OCR Scan	80960SB 32-BIT 16-BIT 80960SA at50-1000 advantages of instruction set architecture intel i3	PDF
T7 DIODE Abstract: No abstract text available Text: inttJ PBßyiiflOMÄlHV 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz 512-Byte On-Chip Instruction Cache — Direct Mapped	OCR Scan	80960SA 32-BIT 16-BIT 512-Byte 80960KA/ 80960SB T7 DIODE	PDF
80960RP Abstract: Intel Order Intel 960 Text: iniol 1.0 80960 RP ABOUT THIS DOCUMENT 1.2 This data sheet contains ADVANCE INFORMATION about Intel’s ¡960 RP processor, including a func tional overview, m echanical data package signal locations and sim ulated thermal characteristics , targeted electrical specifications (simulated), and	OCR Scan	80960RP 80960ontrollers Intel Order Intel 960	PDF
Untitled Abstract: No abstract text available Text: in te l 80960JA /JF EMBEDDED 32-BIT MICROPROCESSOR • Pin/Code Compatible with all 80960Jx Processors ■ High-Performance Embedded Architecture — One Instruction/Clock Execution — Load/Store Programming Model — Sixteen 32-Bit Global Registers — Sixteen 32-Bit Local Registers 8	OCR Scan	80960JA 32-BIT 80960Jx 80960JA- 80960JF	PDF
VAX-11 Abstract: PLCC 68 intel package dimensions 270917 w1a31 intel core i7 processors their registers in term of 32-bit mode Text: in te i 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped	OCR Scan	80960SA 32-BIT 16-BIT 512-Byte Local\32-Bit 80960SB 80-Lead VAX-11 PLCC 68 intel package dimensions 270917 w1a31 intel core i7 processors their registers in term of 32-bit mode	PDF
VAX-11 Abstract: 272207 Text: in t t J P ß m oM ow A nv 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture — 16 MIPS* Burst Execution at 16 MHz — 5 MIPS Sustained Execution at 16 MHz 512-Byte On-Chip Instruction Cache — Direct Mapped	OCR Scan	80960SB 32-BIT 16-BIT 512-Byte 80960KA/ 80960SA 8096SA VAX-11 272207	PDF
82961KA Abstract: canon pinout cartridge printer video board "canon " printer Text: P e ® y T [FiraEWQQ in t e i 82961KA PAGE PRINTER CONTROLLER High Integration i960® Page Printer Controlled1 — Direct Interface to 32-bit 80960KA or KB<2) Embedded Processors Direct Non-Impact Printer Video Interface — Automatic DMA Burst DRAM Access	OCR Scan	82961KA 32-bit 80960KA 82961KA canon pinout cartridge printer video board "canon " printer	PDF
Untitled Abstract: No abstract text available Text: 80960CA-33, -25, -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR • • Two Instructions/Clock Sustained Execution Four 59 Mbytes/s DMA Channels with Data Chaining • Demultiplexed 32-bit Burst Bus with Pipelining • 32-bit Parallel Architecture — Two Instructions/clock Execution	OCR Scan	80960CA-33, 32-BIT 64-bit 80960CA 80960CA	PDF

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ELECTRICAL CHARACTERISTICS OF 8096 Search Results

ELECTRICAL CHARACTERISTICS OF 8096 Result Highlights (5)

ELECTRICAL CHARACTERISTICS OF 8096 Datasheets Context Search

i486 sx

80960Cx

am3 socket pin diagram

QFP PACKAGE thermal resistance

80960CA

80960SA

80960SA

intel packaging handbook 240800

Non-Pipelined processor

QFP PACKAGE thermal resistance

80960CA-33

80960c

Untitled

8096 processor architecture

80960CF

Untitled

advantages of instruction set architecture intel i3

T7 DIODE

80960RP

Untitled

VAX-11

VAX-11

82961KA

Untitled