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    EPLD 5032 Search Results

    EPLD 5032 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    EP1800GM-75/B Rochester Electronics LLC EP1800 - Classic Family EPLD Visit Rochester Electronics LLC Buy
    EP910LI-30-ROCS Rochester Electronics EP910 - Classic Family EPLD, Logic,450 Gates,24 Macrocells Visit Rochester Electronics Buy
    EP610DM-30 Rochester Electronics LLC EP610 - Classic Family EPLD, Logic,300 Gates,16 Macrocells Visit Rochester Electronics LLC Buy
    EP910LI-30-G Rochester Electronics LLC EP910 - Classic Family EPLD, Logic,450 Gates,24 Macrocells Visit Rochester Electronics LLC Buy
    EP610LI-25 Rochester Electronics LLC EP610 - Classic Family EPLD, Logic,300 Gates,16 Macrocells Visit Rochester Electronics LLC Buy

    EPLD 5032 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74151 PIN DIAGRAM

    Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
    Text: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 PIN DIAGRAM 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C341B CY7C342B

    C3402

    Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
    Text: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) C3402 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C

    74151 waveform

    Abstract: CY7C340 5128LC 7C340 programming 7C340 CY7C341B CY7C342B CY7C344 CY7C346 FLASH370
    Text: 7c340: 12-13-90 Revision: October 19, 1995 CY7C340 EPLD Family Multiple Array Matrix HighĆDensity EPLDs called expander product terms. These exĆ Ċ VHDL simulation ViewSimt Ċ Available on PC and Sun platforms panders are used and shared by the macroĆ


    Original     		PDF 7c340: CY7C340 35aproductmacrocell. 74151 waveform 5128LC 7C340 programming 7C340 CY7C341B CY7C342B CY7C344 CY7C346 FLASH370

    74151

    Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
    Text: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer

    Date Code Formats Altera EPF10K

    Abstract: ep22v10 5962-9061102XA 5962-8854901xa 8686401LA 5962-8686401LA lift controller in vhdl ALTERA PART MARKING EPM7160 EPX780 transistor b2020
    Text: Introduction Contents March 1995 Introduction The PLD Advantages of Altera


    Original     		PDF

    MSI MS-5

    Abstract: No abstract text available
    Text: EPM 5032 EPLD Features H • ■ ■ ■ ■ High-speed, single-LAB MAX 5000 EPLD t PD as fast as 10 ns Counter frequencies up to 125 MHz Pipelined data rates up to 83 MHz 32 individually configurable macrocells 64 shareable expander product terms "expanders" allowing 68


    OCR Scan     		PDF EPM5032 28-pin 32-bit 0H22D MSI MS-5

    EPM5032A

    Abstract: MSI MS-5 EPM5032-25 EPM5032 EPM5032-15 EPM5032 max 0H22D ns288
    Text: EPM 5032 EPLD Features 0005 XVIAI High-speed, single-LAB M AX 5000 EPLD t PD as fast as 10 ns Counter frequencies up to 125 MHz Pipelined data rates up to 83 MHz 32 individually configurable macrocells 64 shareable expander product terms "expanders" allowing 68


    OCR Scan     		PDF EPM5032 28-pin 32-bit 0H22D EPM5032A MSI MS-5 EPM5032-25 EPM5032-15 EPM5032 max ns288

    EPM5032

    Abstract: 1PD2 EPM5032 max epm5032-15 EPM5032A Q421 MSI MS-5
    Text: EPM5032 EPLD Features B • ■ ■ ■ MAX 5000 ■ High-speed, singie-LAB MAX 5000 EPLD t PD as fast as 10 ns Counter frequencies up to 125 MHz Pipelined data rates up to 83 MHz 32 individually configurable macrocells 64 shareable expander product terms "expanders" allowing 68


    OCR Scan     		PDF EPM5032 28-pin 32-bit 1PD2 EPM5032 max epm5032-15 EPM5032A Q421 MSI MS-5

    M5962

    Abstract: ep 1810 program EP610 ORDERING 5032DM altera ep320 EPS448LC-25 EPM 5192 PLMD5032 J5192 EPS448
    Text: Ordering EPLDs Figure 1 show s how an EPLD part num ber is constructed. For inform ation on specific package, grade, and speed com binations, refer to individual EPLD data sheets or the Product Selection Guide in this data book, or telephone the Altera M arketing D epartm ent at 408 984-2800.


    OCR Scan     		PDF IL-STD-883-com Classi10/1810T EPM5016 PLMJ1810 PLEG1810 PLED5016 PLEJ5016 PLES5016 PLED5032 PLMD5032 M5962 ep 1810 program EP610 ORDERING 5032DM altera ep320 EPS448LC-25 EPM 5192 PLMD5032 J5192 EPS448

    50321

    Abstract: No abstract text available
    Text: EPM5032 EPLD Features □ □ □ □ □ □ ü H ig h -s p e e d 28 -p in DIP, J-lead, o r SOIC single-LA B MAX 5 0 0 0 EPLD C o m b in a to ria l s p e e d s w ith tPD = 15 ns C o u n t e r f re q u en c ies u p to 76 M H z P ipelined d a ta rates u p to 8 3 M H z


    OCR Scan     		PDF EPM5032 EPM5032-20, IL-STD-883-com 50321

    Untitled

    Abstract: No abstract text available
    Text: CY7C340 EPLD Family 0 CYPRESS Multiple Array Matrix High-Density EPLDs — VHDL simulation ViewSim Features • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions • 0.8-micron double-metal CMOS EPROM technology (CY7C34X)


    OCR Scan     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) 7C342 342-30H 7C342â 35HMB

    EPM5128JC

    Abstract: EPM5064 EPM5130 Altera EPM5128 Altera September 1991
    Text: ANU MPLDs Mask-Programmed Logic Devices September 1991, ver. 1 Data Sheet Features □ □ □ □ □ □ □ □ □ General Description M asked versions of EPLD designs Reduced cost for large-volum e applications A vailable for E P1810, EPM 5032, E PM 5064, EPM 5128, EPM 5130,


    OCR Scan     		PDF EP1810, EPM5032, EPM5064, EPM5128, EPM5130, EPM5192, EPS464 EPM5128JC EPM5064 EPM5130 Altera EPM5128 Altera September 1991

    epm5032dc

    Abstract: 5130Q 5128A 74151 waveform 7C340 epld 342B rc 74151
    Text: CY7C340 EPLD Family •= CYPRESS Multiple Array Matrix High-Density EPLDs Features — VHDL sim ulation ViewSim M • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions — Available on PC and Sun platforms


    OCR Scan     		PDF CY7C34X) 65-micron CY7C34XB) CY7C340 5130LC 5130L 5130LI 5130QC 5130Q epm5032dc 5128A 74151 waveform 7C340 epld 342B rc 74151

    PLDS-MAX

    Abstract: Altera Classic EPLDs Altera LP5 ALTERA MAX 5000 programming ALTERA MAX 5000 eps448 logicaps sam plus mpm5192 PLDS-ENCORE
    Text: Index September 1991 A+PLUS design entry 301 design processing 303 EPLD programming 304 functional simulation 304 o verview 299 ABEL2MAX Converter 356 adapters sff P L E D /J /G /S /Q & P L M D /J /G /S /Q adapters ADP (see Altera Design Processor) AHDL (s«1 Altera Hardware Description Language)


    OCR Scan     		PDF

    program EPM5032

    Abstract: EPLD 5032 VC 5032
    Text: EPM 5032 EPLD Features □ H ig h -sp eed , sin gle-L A B M A X 5000 E PL D t PD as fast as 15 ns C ou n ter frequ en cies up to 77 M H z P ip elined d ata rates up to 83 M H z 32 in d iv id u ally con fig u rab le m acrocells 64 sh areab le exp an d er p ro d u ct term s "e x p a n d e rs " allo w in g 68


    OCR Scan     		PDF EPM5032 -883-C -883-com ALTED001 program EPM5032 EPLD 5032 VC 5032

    Altera EPM5128

    Abstract: WKX 62 EPM5016 epm5130 pinouts for 7400 series EPM5064 EPM5192 program EPM5032 EPM5128 PACKAGING PLDS-MAX
    Text: EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals.


    OCR Scan     		PDF EPM5016 EPM5192 20-pin 100-pin 15-ns Altera EPM5128 WKX 62 epm5130 pinouts for 7400 series EPM5064 program EPM5032 EPM5128 PACKAGING PLDS-MAX

    EPM5130

    Abstract: No abstract text available
    Text: A L TE RA CORP □5*15372 0 0 D 2 1 4 2 4bT « A L T 47E D 'P f D - 0 l EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from


    OCR Scan     		PDF EPM5016 EPM5192 20-pin 100-pin 15-ns EPM5130

    programming manual EPLD EPS448

    Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
    Text: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,


    OCR Scan     		PDF -DB-0793-01 EP330, EP610, EP610A, EP610T, EP910, EP910A, EP910T, EP1810, EP1810T, programming manual EPLD EPS448 Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000

    ALTERA MAX 5000

    Abstract: EPM5016 jlcc 32 R program EPM5032 epm5128a ALTERA MAX 5000 programming
    Text: M A X 5 0 00/EPS464 Programmable Logic Device Family Data Sheet August 1993, ver. 1 □ Features □ □ □ □ □ □ □ □ □ Advanced M ultiple Array M atrix MAX 5000/E P S464 architecture com bining speed and ease-of-use of PAL devices with density of


    OCR Scan     		PDF 00/EPS464 5000/E 20-pin 100-pin 65-micron 12-ns ALTED001 ALTERA MAX 5000 EPM5016 jlcc 32 R program EPM5032 epm5128a ALTERA MAX 5000 programming

    altera EP300

    Abstract: EPM7128 EPLD ep330 mpm5192 MPM512 MPM5128 alternative bipolar transistors book
    Text: M M r M p , 0 9 ra m m r .lv Data Sheet September 1991, ver. 2 Introduction 0 £ Programm able Logic Devices also described as P A L s , P L A s, F P L A s, PLD s, E P L D s , E E P L D s , LC A s, and F P G A s combine the logistical advantages of standard, fixed integrated circuits with the architectural flexibility of custom


    OCR Scan     		PDF

    25128LI

    Abstract: 5130LC vhdl 74161 5128LC 5192LC
    Text: fax id: 6100 p vXpX : v«*1 C Y 7 C 3 4 0 EP L D Fami l y - Multiple Array Matrix High-Density EPLDS tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. Feat ures • E r a s a b l e , u s e r - c o n f i g u r a b l e C M O S E P L D s c a p a b l e of


    OCR Scan     		PDF CY7C342B. 25128LI 5130LC vhdl 74161 5128LC 5192LC

    J-Lead, QFP ceramic

    Abstract: IC 7400 SERIES book EPM 5192
    Text: M A X 5000 Programmable Logic Device Family March 1995, ver. 2 Features. D a ta she et • ■ ■ ■ ■ ■ ■ Advanced M ultiple Array M atrix MAX 5000 architecture com bining speed and ease-of-use of PAL devices w ith density of program m able gate arrays


    OCR Scan     		PDF 28-pin 100-pin 10-ns 125-MHz J-Lead, QFP ceramic IC 7400 SERIES book EPM 5192

    D5032

    Abstract: IC TTL 7400 free J1810 Altera LP5 PLDS-ENCORE plej5128
    Text: PLDS-ENCORE MAX+PLUS, A+PLUS & SAM+PLUS Programmable Logic Development System Data Sheet September 1991, ver. 2 Contents □ □ □ □ □ General Description P L S -M A X — M A X + P L U S P ro g ra m m ab le Logic Softw are P L S - S U P R E M E — A + P L U S P ro g ra m m a b le L ogic Softw are


    OCR Scan     		PDF J1810 J5064 PLED910 486-based D5032 IC TTL 7400 free Altera LP5 PLDS-ENCORE plej5128

    F1G21

    Abstract: EPM5130
    Text: M A X 5000 Programmable Logic Device Family June 1996, ver. 3 Fe a tu re s . Data Sheet • ■ ■ ■ ■ ■ ■ ■ A d v a n c e d M u ltip le A rra y M a trix MAX 5000 a rc h ite c tu re c o m b in in g sp e e d a n d ease-o f-u se o f PA L d ev ic e s w ith th e d e n s ity o f


    OCR Scan     		PDF 100-pin 15-ns EPM5192 84-Pin F1G21 EPM5130