EM63A165TS-5G
Abstract: EM63A165TS-6G EM63A165TS-7G EM63A165TS cke 2009 EM63A165
Text: EtronTech EM63A165TS 16M x 16 bit Synchronous DRAM SDRAM Etron Confidential Features • • • • • • • • • • • • Fast access time from clock: 4.5/5.4/5.4 ns Fast clock rate: 200/166/143 MHz Fully synchronous operation Internal pipelined architecture
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Original
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EM63A165TS
16-bit
cycles/64ms
54-pin
EM63A165
EM63A165TS-5G
EM63A165TS-6G
EM63A165TS-7G
EM63A165TS
cke 2009
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PDF
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EM6A9160TSA-5G
Abstract: EM6A9160TSA EM6A9160 em6a9160ts em6a916
Text: EtronTech EM6A9160TSA 8M x 16 DDR Synchronous DRAM SDRAM Etron Confidential Features • • • • • • • • Fast clock rate: 200MHz Differential Clock CK & CK input Bi-directional DQS DLL enable/disable by EMRS Fully synchronous operation Internal pipeline architecture
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Original
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EM6A9160TSA
200MHz
16-bit
EM6A9160TSA-5G
EM6A9160TSA
EM6A9160
em6a9160ts
em6a916
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PDF
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EM638165TS
Abstract: COMMAND EM638165
Text: EtronTech EM638165 4Mega x 16 Synchronous DRAM SDRAM (Rev 1.9, 04/2007) Features • • • • • • • • • • • • • Key Specifications Fast access time from clock: 4.5/5/5.4 ns Fast clock rate: 200/166/143 MHz Fully synchronous operation
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Original
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EM638165
16-bit
cycles/64ms
54-pin
60-Ball,
4Mx16
60-Ball
EM638165TS
COMMAND
EM638165
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PDF
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sdram 1m x 4x 32
Abstract: EM636165 EM636165TS
Text: EtronTech EM636165 Industrial 1Mega x 16 Synchronous DRAM SDRAM (Rev.3.1, Jul/2007) Features Fast access time: 5/5.5 ns Fast clock rate: 166/143 MHz Self refresh mode: standard and low power Internal pipelined architecture 512K word x 16-bit x 2-bank Programmable Mode registers
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Original
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EM636165
Jul/2007)
16-bit
cycles/32ms
50-pin
60-ball,
1Mx16
60-Ball
sdram 1m x 4x 32
EM636165
EM636165TS
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PDF
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Etron Technology
Abstract: EM562166BC-55 EM562166BC-70
Text: EtronTech EM562166 128K x 16 Low Power SRAM Rev 1.5 04/2007 48-Ball BGA CSP , Top View Features • Single power supply voltage of 2.7V to 3.6V • Power down features using CE • Low operating current : 30mA(max for 55 ns) • Maximum Standby current : 35µA at 3.6 V
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Original
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EM562166
48-Ball
EM562166BC-55
EM562166BC-55G
EM562166TS-55
44pin
EM562166BC-70
Etron Technology
EM562166BC-55
EM562166BC-70
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PDF
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Untitled
Abstract: No abstract text available
Text: EtronTech Industrial EM638325 2M x 32 Synchronous DRAM SDRAM Rev 1.0 Mar/2006 Pin Assignment (Top View) Features Clock rate: 200/183/166/143 MHz Fully synchronous operation Internal pipelined architecture Four internal banks (512K x 32bit x 4bank) Programmable Mode
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Original
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EM638325
Mar/2006
32bit
cycles/64ms
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PDF
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EM6AA160
Abstract: EM6AA160TS-5G EM6AA160TS
Text: EtronTech EM6AA160TS 16M x 16 bit DDR Synchronous DRAM SDRAM Etron Confidential (Rev. 0.7 July/ 2008) Features Overview • • • • • • • • The EM6AA160 SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 256 Mbits. It is internally configured as a quad 4M x 16
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Original
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EM6AA160TS
EM6AA160
EM6AA160TS-5G
EM6AA160TS
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PDF
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EM63A165TS-6G
Abstract: EM63A165TS cke 2009 EM63A165TS-7G A80-1 EM63A165 A0912
Text: EtronTech EM63A165TS 16M x 16 bit Synchronous DRAM SDRAM Etron Confidential Features • • • • • • • • • • • • Fast access time from clock: 5/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation Internal pipelined architecture
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Original
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EM63A165TS
16-bit
cycles/64ms
54-pin
EM63A165
EM63A165TS-6G
EM63A165TS
cke 2009
EM63A165TS-7G
A80-1
A0912
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PDF
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EM68A16CWQB-25H
Abstract: EM68A16CWQB 2TWR EM68A Etron em68a16
Text: EtronTech EM68A16CWQB 16M x 16 bit DDRII Synchronous DRAM SDRAM Etron Confidential Advanced (Rev 1.1 July / 2010) Features Overview • JEDEC Standard Compliant • JEDEC standard 1.8V I/O (SSTL_18-compatible) • Power supplies: VDD & VDDQ = +1.8V ± 0.1V
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Original
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EM68A16CWQB
18-compatible)
333/400MHz
84-Ball
EM68A16CWQB-25H
EM68A16CWQB
2TWR
EM68A
Etron
em68a16
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PDF
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Untitled
Abstract: No abstract text available
Text: EtronTech EM584161 256K x 16 Low Power SRAM Rev 2.0 Features Pin Configuration • Single power supply voltage of 1.65V to 1.95V • Power down features using CE1# and CE2 48-Ball BGA CSP , Top View 1 2 3 4 5 6 • Low power dissipation • Data retention supply voltage: 0.9V to 1.95V
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Original
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EM584161
48-Ball
48-Ball
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PDF
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EM636327Q-8
Abstract: EM636327 EM636327JT-10 EM636327JT-8 EM636327Q-10 EM636327R-10 EM636327R-8 EM636327TQ-10 EM636327TQ-8
Text: EtronTech EM636327 512K x 32 High Speed Synchronous Graphics DRAM SGRAM Preliminary (12/98) Features • • • • • • • • • • • • • • Fast access time from clock: 5/5/5.5/6.5/7.5 ns Fast clock rate: 183/166/143/125/100 MHz Fully synchronous operation
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Original
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EM636327
32-bit
cycles/32ms
EM636327Q-8
EM636327
EM636327JT-10
EM636327JT-8
EM636327Q-10
EM636327R-10
EM636327R-8
EM636327TQ-10
EM636327TQ-8
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PDF
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EM638165TS-6
Abstract: em638165ts6 EM638165 EM638165TS-7 EM63816 em638165ts7
Text: EtronTech EM638165 4Mega x 16 Synchronous DRAM SDRAM Preliminary (Rev 0.6, 2/2001) Features • • • • • • • • • • • • Fast access time from clock: 5/6/6/6/7 ns Fast clock rate: 166/143/133/125/100 MHz Fully synchronous operation Internal pipelined architecture
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Original
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EM638165
16-bit
cycles/64ms
54-pin
EM638165
EM638165TS-6
em638165ts6
EM638165TS-7
EM63816
em638165ts7
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PDF
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EM562161BC-55
Abstract: EM562161BC-70 bhz 4-8
Text: EtronTech EM562161 128K x 16 Low Power SRAM Preliminary, Rev 1.0 07/2001 Features • Single power supply voltage of 2.7V to 3.6V • Power down features using CE1# and CE2 • Low operating current : 30mA max for 55 ns • Maximum Standby current : 10µA at 3.6 V
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Original
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EM562161
48-ball
48-Ball
EM562161BC-55
EM562161BC-70
bhz 4-8
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PDF
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EM669
Abstract: No abstract text available
Text: EtronTech EM66932A 4M x 32 Hand-Held Low Power SDRAM LPSDRAM Preliminary (Rev 0.1 June/2003) Features • • • • • Clock rate: 133/125/100 MHz Fully synchronous operation Internal pipelined architecture Four internal banks (1M x 32bit x 4bank) Programmable Mode
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Original
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EM66932A
June/2003)
32bit
cycles/64ms
11x13mto
90-FBGA,
EM669
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PDF
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EM639165TS-6G
Abstract: EM639165TS MX16 EM639165TS-7G EM639165TS7G EM639165 EM639165TS-6LG
Text: EtronTech EM639165 8Mega x 16 Synchronous DRAM SDRAM (Rev 1.6, 02/2007) Features • • • • • • • • • • • • • Fast access time from clock: 5/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation Internal pipelined architecture
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Original
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EM639165
16-bit
cycles/64ms
54-pin
EM639165
EM639165TS-6G
EM639165TS
MX16
EM639165TS-7G
EM639165TS7G
EM639165TS-6LG
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PDF
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NS4148
Abstract: EM634163TS-50 Em634163A-50 DO15 EM634163TS-45 EM634163TS-60
Text: EtronTech Em634163A 3.3V 256K x 16 High Speed EDO DRAM Preliminary Features Pin Assignment Top View • Fast Access Time: 45/50/60ns 40-Pin SOJ • Fast EDO Page Cycle Time: 18/20/25ns • EDO Page Mode Operation • Single +3.3V ± 0.3V Power Supply • Low Power Dissipation
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Original
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Em634163A
45/50/60ns
40-Pin
18/20/25ns
512-Cycle
40-Pin,
400-mil
40/44-Pin,
Em634163A-45
NS4148
EM634163TS-50
Em634163A-50
DO15
EM634163TS-45
EM634163TS-60
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PDF
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EM637327
Abstract: No abstract text available
Text: EtronTech EM637327 1Mega x 32 SGRAM Preliminary rev 0.6 05/2000 Features EM637327 tCK3 tRAS tAC3 tRC - 5.5/6/7/8 Clock Cycle time(min.) 5.5/6/7/8 ns Row Active time(max.) 38.5/42/42/48 ns Access time from CLK(max.) 5/5.5/5.5/6 ns Row Cycle time(min.) 55/60/63/72 ns
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Original
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EM637327
EM637327Q-5
EM637327TQ-5
EM637327Q-6
EM637327TQ-6
EM637327Q-7
EM637327TQ-7
EM637327Q-8
EM637327TQ-8
EM637327
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PDF
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EM63A165TS-6G
Abstract: EM63A165 EM63A165TS-7G MX16 EM63A165TS
Text: EtronTech EM63A165 16Mega x 16 Synchronous DRAM SDRAM (Rev 1.2, Aug., 2007) Pin Assignment (Top View) Features • • • • • • • • • • • • Fast access time from clock: 5/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation
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Original
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EM63A165
16Mega
16-bit
cycles/64ms
54-pin
EM63A165TS-6G
EM63A165
EM63A165TS-7G
MX16
EM63A165TS
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PDF
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EM562161BC-55
Abstract: EM562161BC-70 Etron Technology
Text: EtronTech EM562161 128K x 16 Low Power SRAM Preliminary, Rev 1.2 Dec/2007 Features • Single power supply voltage of 2.7V to 3.6V • Power down features using CE1# and CE2 • Low operating current : 25mA max for 55 ns • Maximum Standby current : 35 µA at 3.6 V
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Original
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EM562161
Dec/2007
48-ball
48-Pin
EM562161BC-55
EM562161BC-70
Etron Technology
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PDF
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Untitled
Abstract: No abstract text available
Text: EtronTech EM565168 512K x 16 Pseudo SRAM Rev 1.0 Features Sep. 2003 Pin Assignment 48-Ball BGA, Top View • Organized as 512K words by 16 bits • Fast Cycle Time : 55ns, 70ns • Standby Current : 100uA •Deep power-down Current : 10uA Memory cell data invalid
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Original
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EM565168
48-Ball
100uA
EM565168BC-XXG,
12MAX
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PDF
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EM565161
Abstract: No abstract text available
Text: EtronTech EM565161 512K x 16 Low Power SRAM Preliminary, Rev 1.2 Dec/2007 Features Pin Assignment • Single Power Supply Voltage, 3.0 ~ 3.6 V • Power Down Features Using CE1#, CE2, LB# and UB# • Low Power Dissipation 48-Ball BGA CSP , Top View 1 2 3
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Original
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EM565161
Dec/2007
48-Ball
48-Ball
EM565161
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PDF
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8X13
Abstract: No abstract text available
Text: EtronTech EM638325 2M x 32 Synchronous DRAM SDRAM (Rev 1.7 Oct./2007) Ordering Information Features Clock rate: 200/183/166/143 MHz Fully synchronous operation Internal pipelined architecture Four internal banks (512K x 32bit x 4bank) Programmable Mode - CAS# Latency: 2 or 3
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Original
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EM638325
32bit
cycles/64ms
8x13mm,
EM638325BK-5G
200MH
90-FBGA,
8X13
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PDF
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012MAX
Abstract: A15F4
Text: EtronTech EM566169BC 1M x 16 Pseudo SRAM Rev 0.6 Apr. 2004 Features Pad Assignment • Organized as 1M words by 16 bits • Fast Cycle Time : 60/65/70/85ns • Fast Page Cycle Time : 18/20/25/30ns • Page Read Operation by 8 words • Standby Current ISB1 : 100uA
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Original
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EM566169BC
60/65/70/85ns
18/20/25/30ns
100uA
48-ball
EM566169BC-60/65/70/85
12MAX
012MAX
A15F4
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PDF
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EM637165TS
Abstract: No abstract text available
Text: EtronTech EM637165 2Mega x 16 Synchronous DRAM SDRAM (Rev 0.2, 11/2007) Key Specifications Features • • • • • • • • • • • • • Fast access time from clock: 4.5/5/5.4 ns Fast clock rate: 200/166/143 MHz Fully synchronous operation
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Original
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EM637165
16-bit
cycles/64ms
54-pin
60-Ball,
2Mx16
60-Ball
EM637165TS
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PDF
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