XRT82D20IW
Abstract: T82D20 XRT82D20 400C 850C XRT7288 exar t82 T82D2 HDB3 schematic exar t82d20
Text: XRT82D20 SINGLE CHANNEL E1 LINE INTERFACE UNIT AUGUST 2006 REV. 1.0.8 • Clock Recovery and Selectable Crystal-less Jitter GENERAL DESCRIPTION The XRT82D20 is a fully integrated, single channel, Line Interface Unit Transceiver for 75 Ω or 120 Ω E1 (2.048 Mbps) applications. The LIU consists of a
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XRT82D20
XRT82D20
XRT82D20oes
XRT82D20IW
T82D20
400C
850C
XRT7288
exar t82
T82D2
HDB3 schematic
exar t82d20
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STF12A80
Abstract: BSTC1026 BSTD1046 BTB04-600SAP STF6A80 BSTD1040 TO510DH BSTC1040 TO812NJ BTB15-700B
Text: Cross Reference For the most up to date cross reference, go to the product portal: Manufacturer type number Manufacturer Philips type number Page number Manufacturer type number Manufacturer
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02CZ10
02CZ11
02CZ12
02CZ13
02CZ15
02CZ16
02CZ18
02CZ2
02CZ20
STF12A80
BSTC1026
BSTD1046
BTB04-600SAP
STF6A80
BSTD1040
TO510DH
BSTC1040
TO812NJ
BTB15-700B
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Intel 8081
Abstract: intel 80c188 users manual rur 450
Text: áç XRT82L24A QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR AUGUST 2004 REV. 1.1.2 GENERAL DESCRIPTION • Per-channel transmit power shutdown The XRT82L24A is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)
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XRT82L24A
XRT82L24A
048Mbps)
31-Jul-09
XRT82L24AIV-F
LQFP100
XRT82L24AIV
LQFP100
Intel 8081
intel 80c188 users manual
rur 450
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Intel 8081
Abstract: 8051 Read Write for 80c188 80C188 I960 XRT82L24A XRT82L24AIV encoder line driver
Text: áç XRT82L24A QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR AUGUST 2004 REV. 1.1.2 GENERAL DESCRIPTION • Per-channel transmit power shutdown The XRT82L24A is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)
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XRT82L24A
XRT82L24A
048Mbps)
Intel 8081
8051 Read Write for 80c188
80C188
I960
XRT82L24AIV
encoder line driver
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rur 450
Abstract: Intel 8081
Text: áç XRT82L24 QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR MARCH 2003 REV. 1.2.3 GENERAL DESCRIPTION • High receiver interference immunity The XRT82L24 is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)
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XRT82L24
XRT82L24
048Mbps)
rur 450
Intel 8081
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intel 80c188 users manual
Abstract: i906
Text: áç XRT82L24 QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR APRIL 2001 REV. 1.1.0 GENERAL DESCRIPTION • High receiver interference immunity The XRT82L24 is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)
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XRT82L24
XRT82L24
048Mbps)
intel 80c188 users manual
i906
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PDF
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Untitled
Abstract: No abstract text available
Text: XRT82L24 QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2004 REV. 1.2.4 GENERAL DESCRIPTION • High receiver interference immunity The XRT82L24 is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)
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XRT82L24
XRT82L24
048Mbps)
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Intel 8081
Abstract: 82L24 XRT82L24 XRT82L24IV 100-PIN TQFP XILINX DIMENSION 739s rur 450 intel 80c188 users manual
Text: áç XRT82L24 QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR OCTOBER 2001 REV. 1.2.1 GENERAL DESCRIPTION • High receiver interference immunity The XRT82L24 is a fully integrated Quad four channels short-haul line interface unit for E1(2.048Mbps)
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XRT82L24
XRT82L24
048Mbps)
Intel 8081
82L24
XRT82L24IV
100-PIN TQFP XILINX DIMENSION
739s
rur 450
intel 80c188 users manual
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Untitled
Abstract: No abstract text available
Text: áç XRT82L34 QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR APRIL 2001 REV. 1.0.0 GENERAL DESCRIPTION The XRT82L34 is a fully integrated Quad four channels short-haul line interface unit for T1(1.544Mbps) 100Ω and E1(2.048Mbps) 75Ω or 120Ω applications.
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XRT82L34
XRT82L34
544Mbps)
048Mbps)
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ANT-20
Abstract: GR-499-CORE XRT82L24 motorola 68000 microprocessor XRT82L34 648 ANALOG Pulse Transformer Intel 8081 20 pin ic hw rev.1.10
Text: áç XRT82L34 QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2001 REV. 1.1.0 GENERAL DESCRIPTION The XRT82L34 is a fully integrated Quad four channels short-haul line interface unit for T1(1.544Mbps) 100Ω and E1(2.048Mbps) 75Ω or 120Ω applications.
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XRT82L34
XRT82L34
544Mbps)
048Mbps)
ANT-20
GR-499-CORE
XRT82L24
motorola 68000 microprocessor
648 ANALOG
Pulse Transformer
Intel 8081 20 pin ic
hw rev.1.10
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Intel 8081
Abstract: No abstract text available
Text: áç XRT82L34 PRELIMINARY QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR DECEMBER 2000 REV. P1.0.5 GENERAL DESCRIPTION The XRT82L34 is a fully integrated Quad four channels short-haul line interface unit for T1(1.544Mbps) 100Ω and E1(2.048Mbps) 75Ω or 120Ω applications.
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XRT82L34
XRT82L34
544Mbps)
048Mbps)
Intel 8081
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Untitled
Abstract: No abstract text available
Text: áç XRT82L38 OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2001 REV. 1.1.1 GENERAL DESCRIPTION • High receiver interference immunity XRT82L38 is a fully integrated octal eight channels short-haul line interface unit for T1(1.544Mbps) 100Ω
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XRT82L38
XRT82L38
544Mbps)
048Mbps)
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octal priority encoder
Abstract: b8z8
Text: xr XRT82L38 PRELIMINARY OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR FEBRUARY 2001 REV. P1.0.6 GENERAL DESCRIPTION • High receiver interference immunity XRT82L38 is a fully integrated octal eight channels short-haul line interface unit for T1(1.544Mbps) 100Ω
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XRT82L38
XRT82L38
544Mbps)
048Mbps)
3840M
octal priority encoder
b8z8
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Untitled
Abstract: No abstract text available
Text: XRT72L71 PRELIMINARY DS3 ATM UNI/CLEAR CHANNEL FRAMER IC APRIL 2000 REV. P1.0.2 GENERAL DESCRIPTION The XRT72L71 DS3 ATM User Network Interface UNI /Clear-Channel Framer device is designed to function as either a DS3 ATM UNI or Clear channel framer IC. For ATM UNI applications, this device provides the ATM Physical Layer (Physical Medium Dependent and Transmission Convergence sub-layers)
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XRT72L71
XRT72L71
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Intel 8081
Abstract: No abstract text available
Text: áç XRT82L38 OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR APRIL 2001 REV. 1.0.0 GENERAL DESCRIPTION • High receiver interference immunity XRT82L38 is a fully integrated octal eight channels short-haul line interface unit for T1(1.544Mbps) 100Ω
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XRT82L38
XRT82L38
544Mbps)
048Mbps)
Intel 8081
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Untitled
Abstract: No abstract text available
Text: XRT72L73 PRELIMINARY 3 CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER IC APRIL 2000 REV. P1.0.0 GENERAL DESCRIPTION The XRT72L73 DS3 ATM User Network Interface UNI /Clear-Channel Framer device is designed to function as either a DS3 ATM UNI or a DS3 Clear Channel Framer IC. For ATM UNI applications, this
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XRT72L73
XRT72L73
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AA23
Abstract: GR-499-CORE XRT72L74IB XRT7300
Text: XRT72L74 PRELIMINARY 4 CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER IC APRIL 2000 REV. P1.0.0 GENERAL DESCRIPTION The XRT72L74 4 Channel DS3 ATM User Network Interface UNI /Clear-Channel Framer device is designed to function as either a DS3 ATM UNI or a DS3
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XRT72L74
XRT72L74
AA23
GR-499-CORE
XRT72L74IB
XRT7300
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intel 80c188 users manual
Abstract: No abstract text available
Text: XRT82L38 PRELIMINARY OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JANUARY 2001 REV. P1.0.5 GENERAL DESCRIPTION • High receiver interference immunity XRT82L38 is a fully integrated octal eight channels short-haul line interface unit for T1(1.544Mbps) 100Ω
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XRT82L38
XRT82L38
544Mbps)
048Mbps)
3840M
T82L38IV
intel 80c188 users manual
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Untitled
Abstract: No abstract text available
Text: áç XRT82L38 PRELIMINARY OCTAL E1/T1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JANUARY 2001 REV. P1.0.4 • Crystal-less jitter attenuator can be selected in the transmit or receive path GENERAL DESCRIPTION XRT82L38 is a fully integrated octal eight channels
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XRT82L38
XRT82L38
544Mbps)
048Mbps)
3840M
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B6S1
Abstract: AMI encoding upc uninterrupted power supply circuit diagram 68HC11 80C188 XRT83L34 XRT83SL34 XRT83SL34IV
Text: áç XRT83SL34 PRELIMINARY QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR DECEMBER 2001 REV. P1.0.0 GENERAL DESCRIPTION The XRT83SL34 is a fully integrated Quad four channels short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or 120Ω and J1 110Ω applications.
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XRT83SL34
XRT83SL34
544Mbps)
048Mbps)
B6S1
AMI encoding
upc uninterrupted power supply circuit diagram
68HC11
80C188
XRT83L34
XRT83SL34IV
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B6S1
Abstract: B4S2 68HC11 80C188 XRT83L34 XRT83L34IV dmo365 motorola 68000 microprocessor
Text: áç XRT83L34 PRELIMINARY QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR OCTOBER 2001 REV. P1.2.4 GENERAL DESCRIPTION The XRT83L34 is a fully integrated Quad four channels long-haul and short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or 120Ω
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XRT83L34
XRT83L34
544Mbps)
048Mbps)
772kHz
1024kHz
B6S1
B4S2
68HC11
80C188
XRT83L34IV
dmo365
motorola 68000 microprocessor
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dmo365
Abstract: 68HC11 80C188 XRT83L34 XRT83L34IV XRT83L38 intel 80c188 users manual
Text: áç XRT83L34 PRELIMINARY QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR OCTOBER 2001 REV. P1.2.3 GENERAL DESCRIPTION The XRT83L34 is a fully integrated Quad four channels long-haul and short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or 120Ω
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XRT83L34
XRT83L34
544Mbps)
048Mbps)
772kHz
1024kHz
dmo365
68HC11
80C188
XRT83L34IV
XRT83L38
intel 80c188 users manual
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Digital TV transmitter receivers block diagram
Abstract: X band attenuator Digital Alarm Clock using 8051 microprocessors and interfacing programming single ic 1hz clock generator 68HC11 80C188 XRT83L34 XRT83SL38 XRT83SL38IV
Text: áç XRT83SL38 PRELIMINARY OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR DECEMBER 2001 REV. P1.0.0 GENERAL DESCRIPTION The XRT83SL38 is a fully integrated Octal eight channels long-haul and short-haul line interface unit for T1(1.544Mbps) 100Ω, E1(2.048Mbps) 75Ω or
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XRT83SL38
XRT83SL38
544Mbps)
048Mbps)
Digital TV transmitter receivers block diagram
X band attenuator
Digital Alarm Clock using 8051
microprocessors and interfacing programming
single ic 1hz clock generator
68HC11
80C188
XRT83L34
XRT83SL38IV
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PT3527
Abstract: t82c5 line code manchester CRS22 ST 9248 transistor XR-T82515CP XR-T82C516CJ Manchester code T82C51 be325
Text: EXAR rr / c * 9 7 } 7~ / X X R - T 8 2 5 15 / T 8 2 C 5 16 W E LIM IN AB V DATA SHEET STARLAN Transceiver Chip Set GENERAL DESCRIPTION FEATURES The transceiver chip set X R - T 8 2 5 1 5 and X R - T 8 2 C 5 1 6 is intended fo r in terfacing between the transmission line and
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XR-T82515/T82C516
XR-T82515
XR-T82C516
PT3527
t82c5
line code manchester
CRS22
ST 9248 transistor
XR-T82515CP
XR-T82C516CJ
Manchester code
T82C51
be325
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