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    HARVARD ARCHITECTURE Search Results

    HARVARD ARCHITECTURE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MPC860DPCZQ50D4 Rochester Electronics LLC MPC860DP - PowerQUICC, 32 Bit Power Architecture SoC, 50MHz, -40 to 95C Visit Rochester Electronics LLC Buy
    MPC860PCVR66D4 Rochester Electronics LLC MPC860P - PowerQUICC, 32 Bit Power Architecture SoC, 66MHz, -40 to 95C Visit Rochester Electronics LLC Buy
    MPC860TCVR50D4 Rochester Electronics LLC MPC860T - PowerQUICC, 32 Bit Power Architecture, 50MHz, Communications Processor, -40 to 95C Visit Rochester Electronics LLC Buy
    MPC860DEVR50D4 Rochester Electronics LLC MPC860DE - PowerQUICC, 32 Bit Power Architecture SoC, 50MHz, 0 to 95C Visit Rochester Electronics LLC Buy
    MPC860ENZQ66D4 Rochester Electronics LLC MPC860EN - PowerQUICC, 32 Bit Power Architecture SoC, 66MHz, 0 to 95C Visit Rochester Electronics LLC Buy

    HARVARD ARCHITECTURE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    APP3770

    Abstract: MAXQ2000 MAXQ3210 MAXQ3212 MAXQ7665 MAXIM label AN3770
    Text: Maxim > App Notes > MICROCONTROLLERS Keywords: MAXQ, Programming, Table, Constant, Harvard Apr 19, 2006 APPLICATION NOTE 3770 Table Operations for the MAXQ Architecture Abstract: The MAXQ microcontroller is a Harvard machine. One should not, however, assume that MAXQ


    Original     		PDF com/an3770 MAXQ2000: MAXQ3210: MAXQ3212: MAXQ7665: AN3770, APP3770, Appnote3770, APP3770 MAXQ2000 MAXQ3210 MAXQ3212 MAXQ7665 MAXIM label AN3770

    32 pins qfn 5x5 footprint

    Abstract: MINIPROG "Digital Comparator" CY8C20x66 P0427 Mixed-Signal Array Technical Reference Manual Users guide to I2C-bus control programs QFN 56 7x7 0.5
    Text: CY8C20x46, CY8C20x66 CapSense Applications Features • Low Power CapSenseTM Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, TouchScreens, and Proximity Sensors ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C20x46, CY8C20x66 CY8C20x46: CY8C20x66: 32 pins qfn 5x5 footprint MINIPROG "Digital Comparator" CY8C20x66 P0427 Mixed-Signal Array Technical Reference Manual Users guide to I2C-bus control programs QFN 56 7x7 0.5

    SAR10

    Abstract: cy8c28000 cy8c28000-24pvxi BA RW CY8C28452-24PVXI CY8C28403-24PVXI transistor BA RW 85Y12 ae rw CY8C27443-24PXI
    Text: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, SAR10 cy8c28000 cy8c28000-24pvxi BA RW CY8C28452-24PVXI CY8C28403-24PVXI transistor BA RW 85Y12 ae rw CY8C27443-24PXI

    SAR10

    Abstract: 339 opamp 3 pin fan speed control using pwm BA RW bc 339 ae rw E100 HMI Manual
    Text: CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 Extended Industrial PSoC Programmable System-on-Chip Features ❐ ❐ • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 32-Bit SAR10 339 opamp 3 pin fan speed control using pwm BA RW bc 339 ae rw E100 HMI Manual

    cop interface

    Abstract: 56800E DSP56800E DSP56800ERM DSP56854 DSP56854FG120 DSP56854PB "quad Timer"
    Text: Digital Signal Controllers 56854 Target Applications > Stand-alone MP3 player > Voice processing > Multiprocessor telephony systems > Digital telephone answering device The 56800E core is based on a Harvard-style architecture consisting of three execution


    Original     		PDF 56800E 56854FS DSP56854 DSP56854FG120 cop interface DSP56800E DSP56800ERM DSP56854 DSP56854FG120 DSP56854PB "quad Timer"

    Untitled

    Abstract: No abstract text available
    Text: CY8C21345/CY8C21645 CY8C22345/CY8C22345H/CY8C22645 Automotive PSoC Programmable System-on-Chip Automotive PSoC ® Programmable System-on-Chip™ Features ❐ • Automotive Electronics Council AEC Q100 qualified Powerful Harvard-architecture processor


    Original     		PDF CY8C21345/CY8C21645 CY8C22345/CY8C22345H/CY8C22645 32-bit

    Untitled

    Abstract: No abstract text available
    Text: CY8C21345, CY8C21645 CY8C22345, CY8C22345H, CY8C22645 Automotive PSoC Programmable System-on-Chip Automotive PSoC ® Programmable System-on-Chip™ Features ❐ • Automotive Electronics Council AEC Q100 qualified Powerful Harvard-architecture processor


    Original     		PDF CY8C21345, CY8C21645 CY8C22345, CY8C22345H, CY8C22645 32-bit 10-bit

    Untitled

    Abstract: No abstract text available
    Text: STLUX385A Digital controller for lighting and power conversion applications with 6 programmable PWM generators, 96 MHz PLL, DALI Datasheet - production data • Integrated microcontroller – Advanced STM8 core with Harvard architecture and 3-stage pipeline


    Original     		PDF STLUX385A TSSOP38 DocID024387

    85Y12

    Abstract: SSOP24-5 AN2349 ASD22 ASD11
    Text: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, 85Y12 SSOP24-5 AN2349 ASD22 ASD11

    sharc ADSP-21xxx

    Abstract: ipac ADSP-2100 ADSP-21060 ADSP-21061 ADSP-21062 ADSP-21065L ADSP-21160 ADSP-21161N sharc ADSP-21xxx architecture INSTRUCTION SET
    Text: PRELIMINARY TECHNICAL DATA a DSP Microcomputer ADSP-21161N Preliminary Technical Data SUMMARY High performance 32-bit DSP—applications in audio, medical, military, wireless communications, graphics, imaging, motor-control, and telephony Super Harvard Architecture—four independent buses


    Original     		PDF ADSP-21161N 32-bit 225-lead sharc ADSP-21xxx ipac ADSP-2100 ADSP-21060 ADSP-21061 ADSP-21062 ADSP-21065L ADSP-21160 ADSP-21161N sharc ADSP-21xxx architecture INSTRUCTION SET

    Cypress Projected Capacitive touch sensor design

    Abstract: easy bread board Project 32 pins qfn 5x5 footprint capacitive touch key sensor cypress MCU capacitive touch key sensor MCU Cypress touch datasheet keypad 4x4 assembly code hmt design data book IMO Timer CY8C20234
    Text: CY8C20234, CY8C20334 CY8C20434, CY8C20534 PSoC Mixed-Signal Array Features • Low Power CapSense Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, and Proximity Sensors ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C20234, CY8C20334 CY8C20434, CY8C20534 Cypress Projected Capacitive touch sensor design easy bread board Project 32 pins qfn 5x5 footprint capacitive touch key sensor cypress MCU capacitive touch key sensor MCU Cypress touch datasheet keypad 4x4 assembly code hmt design data book IMO Timer CY8C20234

    ASC21

    Abstract: ACB01CR2 ACB00CR1
    Text: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 Extended Industrial PSoC Programmable System-on-Chip Features ❐ ❐ • Varied Resource Options Within One PSoC Device Group ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 32-Bit ASC21 ACB01CR2 ACB00CR1

    cy8c28000-24pvxi

    Abstract: 56-pin 7x7 QFN cy8c28000 graphical LCD PSoc BA RW QFN 64 8x8 footprint scl 4026 ae pin diagram
    Text: CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied Resource Options Within One PSoC® Device Group ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, cy8c28000-24pvxi 56-pin 7x7 QFN cy8c28000 graphical LCD PSoc BA RW QFN 64 8x8 footprint scl 4026 ae pin diagram

    LT32B

    Abstract: CY8C20234 CY8C20334 CY8C20434 CY8C20534 W1032 LS32B mini projects using bread board and integrated
    Text: CY8C20234, CY8C20334 CY8C20434, CY8C20534 PSoC Mixed-Signal Array Features • Low Power CapSense Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, and Proximity Sensors ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C20234, CY8C20334 CY8C20434, CY8C20534 LT32B CY8C20234 CY8C20334 CY8C20434 CY8C20534 W1032 LS32B mini projects using bread board and integrated

    ADSP-21000

    Abstract: ADSP-21060 reference manual ADSP-21062 ADSP-21060 ADSP-21060L ADSP-21062L
    Text: a ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21060 SUMMARY High Performance Signal Processor for Communications, Graphics, and Imaging Applications Super Harvard ARchitecture Computer SHARC — Four Independent Buses for Dual Data Fetch,


    Original     		PDF ADSP-2106x ADSP-21062/ADSP-21060 32-Bit 240-Lead 40-Bit ADSP-21060KS-133* ADSP-21060KS-160* ADSP-21060LKS-133* ADSP-21000 ADSP-21060 reference manual ADSP-21062 ADSP-21060 ADSP-21060L ADSP-21062L

    Untitled

    Abstract: No abstract text available
    Text: CY8C28243, CY8C28403, CY8C28413 PRELIMINARY CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied Resource Options Within One PSoC® Device Group ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623,

    mini projects using bread board and integrated

    Abstract: CY8C20234 CY8C20334 CY8C20434 CY8C20534
    Text: CY8C20534, CY8C20434 CY8C20334, CY8C20234 PSoC Mixed-Signal Array Features • Low Power CapSense Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, and Proximity Sensors ■ Powerful Harvard Architecture Processor


    Original     		PDF CY8C20534, CY8C20434 CY8C20334, CY8C20234 mini projects using bread board and integrated CY8C20234 CY8C20334 CY8C20434 CY8C20534

    ACI0-10

    Abstract: potentiometer sensor cy8c28413
    Text: CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, CY8C28643, CY8C28645 PSoC Programmable System-on-Chip Features ❐ • Varied resource options within one PSoC® device group ■ Powerful Harvard-architecture processor


    Original     		PDF CY8C28243, CY8C28403, CY8C28413 CY8C28433, CY8C28445, CY8C28452 CY8C28513, CY8C28533, CY8C28545 CY8C28623, ACI0-10 potentiometer sensor cy8c28413

    ADSP-21000

    Abstract: ADSP-21060 ADSP-21060L ADSP-21062 ADSP-21062L
    Text: ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21060 a SUMMARY High Performance Signal Processor for Communications, Graphics, and Imaging Applications Super Harvard ARchitecture Computer SHARC — Four Independent Buses for Dual Data Fetch,


    Original     		PDF ADSP-2106x ADSP-21062/ADSP-21060 32-Bit 240-Lead 40-Bit ADSP-21060KS-133* ADSP-21060KS-160* ADSP-21060LKS-133* ADSP-21000 ADSP-21060 ADSP-21060L ADSP-21062 ADSP-21062L

    Untitled

    Abstract: No abstract text available
    Text: ANALOG D E V IC E S □ SHARC Super Harvard Architecture Computers ADSP-21060/ADSP-21062 SUMMARY High Performance Signal Processor for Speech, Sound, Graphics, and Imaging Applications Super Harvard Architecture— Four Independent Buses for Dual Data, Instructions, and I/O


    OCR Scan     		PDF ADSP-21060/ADSP-21062 32-Bit

    m15m R2

    Abstract: ADSP-21XXX architecture ADSP-21020 adsp21020kg133
    Text: ANALOG ► DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution


    OCR Scan     		PDF 1024-Point 32-Bit 40-Bit 80-Bit ADSP-21020KG-80 ADSP-21020KG-100 ADSP-21020KG-133 ADSP-21020BG-80 SP-21020BG-100 m15m R2 ADSP-21XXX architecture ADSP-21020 adsp21020kg133

    Untitled

    Abstract: No abstract text available
    Text: DSP Microcomputer ADSP-21160 ANALOG DEVICES Preliminary Technical Data SUMMARY KEY FEATURES . H igh performance 32-bit D SP— applications in audio, medical, m ilitary, graphics, imaging, and communication . Super Harvard Architecture— four independent


    OCR Scan     		PDF ADSP-21160 32-bit 32-bit ADSP-21160MKB-80 ADSP-21160MKB-100 400-lead

    TT 46 N 16 KOF

    Abstract: DT 75 N 16/14 KOF til 3881 3881 tt 60 n 16 kof ADSP-21060 ADSP-21061 ADSP-21062 ADSP-21160 ADSP2116x
    Text: DSP Microcomputer ADSP-21160 ANALOG DEVICES Preliminary Technical Data SUMMARY KEY FEATURES . H igh performance 32-bit D SP— applications in audio, medical, m ilitary, graphics, imaging, and communication . Super Harvard Architecture— four independent


    OCR Scan     		PDF ADSP-21160 32-bit ADSP-2106x ADSP-21160MKB-80 ADSP-21160MKB-100 400-lead D0LL70S TT 46 N 16 KOF DT 75 N 16/14 KOF til 3881 3881 tt 60 n 16 kof ADSP-21060 ADSP-21061 ADSP-21062 ADSP-21160 ADSP2116x

    sem 2105 16 pin

    Abstract: No abstract text available
    Text: ADSP-2100 Family DSP Microcomputers ADSP-21XX ANALOG DEVICES SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/


    OCR Scan     		PDF ADSP-2100 ADSP-21XX 16-Bit ADSP-2111 ADSP-2111) ADSP-2164BS-40 68-Lead 80-Lead sem 2105 16 pin