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    IC 4 BIT BISTABLE LATCH DEVICE Search Results

    IC 4 BIT BISTABLE LATCH DEVICE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TCTH022BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Open-drain type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation
    TCKE800NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE812NL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, Fixed Over Voltage Clamp, WSON10B Visit Toshiba Electronic Devices & Storage Corporation
    TCKE712BNL Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 13.2 V, 3.65 A, Latch, Adjustable Over Voltage Protection, WSON10 Visit Toshiba Electronic Devices & Storage Corporation
    TCTH022AE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Push-pull type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation

    IC 4 BIT BISTABLE LATCH DEVICE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    verilog prbs generator

    Abstract: prbs pattern generator using vhdl AOI gate d flip flop
    Text: ASIC Design Guidelines Introduction The Atmel ASIC Design Guidelines constitute a general set of recommendations intended for use by designers when preparing circuits for fabrication by Atmel. The guidelines are independent of any particular CAD tool or silicon process. They are


    Original     		PDF 12/99/xM verilog prbs generator prbs pattern generator using vhdl AOI gate d flip flop

    Untitled

    Abstract: No abstract text available
    Text: January 1988 S em ic o nd u cto r MM54HC75/MM74HC75 _ 4-Bit Bistable Latch with Q and Q Output General Description This 4-bit latch utilizes advanced silicon-gate CMOS tech­ nology to achieve the high noise immunity and low power consumption normally associated with standard CMOS inte­


    OCR Scan     		PDF MM54HC75/MM74HC75 MM54HC75/MM74HC75

    Untitled

    Abstract: No abstract text available
    Text: SN54HC75, SN74HC75 4 BIT BISTABLE LATCHES D2684. D EC EM B ER 1982 • Complimentary Q and Q Outputs • Package Options Include Plastic "Sm all Outline" Packages, Standard Plastic and Ceramic 300-mii DIPs • Dependable Texas Instruments Quality and Reliability


    OCR Scan     		PDF SN54HC75, SN74HC75 D2684. 300-mii

    SN54HC

    Abstract: 74HC77
    Text: SN54HC77, SN74HC77 4 BIT BISTABLE LATCHES D2684 DECEMBER 1952 - REV'SED SEPTEJVSER 1.9S7 • • I I O u tlin e " P a c k a g e s , Sta n d a rd P la stic C e ra m ic 3 0 0 -m il D IPs • I P a c k a g e O p tio n s In clu de P la stic " S m a ll SN 54H C 77 . . . J P A C KA G E


    OCR Scan     		PDF SN54HC77, SN74HC77 D2684 SN54HC 74HC77

    SN54HC75

    Abstract: ic 4 bit bistable latch device SN74HC75 SN54HC77
    Text: SNS4HC75, SN74HC75 4 BIT BISTABLE LATCHES D2684, D EC EM BER 1982 - R E V IS E D S E P T E M B E R 1 9 8 7 SN 54H C75 . . . J PACKAG E SN 74H C75 D OR N P A C K A G E Complimentary Q and Q Outputs Package Options Include Plastic "Small Outline" Packages, Standard Plastic and


    OCR Scan     		PDF SNS4HC75, SN74HC75 D2684, 300-mil sns4hc75 sn74hc7s SN54HC75 ic 4 bit bistable latch device SN74HC75 SN54HC77

    Untitled

    Abstract: No abstract text available
    Text: SN54HC75, SN74HC75 4 BIT BISTABLE LATCHES D 2 6 8 4 , DECEMBER 1982 - Complimentary Q and Q Outputs SN 54H C 75 . REVISED SEPTEMBER 1987 . J PACKAGE S N 7 4 H C 7 5 . . . D O R N PACKAGE Package Options Include Plastic "Sm all O utline" Packages, Standard Plastic and


    OCR Scan     		PDF SN54HC75, SN74HC75 300-m

    Untitled

    Abstract: No abstract text available
    Text: SN54HC77, SN74HC77 4-BIT BISTABLE LATCHES D 2 6 8 4 , DECEMBER 1982 - Package Options Include Plastic "Small Outline" Packages, Standard Plastic and Ceramic 300-mil DIPs SN54HC77 . . . J PACKAGE SN74HC77 . . . D OR N PACKAGE TOP VIEW] 1DC Dependable Texas Instruments Quality and


    OCR Scan     		PDF SN54HC77, SN74HC77 300-mil SN54HC77

    54LS

    Abstract: 74LS LS75 SN5475 SN5477 SN54LS75 SN54LS77 SN7475 SN74LS75 ls-77
    Text: SN5475, SN5477, SN54LS75, SN54LS77, SN7475, SN74LS75 4-BIT BISTABLE LATCHES MARCH 1974 - REVISED MARCH 1988 S N 5 4 7 5 . S N 5 4 L S 7 5 . . . J OR W P A C K A G E SN 7475 . NPACKAGE SN 74LS75 . . . D OR N PACKAGE F U N C TIO N T A B L E e a ch latch IN P U T S


    OCR Scan     		PDF 1N3064 54LS 74LS LS75 SN5475 SN5477 SN54LS75 SN54LS77 SN7475 SN74LS75 ls-77

    SN74HC375

    Abstract: SN54HC375
    Text: SN54H C375, SN74HC375 4 BIT BISTABLE LATCHES D 2 8 0 4 , M AR CH 1 9 8 4 -R E V IS E D SEPTEMBER 1987 S N 5 4 H C 3 7 5 . . J PAC KAG E S N 7 4 H C 3 7 5 . . . D OR N PAC KA G E P ackage O ptions Include Plastic " S m a ll O u tlin e '' Packages, C eram ic C hip C arriers,


    OCR Scan     		PDF SN54HC375, SN74HC375 D2804, 1984-REVISED 300-mil SN54HC375 SN54HC75 SN74HC75,

    SN74LS75

    Abstract: sn5477 SN74LS75 pin diagram 54LS LS75 SN5475 SN54LS75 SN54LS77 SN7475 5N74
    Text: TYPES SN5475, SN5477, SN54L75, SN54L77, SN54LS75, SN54LS77, SN7475, SN74LS75 4-BIT BISTABLE LATCHES MARCH 1 9 7 4 — R E V IS E D D E C E M B E R F U N C T IO N TAB LE S IU 547S. S N 5 4 L S 7 5 . . . J O R W PACKAGE S N 5 4 L 7 5 . . . J PACKAGE S N 7 4 7 5 . . . J OR N PACKAGE


    OCR Scan     		PDF SN5475, SN5477, SN54L75, SN54L77, SN54LS75, SN54LS77, SN7475, SN74LS75 N3064 sn5477 SN74LS75 pin diagram 54LS LS75 SN5475 SN54LS75 SN54LS77 SN7475 5N74

    LS 7475

    Abstract: C4408
    Text: SN5475, SN5477, SN54LS75, SN54LS77. SN7475, SN74LS75 4 BIT BISTABLE LATCHES MAR CH 1 9 7 4 - each latch (TOP VIEW) OUTPUTS INPUTS REVISED M A R C H 1 9 8 8 SN 5475 , SN 54LS75 . . . J OR W PACKAGE S N 7475 . . . N PACKAGE SN 74LS 75 . . . D O R N PACKAGE


    OCR Scan     		PDF SN5475, SN5477, SN54LS75, SN54LS77. SN7475, SN74LS75 54LS75 SN54LS77 LS 7475 C4408

    dual latching relay ic

    Abstract: 194-2H MT4322AC keypad network VARISTOR OJP MT4320
    Text: ISO-CMOS M f 4 6 ^ 0 1 4 3 2 2 1 4 3 2 3 M ITEL Keypad Pulse Dialer J A N . 1982 Features • • • • • • • • Pin Connections Pin for pin replacement for the DF320 2.5V to 5.5V supply voltage operating range 375pW dynamic power dissipation at 3.0V


    OCR Scan     		PDF DF320 375pW 58MHz 932Hz F02eC MT4320. MT4320/4322/4323 dual latching relay ic 194-2H MT4322AC keypad network VARISTOR OJP MT4320

    MT4320

    Abstract: matrix encoded keypad DF320 MT4320AE telephone KEYPAD telephone keypad interface circuit with dtmf MT4320AC "Pin for Pin" circuit diagram of keypad interface with dtmf circuit diagram of speech recognition
    Text: ISO-CMOS M T4320 Keypad Pulse Dialer MITEL Features • • • • • • • • Pin Connections Pin for pin replacement for the DF320 2.5V to 5.5V supply voltage operating range 375pW dynamic power dissipation at 3.0V Uses inexpensive 3.58MHz ceramic resonator or


    OCR Scan     		PDF MT4320 DF320 375/jW 58MHz DF320 MT4320. matrix encoded keypad MT4320AE telephone KEYPAD telephone keypad interface circuit with dtmf MT4320AC "Pin for Pin" circuit diagram of keypad interface with dtmf circuit diagram of speech recognition

    T4320

    Abstract: MT4320AE 3 x 4 telephone keypad
    Text: ISO-CMOS MT4320 Keypad Pulse Dialer M IT E L J A N 1985 Features • • • • • • • • Pin Connections Pin for pin replacement for the DF320 2.5V to 5.5V supply voltage operating range 375pW dynamic power dissipation at 3.0V Uses inexpensive 3.58MHz ceramic resonator or


    OCR Scan     		PDF MT4320 DF320 375pW 58MHz 932Hz MT4320. T4320 MT4320AE 3 x 4 telephone keypad

    54LS75

    Abstract: 1N3064 54LS375 DRD4
    Text: g Military 54LS75 MOTOROLA 4-Bit Bistable Latch With Q and Q MPO unni ELECTRICALLY TESTED PER: MIL-M-38510/31601 The 54LS75 is a 4-Bit D-Type Latch for use as temporary storage for binary information between processing limits and input/output or indicator units. Information present at the data (D) input is transferred to


    OCR Scan     		PDF MIL-M-38510/31601 54LS75 1N3064 54LS375 DRD4

    74HC4052E

    Abstract: 74HC194E 74HC4046AE 74HC4067E 74HC4538E 74HCT4511E 54HCT20 74HC4060E 074h 74hct27e
    Text: Product Selectors Index to Devices CMOS Logic TTL Logic Plastic Pkg. CERDIP Plastic Pkg. C D 74H C 00E .M CD 74H C 02E.M C D 74H C 03E .M •C D 7 4H C 04 E .M C D 74H C 08E.M CD 54H C 00F CD 54H C 02F CD 54H C 03F •C D 5 4 H C 0 4 F CD 54H C 08F C D 74H CT00E.M


    OCR Scan     		PDF 4316F CD54HCT4351F CD54HCT4352F CD54HCT4353F CD54HCT4510F CD54HCT4511F 54HCT4514F CD54HCT4515F 54HCT4516F C054H 74HC4052E 74HC194E 74HC4046AE 74HC4067E 74HC4538E 74HCT4511E 54HCT20 74HC4060E 074h 74hct27e

    1N3064

    Abstract: 54LS375 2E124
    Text: M M O T O R O L A Military 54LS375 4-Bit Bistable Latch ELECTRICALLY TESTED PER: Ml L-M-38510/31604 The 54LS375 is a 4-bit D-Type Latch for use as temporary storage for binary information between processing limits and input/output or indicator units. When the Enable (E) is HIGH, information present at the


    OCR Scan     		PDF L-M-38510/31604 54LS375 1N3064 2E124

    Signal path designer

    Abstract: No abstract text available
    Text: David A. Laws and Peter Alfke Advanced Micro Devices, Inc., Sunnyvale, CA Standardizes Around Slim 24-Pin Package Most 1C designers tend to focus their attention on ever more complex VLSI solutions to improve the package count, cost, and reliability of microprocessor based sys­


    OCR Scan     		PDF 24-Pin 20-pin 10-bit 5405A Signal path designer

    Untitled

    Abstract: No abstract text available
    Text: M M O T O R O L A M ilitary 54LS375 4-Bit Bistable Latch ELECTRICALLY TESTED PER: Ml L-M-38510/31604 HPO mm The 54LS375 is a 4-bit D-Type Latch for use as temporary storage for binary information between processing limits and input/output or indicator units. When the Enable (E) is HIGH, information present at the


    OCR Scan     		PDF 54LS375 L-M-38510/31604 54LS375 JM38510/31604BXA 54LS375/BXAJC 1N3064

    mm74c107n

    Abstract: MM74C151N 20K Preset MM74C30N mm74coon MM74C83N MM74C00N MM74C154N MM74C10N MM74C161N
    Text: National Sem iconductor Sem iconductors Integrated Circuits - Digital C M O S MM74C Series C M O S F u nctionally e q uivalen t to Sta n d a rd 74 S e rie s Pin com p atib le w ith Sta n d a rd 74 Se rie s. D issip a tio n ty p ic a lly 10 n an ow atts per gate


    OCR Scan     		PDF MM74C SN7474N SN74H74N/SN74S74N SN74L74N/SN74C74N SN74H78N SN7475N SN7476N SN74H76N/SN74C76N SN7480N SN7481N mm74c107n MM74C151N 20K Preset MM74C30N mm74coon MM74C83N MM74C00N MM74C154N MM74C10N MM74C161N

    Untitled

    Abstract: No abstract text available
    Text: 4722B PROGRAMMABLE TIMER/COUNTER G E N E R A L D E S C R IP T IO N — The 4 7 2 2 B Program m able Tim er/Counter is a rrt nolifhic controller capable of producing accurate m icrosecond to five day time delays. L o n g delays, up to three years, can easily be generated by cascading tw o timers. The timer consists of a tim e base oscillator p ro ­


    OCR Scan     		PDF 4722B 4722B

    1057

    Abstract: MC-10153 MC10137 MC10141 MC10537 MCM10140 MCM10142 MCM10143 MCM10144 MCM10145
    Text: 10.000 LOGIC DIAGRAMS N u m b e rs in p a re n th e s is d e n o te pin n u m b e rs fo r F p a c k a g e C ase 6 5 0 F U N C T IO N S A N D C H A R A C T E R IS T IC S (continued) Type F u n c tio n U n iv e rs a l D e ca d e C o u n te r B i- Q u in a ry C o u n te r


    OCR Scan     		PDF MC10137 MC10537 64-Bit MCM10140 MC10141 MCM10142 MCM10143 256-Bit MCM10144 1057 MC-10153 MCM10145

    a2240

    Abstract: uA2240 A2240PC uA2240 "pin compatible" staircase timer controller uA2240 time setting A2240C circuit diagram of MOD 100 counter staircase controller digital tachometer
    Text: UÄ2240 PROGRAMMABLE TIMER/COUNTER FAIRCHILD LINEAR IN TEG RATED CIRCU IT S Q E N E R A L D E S C R IP T IO N - The /¿A2240 Programmable Timer/Counter is a monolithic control­ ler capable of producing accurate microsecond to five day time delays. Long delays, up to three


    OCR Scan     		PDF uA2240 //A2240 a2240 A2240PC uA2240 "pin compatible" staircase timer controller uA2240 time setting A2240C circuit diagram of MOD 100 counter staircase controller digital tachometer

    Untitled

    Abstract: No abstract text available
    Text: MV4325 W PLESSEY Semiconductors \ MV4325 PROGRAMMABLE KEYPAD PULSE DIALLER The MV4325 Keypad Pulse Dialler contains all the logic necessary to interface a 2 of 7 keypad and convert this key information to control and mute pulses simulating a tele­ phone rotary dial. The MV4325 has programmable access


    OCR Scan     		PDF MV4325 MV4325