K743
Abstract: military specification M55302 10-296943-22 removal tool snap on tools for electronic IO2-120 MIL-G-45204 MIL-P-46161 amphenol 77820 MB3-132 io3051
Text: Amphenol Low Mating Force Rectangular Connectors 12-035-10 MIL-C-55302 Amphenol Table of Contents Page No. 1 Item The B3 Contact Innovation 2, 3 Low Mating Force Electrical Connectors 4 Low Mating Force Hybrid Configurations 5–8 8, 9 10, 11 How to Order
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MIL-C-55302
L-2104
L-2081
K743
military specification M55302
10-296943-22 removal tool
snap on tools for electronic
IO2-120
MIL-G-45204
MIL-P-46161
amphenol 77820
MB3-132
io3051
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PDF
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729-Pin
Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Text: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at
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180-Pin
AX125
IO32NB3F3
IO59NB5F5
729-Pin
Axcelerator FPGAs
IO126PB3F11
AG18
FBGA 896
896-Pin
Axcelerator Family FPGAs
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PDF
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dual-port RAM
Abstract: AT17 AT17LV010-10DP AT40K MQFPF256 IO358
Text: Features • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series • Ultra High Performance • • • • • • • • • • • • • • – System Speeds 60 MHz – Array Multipliers > 32 MHz – 18 ns Flexible SRAM
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AT40K
AT40KEL040
4155F
dual-port RAM
AT17
AT17LV010-10DP
MQFPF256
IO358
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PDF
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LGA 478 SOCKET PIN LAYOUT
Abstract: RTAX2000
Text: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg
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TM1019
LGA 478 SOCKET PIN LAYOUT
RTAX2000
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PDF
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RTAX2000
Abstract: footprint cqfp 280 RTAX1000S actel cqfp 84
Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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TM1019
RTAX2000
footprint cqfp 280
RTAX1000S
actel cqfp 84
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56 pin edac connector
Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
Text: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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TM1019
56 pin edac connector
PCB footprint cqfp 132
Silicon Sculptor II
ACTEL CCGA 624 mechanical
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PDF
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RTAX2000
Abstract: rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3
Text: v5.1 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg
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TM1019
RTAX2000
rtax4000
CDB 455 C34
IO358
DIODE SMD V05
128X3
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PDF
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J32CG
Abstract: 61a3 mosfet BCM5461KFB 61a3 58A6 bcm5461 60F10 L32SD DQ27152 A26B4
Text: 1 2 4 3 5 6 7 TABLE OF CONTENTS F F PAGE 02 - BLOCK DIAGRAM PAGE 03 - 750GX ADDRESS/DATA BUSSES PAGE 04 - 750GX CONTROLS AND GROUND PAGE 05 - 750GX POWER AND DECOUPLING PAGE 06 - TSI108 PROCESSOR BUS INTERFACE PAGE 07 - TSI108 MEMORY INTERFACE PAGE 08 - DDR2 DIMM CONNECTOR SLOT 0
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750GX
TSI108
RS232
NC7SZ00
J32CG
61a3 mosfet
BCM5461KFB
61a3
58A6
bcm5461
60F10
L32SD
DQ27152
A26B4
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PDF
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ACTEL CCGA 1152 mechanical
Abstract: AX125 AX2000 CQ208 CQ256 CS180 FG256 PQ208 Trd16 Axcelerator Family FPGAs
Text: v2.8 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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tag 87
Abstract: ATF697FF EB 203 D AT697 ATF280F AT697F PCI analogic device power 23MFLOPS ATF697FF-ZA-E 0x8000004C
Text: ATF697FF Rad- hard 32 bit SPARC V8 Reconfigurable Processor DATASHEET Features • SPARC V8 High Performance Low-power 32-bit processor core • AT697F Sparc v8 processor • LEON2-FT 1.0.9.16.1 compliant • 8 Register Windows • Advanced Architecture 5 Stage Pipeline
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ATF697FF
32-bit
AT697F
32/64-bit
ATF280F
tag 87
ATF697FF
EB 203 D
AT697
AT697F PCI
analogic device power
23MFLOPS
ATF697FF-ZA-E
0x8000004C
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PDF
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IO358
Abstract: AT17 AT17LV010-10DP AT40K MQFPF256 MQFP-256
Text: Features • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series • Ultra High Performance • • • • • • • • • • • • • • • – System Speeds 60 MHz – Array Multipliers > 32 MHz – 18 ns Flexible SRAM
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AT40K
AT40KEL040
4155G
IO358
AT17
AT17LV010-10DP
MQFPF256
MQFP-256
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PDF
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dunlop s 708
Abstract: PTI 30 040 ga AX125 AX2000 CS180 FG256 FG324 FG484 PQ208 M33 thermal fuse
Text: Advanced v1.5 Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO"
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64-bit
608-bit
dunlop s 708
PTI 30 040 ga
AX125
AX2000
CS180
FG256
FG324
FG484
PQ208
M33 thermal fuse
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PDF
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Untitled
Abstract: No abstract text available
Text: Revision 16 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)
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TM1019
MIL-STD-883B
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IO358
Abstract: IO149 AT17 AT17LV010-10DP AT40K MQFPF256 IO303 IO220 IO369
Text: Features • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series • Ultra High Performance • • • • • • • • • • • • • • – System Speeds 60 MHz – Array Multipliers > 32 MHz – 18 ns Flexible SRAM
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AT40K
AT40KEL040
4155C
IO358
IO149
AT17
AT17LV010-10DP
MQFPF256
IO303
IO220
IO369
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PDF
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56 pin edac connector
Abstract: RTAX1000 edac 96 pin edac connector 292 CCGA
Text: v2.1 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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TM1019
56 pin edac connector
RTAX1000
edac 96 pin edac connector
292 CCGA
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DP U1
Abstract: IO317 AX1000
Text: Advanced v1.5 Axcelerator Family FPGAs Leading-Edge Performance • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO" – Hot-Swap Compliant I/Os (Except PCI)
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700Mb/s
339kbits
DP U1
IO317
AX1000
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PDF
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GCLR
Abstract: 676P Axcelerator Family FPGAs
Text: v2.4 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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AF4 din 74
Abstract: AF2.5 din 74 diode t25 4 g8 Axcelerator Family FPGAs
Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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4x1K
Abstract: edac 96 pin edac connector footprint cqfp 132 833 T12
Text: Advanced v0.5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case
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TM1019
4x1K
edac 96 pin edac connector
footprint cqfp 132
833 T12
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PDF
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AX1000
Abstract: n14132 SYNAPTICAD WAVEFORMER ax125c k7g4 diode AA16
Text: Advanced v1.1 Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • 350+ MHz System Performance 500+ MHZ Internal Performance High-Performance Embedded FIFOs 622Mb/s LVDS Capable I/Os S pe ci fi c at i on s • • • • • Up to 2 Million Equivalent System Gates
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622Mb/s
339kbits
AX1000
n14132
SYNAPTICAD WAVEFORMER
ax125c
k7g4
diode AA16
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PDF
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RTAX2000
Abstract: RTAX2000S RTAX1000SL rtax250 RTAX250SL RTAX4000SL RTAX1000 RTAX-S RTAX1000S-SL rtax250s
Text: Rev ision 13 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)
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TM1019
MIL-STD-883B
Extended600
RTAX2000
RTAX2000S
RTAX1000SL
rtax250
RTAX250SL
RTAX4000SL
RTAX1000
RTAX-S
RTAX1000S-SL
rtax250s
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PDF
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Untitled
Abstract: No abstract text available
Text: Low Mating Force input/output connector A B C .540 MAX. .670 MAX. J K 4-40 UNC-2A .445 MAX. UNMATED FREE LENGTH .785 MAX. UNMATED FREE LENGTH .650 MAX. WHEN FULLY ASSEMBLED TO MATING CONNECTOR LOCKING SCREW 10-502599 ACCESSORY ITEM* .220 DIA. LOCKING SCREW
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Axcelerator FPGAs
Abstract: AX125 AX2000 CQ208 CS180 PQ208 M33 thermal fuse AK 1022 Axcelerator Family FPGAs
Text: v2 .1 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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700Mb/s
295kbits
Axcelerator FPGAs
AX125
AX2000
CQ208
CS180
PQ208
M33 thermal fuse
AK 1022
Axcelerator Family FPGAs
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PDF
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IO358
Abstract: ttl 9304 FULL ADDER 4155i AT40KFL040 AT17 AT17LV010-10DP AT40K MQFPF256 IO274 IO303
Text: Features • SRAM based FPGA Dedicated to Space Use • SEE Hardened Cells configuration RAM, FreeRAM, DFF, JTAG, I/O buffers Remove the need for Triple Modular Redundancy (TMR) • Produced on Rad Hard 0.35µm CMOS Process • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series
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AT40K
4155I
IO358
ttl 9304 FULL ADDER
AT40KFL040
AT17
AT17LV010-10DP
MQFPF256
IO274
IO303
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