MA2180
Abstract: No abstract text available
Text: SDRAM MODULE KMM377S2858AT2 KMM377S2858AT2 SDRAM DIMM Intel 1.1 ver. Base 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S2858AT2 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The
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KMM377S2858AT2
KMM377S2858AT2
128Mx72
128Mx4,
128Mx4
400mil
18-bits
24-pin
MA2180
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Untitled
Abstract: No abstract text available
Text: SDRAM MODULE KMM377S2858AT3 KMM377S2858AT3 SDRAM DIMM 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM377S2858AT3 is a 128M bit x 72 Synchronous Dynamic RAM high density memory module. The
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KMM377S2858AT3
KMM377S2858AT3
128Mx72
128Mx4,
128Mx4
400mil
18-bits
24-pin
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KMM390S2858AT1-GA
Abstract: d14l PC133 registered reference design
Text: KMM390S2858AT1 PC133 Registered DIMM Revision History Revision 0.0 May. 1999 • PC133 first published Revision 0.1 (June. 1999) - Redefined feedback capacitor value to Cb, variable value, which depends upon the PLL chosen at Functional Block Diagram - Defined " This module is based on JEDEC PC133 Specification" at Package Dimensions
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KMM390S2858AT1
PC133
KMM390S2858AT1
128Mx72
128Mx4,
KMM390S2858AT1-GA
d14l
PC133 registered reference design
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Untitled
Abstract: No abstract text available
Text: PC100 Registered DIMM KMM377S2858AT3 Revision History Revision 0.1 May 27, 1999 • Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER. • Skip ICC4 value of CL=2 in DC characteristics in datasheet. • Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER.
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KMM377S2858AT3
PC100
118DIA
000DIA
128Mx4
KM44S28238AT
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KMM377S2858AT3-GH
Abstract: No abstract text available
Text: PC100 Registered DIMM KMM377S2858AT3 Revision History Revision 0.1 May 27, 1999 • Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER. • Skip ICC4 value of CL=2 in DC characteristics in datasheet. • Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER.
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PC100
KMM377S2858AT3
KM44S28238AT
128Mx4
KMM377S2858AT3-GH
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Untitled
Abstract: No abstract text available
Text: KMM377S2858AT2 SDRAM MODULE Revision History Revision 0.0 May 11, 1999 • Eliminated Preliminary. Revision 0.1 (April 29, 2000) • Added the description of " Staktek’s stacking technology is Samsung’s stacking technology of choice." Rev. 0.1 Apr. 2000
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KMM377S2858AT2
KMM377S2858AT2
128Mx72
128Mx4,
128Mx4
400mil
18-bits
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PC133 registered reference design
Abstract: No abstract text available
Text: KMM390S2858AT1 PC133 Registered DIMM Revision History Revision 0.0 May. 1999 • PC133 first published Revision 0.1 (June. 1999) - Redefined feedback capacitor value to Cb, variable value, which depends upon the PLL chosen at Functional Block Diagram - Defined " This module is based on JEDEC PC133 Specification" at Package Dimensions
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KMM390S2858AT1
PC133
KMM390S2858AT1
128Mx72
128Mx4,
PC133 registered reference design
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b1a12
Abstract: KMM390S2858AT-GA PC133 registered reference design
Text: KMM390S2858AT Preliminary PC133 SDRAM MODULE Revision History Revision 0 Feb. 1999 • PC133 first published REV. 0 Feb. 1999 Preliminary PC133 SDRAM MODULE KMM390S2858AT KMM390S2858AT SDRAM DIMM (RCC 0.8 ver. Base) 128Mx72 SDRAM DIMM with PLL & Register based on Stacked 128Mx4, 4Banks 8K Ref., 3.3V SDRAMs with SPD
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KMM390S2858AT
PC133
KMM390S2858AT
128Mx72
128Mx4,
b1a12
KMM390S2858AT-GA
PC133 registered reference design
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