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Catalog Datasheet	MFG & Type	Document Tags	PDF
ML605 UCF FILE Abstract: iodelay virtex-6 ML605 user guide fpga rgmii example ml605 ethernet RAMB36s switch SGMII MII GMII 1000BASE-X sfp sgmii 1000base-x xilinx RGMII to SGMII Text: Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v1.6 DS710 April 24, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Virtex -6 FPGA Embedded TriMode Ethernet MAC Wrapper automates the generation of HDL wrapper files for the Embedded TriMode Ethernet MAC Ethernet MAC in Virtex-6 LXT,	Original	DS710 ML605 UCF FILE iodelay virtex-6 ML605 user guide fpga rgmii example ml605 ethernet RAMB36s switch SGMII MII GMII 1000BASE-X sfp sgmii 1000base-x xilinx RGMII to SGMII	PDF
verilog code for 10 gb ethernet Abstract: DS813 3030 xilinx vhdl code for mac transmitter zynq axi ethernet software example 10Gigabit Ethernet PHY ethernet mdio circuit diagram MAC layer sequence number cyclic redundancy check verilog source vhdl code for ethernet mac spartan 3 Text: LogiCORE IP 10-Gigabit Ethernet MAC v11.2 DS813 October 19, 2011 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP 10-Gigabit Ethernet MAC core is a single-speed, full-duplex 10 Gb/s Ethernet Media Access Controller MAC solution enabling the design	Original	10-Gigabit DS813 verilog code for 10 gb ethernet 3030 xilinx vhdl code for mac transmitter zynq axi ethernet software example 10Gigabit Ethernet PHY ethernet mdio circuit diagram MAC layer sequence number cyclic redundancy check verilog source vhdl code for ethernet mac spartan 3	PDF
DS2401 Abstract: DS2502 P802 the disadvantages of 8051 microprocessor Text: Maxim > App Notes > 1-Wire Devices Keywords: global identifier, unique identifier, Media Access Control, MAC, Ethernet MAC Jan 21, 2002 APPLICATION NOTE 186 Creating Global Identifiers Using 1-Wire® Devices Abstract: With the advent of Ethernet technology, Media Access Control MAC source and destination addresses became important.	Original	DS2401: DS2502: DS2502-E48: com/an186 AN186, APP186, Appnote186, DS2401 DS2502 P802 the disadvantages of 8051 microprocessor	PDF
MAC-48 Abstract: DS2401 DS2502 P802 IEEE 48 computer hardware and networking text book advantages of microcontroller -based system Text: Maxim > App Notes > 1-Wire Devices Keywords: global identifier, unique identifier, Media Access Control, MAC, Ethernet MAC, UniqueWare Jan 21, 2002 APPLICATION NOTE 186 Creating Global Identifiers Using 1-Wire® Devices Abstract: With the advent of Ethernet technology, Media Access Control MAC source and destination addresses became important.	Original	DS1982: DS2401: DS2502: DS2502-E48: AN186, APP186, Appnote186, MAC-48 DS2401 DS2502 P802 IEEE 48 computer hardware and networking text book advantages of microcontroller -based system	PDF
stk 412 -420 Abstract: zigbit AT86RF2xx stk 412 240 stk541 STK 412 stk 412 -410 AT86RF212 Atmel SAM-ICE AT91SAM7X256 example project Text: AVR2070: Route Under MAC RUM with IPv6 and 6LoWPAN Features • A FREE 802.15.4 networking solution - Multi-hop Route Under MAC (RUM) - All Atmel IEEE 802.15.4TM transceivers supported - Many AVR microcontrollers supported • Completely Customizable Firmware	Original	AVR2070: 8240B-AVR-06/09 stk 412 -420 zigbit AT86RF2xx stk 412 240 stk541 STK 412 stk 412 -410 AT86RF212 Atmel SAM-ICE AT91SAM7X256 example project	PDF
Untitled Abstract: No abstract text available Text: 10-Gbps Ethernet MAC MegaCore Function User Guide 10-Gbps Ethernet MAC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01083-3.2.1 Document last updated for Altera Complete Design Suite version: Document publication date:	Original	10-Gbps UG-01083-3	PDF
H948 Abstract: ethernet mac fpga frame by vhdl examples 10 Gbps phy ALTERA PART MARKING ethernet mac chip testbench of an ethernet transmitter in verilog AN320 CRC-32 M20K Text: 10-Gbps Ethernet MAC MegaCore Function User Guide 10-Gbps Ethernet MAC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01083-1.1 Document last updated for Altera Complete Design Suite version: Document publication date:	Original	10-Gbps UG-01083-1 H948 ethernet mac fpga frame by vhdl examples 10 Gbps phy ALTERA PART MARKING ethernet mac chip testbench of an ethernet transmitter in verilog AN320 CRC-32 M20K	PDF
GP 704 Abstract: b09 n03 transistor Text: Blackfin+ Core Embedded Processor Preliminary Technical Data ADSP-BF700/701/702/703/704/705/706/707 FEATURES MEMORY Blackfin+ core with up to 400 MHz performance Dual 16-bit or single 32-bit MAC support per cycle 16-bit complex MAC and many other instruction set	Original	ADSP-BF700/701/702/703/704/705/706/707 16-bit 32-bit 88-Lead 184-Ball 136KB BC-184-1 GP 704 b09 n03 transistor	PDF
AN2773 Abstract: AN2770 HCS08 MC13192 HCS08 c code example interrupt HCS08 c code example zigbee Text: Freescale Semiconductor Application Note AN2773 Rev. 1.1, 12/2004 Switch Demonstration For the IEEE 802.15.4 and Zigbee MAC Layer 1 Introduction This note shows users how to run the Switch Demonstration application built for the IEEE™ 802.15.4 Standard and Zigbee MAC Layer. The following	Original	AN2773 AN2773 AN2770 HCS08 MC13192 HCS08 c code example interrupt HCS08 c code example zigbee	PDF
Ethernet-MAC using vhdl Abstract: traffic light controller vhdl coding IP-EMAC four way traffic light controller vhdl coding ieee paper on alu in vhdl 93LC46B EPXA10 NM93C46 vhdl coding for TRAFFIC LIGHT CONTROLLER SINGLE W verilog code for MII phy interface Text: 10/100 Ethernet MAC MegaCore Function 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com Core Version: Document Version: Document Date: 1.3.0 1.3.0 rev 1 December 2002 10/100 Ethernet MAC MegaCore Function User Guide Copyright  2002 Altera Corporation. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all	Original	14-byte Ethernet-MAC using vhdl traffic light controller vhdl coding IP-EMAC four way traffic light controller vhdl coding ieee paper on alu in vhdl 93LC46B EPXA10 NM93C46 vhdl coding for TRAFFIC LIGHT CONTROLLER SINGLE W verilog code for MII phy interface	PDF
FIR FILTER implementation in c language for keil Abstract: xc2000 instruction set 8085 assembly language reference manual XC166 XC2000 C166DSPLIB C166S XE166 small project with 8085 XC220 Text: Application Note, V1.1, October 2007 AP16113 XC2000/XE166/XC166 Families DSP Optimization Guide for XC2000, XE166 and XC166 Microcontroller Families with MAC Unit Microcontrollers Edition 2007-10 Published by Infineon Technologies AG 81726 Münich, Germany	Original	AP16113 XC2000/XE166/XC166 XC2000, XE166 XC166 XE166 C166S XC2200 FIR FILTER implementation in c language for keil xc2000 instruction set 8085 assembly language reference manual XC2000 C166DSPLIB small project with 8085 XC220	PDF
MCF5272UM Abstract: No abstract text available Text: MCF5272 ColdFire Integrated Microprocessor User’s Manual ColdFire® Microcontrollers MCF5272UM Rev. 3 03/2007 freescale.com Overview 1 ColdFire Core 2 Hardware Multiply/Accumulate MAC Unit 3 Local Memory 4 Debug Support 5 System Integration Module (SIM)	Original	MCF5272 MCF5272UM MCF5272UM	PDF
21 1136 Abstract: MCF5272UM CF5272 MCF5272 MPC860T ic tea 2025 csr bc6 bc6 csr 0x00804000 rb 255t Text: MCF5272 ColdFire Integrated Microprocessor User’s Manual ColdFire® Microcontrollers MCF5272UM Rev. 2.1 02/2006 freescale.com Overview 1 ColdFire Core 2 Hardware Multiply/Accumulate MAC Unit 3 Local Memory 4 Debug Support 5 System Integration Module (SIM)	Original	MCF5272 MCF5272UM 21 1136 MCF5272UM CF5272 MPC860T ic tea 2025 csr bc6 bc6 csr 0x00804000 rb 255t	PDF
MCF5272UM Abstract: 29F2G08 L9 zener 9.1 marking code p18 csr bc6 32768 68020 bsdl LED 19176 gp 380 motorola radio marking code j6 Text: MCF5272 ColdFire Integrated Microprocessor User’s Manual ColdFire® Microcontrollers MCF5272UM Rev. 3 03/2007 freescale.com Overview 1 ColdFire Core 2 Hardware Multiply/Accumulate MAC Unit 3 Local Memory 4 Debug Support 5 System Integration Module (SIM)	Original	MCF5272 MCF5272UM MCF5272UM 29F2G08 L9 zener 9.1 marking code p18 csr bc6 32768 68020 bsdl LED 19176 gp 380 motorola radio marking code j6	PDF

XAPP809 Abstract: DS460 Gemac ml300 ucf Text: Application Note: Embedded Processing R XAPP809 v1.2 June 5, 2007 Reference System: PLB Gigabit Ethernet MAC with a SerDes Interface Author: Norbert Melnikov Summary This application note describes a reference system which illustrates how to build an embedded	Original	XAPP809 DS460 XAPP809 DS460 Gemac ml300 ucf	PDF
ML507 Abstract: Marvell PHY 88E1111 layout Marvell PHY 88E1111 alaska Marvell PHY 88E1111 Datasheet Marvell PHY 88E1111 Xilinx X1127 TEMAC Tcp1323Opts programming 88E1111 xilinx XAPP1127 Text: Application Note: Embedded Processing XPS LL Tri-Mode Ethernet MAC Performance with Monta Vista Linux R XAPP1127 v1.0 December 15, 2008 Author: Brian Hill Abstract This application note describes how the standard network performance suite Netperf is used to	Original	XAPP1127 ML507 Marvell PHY 88E1111 layout Marvell PHY 88E1111 alaska Marvell PHY 88E1111 Datasheet Marvell PHY 88E1111 Xilinx X1127 TEMAC Tcp1323Opts programming 88E1111 xilinx XAPP1127	PDF
ZigBee Alliance Document 03322r13 Abstract: beacon 802154MPSRM HCS08 MC13192 MC13213 02130r10 Circuits applying MC13213 ENC-MIC-128 ZigBee Cluster Library Specification Text: 802.15.4 Media Access Controller MAC MyWirelessApp User’s Guide Document Number: 802154MWAUG Rev. 1.3 07/2008 How to Reach Us: Home Page: www.freescale.com E-mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370	Original	802154MWAUG CH370 ZigBee Alliance Document 03322r13 beacon 802154MPSRM HCS08 MC13192 MC13213 02130r10 Circuits applying MC13213 ENC-MIC-128 ZigBee Cluster Library Specification	PDF
Axcelerator FPGAs Abstract: No abstract text available Text: AvnetCore: Datasheet Version 1.0, July 2006 POS-PHY Level 3 Phy Intended Use: — Packet Processors — POS switches — PHY processors — UNI/MAC — POS bridges top_link Features: top_rx_link rd_data rd_stats empty a_empty rd_enb rd_clk wr_data wr_stats	Original	fifo16 af-phy-0143 32-bit 16-bit CH-2555 Axcelerator FPGAs	PDF
APA150 Abstract: vhdl code for phy interface Text: AvnetCore: Datasheet Version 1.0, July 2006 POS-PHY Level 3 Link Intended Use: — Packet Processors — POS switches — PHY processors — UNI/MAC — POS bridges top_link Features: top_rx_link rd_data rd_stats empty a_empty rd_enb rd_clk wr_data wr_stats	Original	fifo16 af-phy-0143 32-bit 16-bit CH-2555 APA150 vhdl code for phy interface	PDF
88E1111 Abstract: programming 88E1111 xilinx BD 9883 Marvell PHY 88E1111 Xilinx Marvell PHY 88E1111 alaska marvell 88e111 alaska reference design Marvell PHY 88E1111 layout microblaze ethernet lite ML405 PPC440MC Text: Application Note: Embedded Processing Reference System: XPS Local Link Tri-Mode Ethernet MAC Performance with VxWorks 6.3 R XAPP1063 v1.1 December 4, 2008 Author: Brian Hill Abstract This application note describes how the standard network performance suite Netperf is used to	Original	XAPP1063 88E1111 programming 88E1111 xilinx BD 9883 Marvell PHY 88E1111 Xilinx Marvell PHY 88E1111 alaska marvell 88e111 alaska reference design Marvell PHY 88E1111 layout microblaze ethernet lite ML405 PPC440MC	PDF
5121M Abstract: D13T1 ic 74373 datasheet DPL26 80C40 80C400 74373 latch pin config 80C32 DS2502-E48 DS80C390 Text: High-Speed Microcontroller User’s Guide: DS80C400 Supplement COMMUNICATE WITH NEW AND LEGACY EQUIPMENT NETWORKED MICROCONTROLLER x3 SERIAL UARTs 8051 µC WITH TCP/IPv4/6 NETWORK STACK IN ROM REMOTE MONITORING AND CONTROL VIA THE NETWORK 10/100 ETHERNET MAC	Original	DS80C400 DS80C400 DS80C400. 5121M D13T1 ic 74373 datasheet DPL26 80C40 80C400 74373 latch pin config 80C32 DS2502-E48 DS80C390	PDF
5121M Abstract: tH30 DS2502-E48 DS80C320 DS80C390 DS80C400 DS80C400-FNY DS87C520 80C32 80C40 Text: High-Speed Microcontroller User’s Guide: DS80C400 Supplement COMMUNICATE WITH NEW AND LEGACY EQUIPMENT NETWORKED MICROCONTROLLER x3 SERIAL UARTs 8051 µC WITH TCP/IPv4/6 NETWORK STACK IN ROM REMOTE MONITORING AND CONTROL VIA THE NETWORK 10/100 ETHERNET MAC	Original	DS80C400 DS80C400 DS80C400. 5121M tH30 DS2502-E48 DS80C320 DS80C390 DS80C400-FNY DS87C520 80C32 80C40	PDF
FIFO16 Abstract: asynchronous fifo vhdl avnet vhdl code for asynchronous fifo Branding D53 APA150 OC48 CH-2555 vhdl code for mac interface fifo vhdl Text: AvnetCore: Datasheet Version 1.0, July 2006 UTOPIA Level 3 PHY Intended Use: — ATM Cell Processors — PHY Processors — ATM Bridges & Gaskets — DSL ASSP interfaces — UNI/MAC — Microprocessor interfaces Features: — Function compatible with ATM Forum af-phy-0136.000	Original	af-phy-0136 CH-2555 FIFO16 asynchronous fifo vhdl avnet vhdl code for asynchronous fifo Branding D53 APA150 OC48 vhdl code for mac interface fifo vhdl	PDF
wv5 marking Abstract: aes 1136 djsa MM68000 mbus 38448 74274 9439 2n EN 61373 Category 1 Class B gigabyte m61 s3 Text: SECTION 1 INTRODUCTION The MCF5307 integrated microprocessor combines a ColdFire processor core with a Multiply-Accumulate MAC unit, DRAM controller, DMA controller, timers, parallel and serial interfaces, and system integration. Designed for embedded control applications, the	OCR Scan	MCF5307 execute16x16 32-bit MCF5307. wv5 marking aes 1136 djsa MM68000 mbus 38448 74274 9439 2n EN 61373 Category 1 Class B gigabyte m61 s3	PDF

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MAC COMPILED Search Results

MAC COMPILED Datasheets Context Search

ML605 UCF FILE

verilog code for 10 gb ethernet

DS2401

MAC-48

stk 412 -420

Untitled

H948

GP 704

AN2773

Ethernet-MAC using vhdl

FIR FILTER implementation in c language for keil

MCF5272UM

21 1136

MCF5272UM

XAPP809

ML507

ZigBee Alliance Document 03322r13

Axcelerator FPGAs

APA150

88E1111

5121M

5121M

FIFO16

wv5 marking