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    MACROCELL ECL Search Results

    MACROCELL ECL Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    EP610DM-30 Rochester Electronics LLC EP610 - Classic Family EPLD, Logic,300 Gates,16 Macrocells Visit Rochester Electronics LLC Buy
    EP910LI-30-G Rochester Electronics LLC EP910 - Classic Family EPLD, Logic,450 Gates,24 Macrocells Visit Rochester Electronics LLC Buy
    EP610LI-25 Rochester Electronics LLC EP610 - Classic Family EPLD, Logic,300 Gates,16 Macrocells Visit Rochester Electronics LLC Buy
    EP610LI-30 Rochester Electronics LLC EP610 - Classic Family EPLD, Logic,300 Gates,16 Macrocells Visit Rochester Electronics LLC Buy
    EP910PI-30 Rochester Electronics LLC EP910 - Classic Family EPLD, Logic,450 Gates,24 Macrocells Visit Rochester Electronics LLC Buy

    MACROCELL ECL Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    32-Bit Parallel-IN Serial-OUT Shift Register

    Abstract: 74AC04 08FF ARM7500 32-Bit Parallel-IN Serial-OUT Shift Register PROGRAM LM 16255
    Text: 1 10 11 Video Macrocell Interface 10.1 Bus interface 10-2 10.2 Setting the FIFO preload value 10-2 ARM7500 Data Sheet ARM DDI 0050C Preliminary - Unrestricted This chapter describes the video macrocell interface within the ARM7500. 10-1 Video Macrocell Interface


    Original     		PDF ARM7500. ARM7500 0050C 0x03400000 0x034FFFFF) 32-bit 32-Bit Parallel-IN Serial-OUT Shift Register 74AC04 08FF 32-Bit Parallel-IN Serial-OUT Shift Register PROGRAM LM 16255

    ARM922T

    Abstract: ARM710T ARM720T ARM740T ARM920T ARM940T ARM946E-S ARM966E-S CP15 ARM7tdmi block diagram EXPLANATION
    Text: Application Note 88 Considerations when implementing a design that uses an ARM hard macrocell Document number: ARM DAI 0088A Issued: March 2001 Copyright ARM Limited 2001 Copyright 2001 ARM Limited. All rights reserved. Application Note 88 Design Implementation Considerations of an ARM Hard Macrocell


    Original     		PDF

    74AC04

    Abstract: ARM7500FE N-17
    Text: 1 11 11 The Video and Sound Macrocell This chapter introduces the ARM7500FE video and sound system. 11.1 Introduction 11-2 11.2 Features 11-2 11.3 Block Diagram 11-4 ARM7500FE Data Sheet ARM DDI 0077B Open Access - Preliminary 11-1 The Video and Sound Macrocell


    Original     		PDF ARM7500FE 0077B 2896MHz 74AC04 N-17

    vhdl code for phy interface

    Abstract: OC48 QL82SD AF-PHY-0136
    Text: Utopia Level 3 Slave Interface Macrocell For Quicklogic Eclipse and QuickSD ESP Product Brief Version 1.0 February 2001 Exceeding OC48 requirements cell rate transfers Introduction The Utopia (Universal Test & Operations PHY Interface for ATM) interface is defined by the


    Original     		PDF 104MHz 32-Bit af-phy-0136 QL82SD vhdl code for phy interface OC48

    QL82SD

    Abstract: vhdl code for 32bit data memory AF-PHY-0136
    Text: Utopia Level 3 Master Interface Macrocell For Quicklogic Eclipse and QuickSD ESP Product Brief Version 1.1 February 2001 status indication and User programmable FIFO thresholds Introduction The Utopia Universal Test & Operations PHY Interface for ATM interface is defined by the


    Original     		PDF af-phy-0136 QL82SD vhdl code for 32bit data memory

    MorethanIP

    Abstract: QL82SD vhdl code for phy interface
    Text: Utopia Level 2 Slave Interface Macrocell For Quicklogic Eclipse and QuickSD ESP Product Brief Version 1.1 February 2001 Introduction The Utopia Universal Test & Operations PHY Interface for ATM interface is defined by the ATM Forum to provide a standard interface


    Original     		PDF af-phy-0039 QL82SD MorethanIP vhdl code for phy interface

    QL82SD

    Abstract: No abstract text available
    Text: Utopia Level 2 Master Interface Macrocell For Quicklogic Eclipse and QuickSD ESP Product Brief Version 1.1 February 2001 Introduction The Utopia Universal Test & Operations PHY Interface for ATM interface is defined by the ATM Forum to provide a standard interface


    Original     		PDF af-phy-0039 QL82SD

    IN125

    Abstract: TP-LINK DNC3X3125 MR20 MR21 MR30 MR31 MR28-Device-Specific mr31-device-specific mr31devicespecific
    Text: Advance Data Sheet March 2000 DNC3X3125 10/100 Mbits/s Ethernet Transceiver Macrocell Features 100 Mbits/s FX Transceiver 10 Mbits/s Transceiver • Compatible with IEEE 802.3u 100Base-FX standard. ■ DSP based. ■ ■ Compatible with IEEE * 802.3 10Base-T standard


    Original     		PDF DNC3X3125 100Base-FX 10Base-T 10Base-T. DS00-079LAN DS99-161LAN) IN125 TP-LINK DNC3X3125 MR20 MR21 MR30 MR31 MR28-Device-Specific mr31-device-specific mr31devicespecific

    ARM processor Armv4 instruction set architecture

    Abstract: ARM processor Armv4 ARMv4 reference Armv4 arm7 strongarm instruction set ARM 7 processor pin configuration ARM10200 AMBA AHB protocol for ARM 7 Armv4t ARM9TDMI 0025B
    Text: ARM922T with AHB System-on-Chip Platform OS Processor Product Overview Applications The ARM922T Rev 1 with AHB • The ARM922T macrocell is a high-performance 32-bit RISC integer processor combining an ARM9TDMI™ processor core with: • • • •


    Original     		PDF ARM922TTM ARM922T ARM922T 32-bit 0025B ARM processor Armv4 instruction set architecture ARM processor Armv4 ARMv4 reference Armv4 arm7 strongarm instruction set ARM 7 processor pin configuration ARM10200 AMBA AHB protocol for ARM 7 Armv4t ARM9TDMI 0025B

    MR29

    Abstract: DNC3X3625 MR20 MR21 MR30 MR31 "network interface cards"
    Text: Advance Data Sheet March 2000 DNC3X3625 Hex 10/100 Mbits/s Ethernet Transceiver Macrocell Features Hex 100 Mbits/s FX Transceiver Hex 10 Mbits/s Transceiver • Compatible with IEEE 802.3u 100Base-FX standard. ■ DSP based. ■ ■ Compatible with IEEE * 802.3 10Base-T standard


    Original     		PDF DNC3X3625 100Base-FX 10Base-T 10Base-T. DS00-078LAN MR29 DNC3X3625 MR20 MR21 MR30 MR31 "network interface cards"

    icebreaker

    Abstract: XNOR GATE ARM7TDMI CP14
    Text: 1 9 11 ICEBreaker Module Note The name ICEbreaker has changed. It is now known as the EmbeddedICE macrocell. Future versions of the datasheet will reflect this change. 9.1 Overview 9-2 9.2 The Watchpoint Registers 9-3 9.3 Programming Breakpoints 9-6 9.4 Programming Watchpoints


    Original     		PDF

    DNC3X3825

    Abstract: MR20 MR21 MR30 MR31 IN125 resistor MR25 "network interface cards"
    Text: Advance Data Sheet March 2000 DNC3X3825 Octal 10/100 Mbits/s Ethernet Transceiver Macrocell Features Octal 100 Mbits/s FX Transceiver Octal 10 Mbits/s Transceiver • Compatible with IEEE 802.3u 100Base-FX standard. ■ DSP based. ■ ■ Compatible with IEEE * 802.3 10Base-T standard


    Original     		PDF DNC3X3825 100Base-FX 10Base-T 10Base-T. DS00-081LAN DS99-194LAN) DNC3X3825 MR20 MR21 MR30 MR31 IN125 resistor MR25 "network interface cards"

    Mlt-3

    Abstract: IN125 DNC3X3425 MR20 MR21 MR30 MR31 mr31devicespecific LNK100UP TPI 163
    Text: Advance Data Sheet March 2000 DNC3X3425 Quad 10/100 Mbits/s Ethernet Transceiver Macrocell Features Quad 100 Mbits/s FX Transceiver Quad 10 Mbits/s Transceiver • Compatible with IEEE 802.3u 100Base-FX standard. ■ DSP based. ■ ■ Compatible with IEEE * 802.3 10Base-T standard


    Original     		PDF DNC3X3425 100Base-FX 10Base-T 10Base-T. DS00-080LAN DS99-194LAN) Mlt-3 IN125 DNC3X3425 MR20 MR21 MR30 MR31 mr31devicespecific LNK100UP TPI 163

    W47B

    Abstract: transistor m285 w41b M331 transistor M313 TRANSISTOR MCA2500ECL a6019 Tektronix k15 yg 2025 VIM-332
    Text: Ordar this data shaat by MCA1500M/D MOTOROLA n S E M IC O N D U C T O R S P.O. BOX 20912 • PHO ENIX, A R IZ O N A 85036 A d v a n c e Information MOSAIC II MCA1500M MACROCELL ARRAY ECL MACROCELL ARRAY This specification defines the design and performance require­


    OCR Scan     		PDF MCA1500M/D MCA1500M MCA1500M, 1152-bits MK145BP, W47B transistor m285 w41b M331 transistor M313 TRANSISTOR MCA2500ECL a6019 Tektronix k15 yg 2025 VIM-332

    yd 803 ic

    Abstract: yd 803 ou equivalent ula 1u h692l transistor h331 H711 H224 CHN 708
    Text: Order this data sheet by ETL/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCA750ETL MCA3200ETL MCA6200ETL Advance Information MCA3 ETL SERIES MACROCELL ARRAYS This specification establishes design and perform ance requirem ents fo r the M CA3 ETL Series M acrocell Arrays with mixed ECL, PECL, and TTL


    OCR Scan     		PDF

    2500ECL

    Abstract: Motorola Bipolar Power Transistor Data Double Die IC 566 function generator HCA62A17 CMOS 4032 1987 Micron Technology Micron NAND bca 1st motorola ECL motorola mca
    Text: BR334/D Rev 3 Motorola Semicustom gives the designer the same process-technology choices available for discrete-logic designs, and the option of Macrocell array or cell-based func­ tions for commercial and military applications. • For very high speeds — state-of-the-art ECL arrays.


    OCR Scan     		PDF BR334/D 2500ECL Motorola Bipolar Power Transistor Data Double Die IC 566 function generator HCA62A17 CMOS 4032 1987 Micron Technology Micron NAND bca 1st motorola ECL motorola mca

    HCA62A17

    Abstract: No abstract text available
    Text: BR334/D Rev 3 Motorola Semicustom gives the designer the same process-technology choices available for discrete-logic designs, and the option of Macrocell array or cell-based func­ tions for commercial and military applications. • For very high speeds — state-of-the-art ECL arrays.


    OCR Scan     		PDF BR334/D HCA62A17

    G013G

    Abstract: 05V3 7C342-30 7C342-35 CY7C342 CY7C342B CY7C342-30RMB K941 12J8 CY7C342-35JC
    Text: CY7C342 CY7C342B ^ CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ G013G 05V3 7C342-30 7C342-35 CY7C342-30RMB K941 12J8 CY7C342-35JC

    238Q

    Abstract: 7C371-66 7C371-83 CY7C371 CY7C372 FLASH370 319q CLCC 64 pins footprint
    Text: CYPRESS bSE SEMICONDUCTOR D ESSTbbS 0010S3Ö CY7C371 PRELIMINARY CYPRESS SEMICONDUCTOR Ob4 32-Macrocell Flash PLD Features Functional Description • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • No hidden delays


    OCR Scan     		PDF CY7C371 32-Macrocell 100MHz 44-pin CY7C372 FLASH370 22V10 238Q 7C371-66 7C371-83 319q CLCC 64 pins footprint

    238Q

    Abstract: 7C372-66 CY7C371 CY7C372 FLASH370 logic block diagram of cypress flash 370 device cypress FLASH370 device CY10E301 CLCC 64 pins footprint
    Text: CYPRESS SEMICONDUCTOR bSE D • ESfiqbbS DDlOSMb 130 « C Y P CY7C372 PRELIMINARY CYPRESS SEMICONDUCTOR 64-Macrocell Flash PLD Features Functional Description • 64 macrocells in four logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins


    OCR Scan     		PDF 0010514b CY7C372 64-Macrocell 100MHz 44-pin CY7C371 FLASH370 CY7C372is 238Q 7C372-66 logic block diagram of cypress flash 370 device cypress FLASH370 device CY10E301 CLCC 64 pins footprint

    H331 transistor

    Abstract: transistor h331 HB26 HE02 ht33 transistor H375 L322 L817 L713 750ETL
    Text: | y | Q jQ p Q | ^ Order this data sheet by ETL/D SEMICONDUCTOR TECHNICAL DATA MCA750ETL MCA3200ETL MCA6200ETL Advance Information MCA3 ETL SERIES MACROCELL ARRAYS This sp ecification establishes design and perform ance requirem ents fo r the M CA3 ETL Series M acrocell Arrays w ith mixed ECL, PECL, and TTL


    OCR Scan     		PDF

    74LS86 motorola

    Abstract: 74LS86 full adder motorola 74LS86 74HG74 TTL 74ls83 74ls74 ALL 74LS74 motorola 74LS74 TTL 74ls74 MCA1200ECL
    Text: LOGIC PRODUCTS — SEMICUSTOM continued Motorola Macrocell Array Families ft/i/t/t/t/t/t/à i / l / j / i / 1 / f/f /i Technology TTL ECL ECL/TTL 3-Mlcron Sllicon-Gate HCMOS 2-IMicron Sllicon-Gate HCMOS G ate E qu iva le nt 652 1192 2472 533 1280 2720 2958


    OCR Scan     		PDF 74LS83 MC10180 74HC283 74LS86 motorola 74LS86 full adder motorola 74LS86 74HG74 TTL 74ls83 74ls74 ALL 74LS74 motorola 74LS74 TTL 74ls74 MCA1200ECL

    Untitled

    Abstract: No abstract text available
    Text: Order this data sheet by MCA2200ECL/D M O TO RO LA MCA2200ECL 1 SEMICONDUCTOR TECHNICAL DATA MCA2200ECL MACROCELL ARRAY The MCA2200ECL Array is a m em ber of M otorola's "T h ird G eneration” MCA3 ECL series. M otorola's MOSAIC III process provides the MCA2200ECL w ith the logic pow er of over 2200


    OCR Scan     		PDF MCA2200ECL/D MCA2200ECL MCA2200ECL

    Untitled

    Abstract: No abstract text available
    Text: Advance Data Sheet August 1996 m ic r o e le c t r o n ic s group Lucent Technologies Bet! Labs Innovations DNCX04 PDT/PDR for 10OBase-TX/FX ASIC Macrocell Features Description • 5-bit code-group input PDT and output (PDR) The DNCX04 is a single-channel PDT/PDR (physical


    OCR Scan     		PDF DNCX04 10OBase-TX/FX DNCX04 100Base-TX/FX. 00500Bb 0G5G02L,