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    MULTIPLIER BIT Search Results

    MULTIPLIER BIT Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74167N-ROCS Rochester Electronics 74167 - Sync Decade Rate Multipliers Visit Rochester Electronics Buy
    HI4-0201/B Rochester Electronics LLC HI4-0201 - Differential Multiplier Visit Rochester Electronics LLC Buy
    HI4-0516-8/B Rochester Electronics LLC HI4-0516 - Differential Multiplier Visit Rochester Electronics LLC Buy
    25S558DM Rochester Electronics LLC AM25S558 - 8-Bit Combinational Multiplier Visit Rochester Electronics LLC Buy
    CDP1853CD/B Rochester Electronics LLC CDP1853CD - N-Bit 1 of 8 Decoder Visit Rochester Electronics LLC Buy

    MULTIPLIER BIT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    LMS12JC65

    Abstract: LMS12GC65 LMS12JC35 LMS12JC40 LMS12JC50 LMS12 fir filter applications smd capacitor a5
    Text: LMS12 LMS12 DEVICES INCORPORATED 12-bit Cascadable Multiplier-Summer 12-bit Cascadable Multiplier-Summer DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer ❑ Summer has 26-bit Input Port Fully Independent from Multiplier


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    PDF LMS12 12-bit 26-bit MIL-STD-883, 84-pin LMS12JC65 LMS12GC65 LMS12JC35 LMS12JC40 LMS12JC50 LMS12 fir filter applications smd capacitor a5

    fir filter applications

    Abstract: LMS12 LMS1250 LMS12JC35 LMS12JC40 THAB
    Text: LMS12 LMS12 DEVICES INCORPORATED 12-bit Cascadable Multiplier-Summer 12-bit Cascadable Multiplier-Summer DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer The LMS12 is a high-speed 12 x 12-bit combinatorial multiplier integrated


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    PDF LMS12 12-bit 26-bit LMS12 12-bit 84-pin fir filter applications LMS1250 LMS12JC35 LMS12JC40 THAB

    LMS12

    Abstract: LMS12JC35 LMS12JC40 fir filter applications LMS1250
    Text: LMS12 LMS12 DEVICES INCORPORATED 12-bit Cascadable Multiplier-Summer 12-bit Cascadable Multiplier-Summer DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer The LMS12 is a high-speed 12 x 12-bit combinatorial multiplier integrated


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    PDF LMS12 12-bit 26-bit LMS12 12-bit 84-pin LMS12JC35 LMS12JC40 fir filter applications LMS1250

    atmel 306

    Abstract: ATMEL 529 atmel 228 atmel 334 atmel 438 AT40K AT40KAL AT94K mps16
    Text: IP Core Generator: Multiplier Features • • • • • • • • • • • Multiplier – Serial Parallel Multiplier – Signed Multiplier – Signed, Pipeline x 1 Multiplier – Unsigned Multiplier – Unsigned, Pipeline x 1 Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for


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    PDF AT94K 12/01/xM atmel 306 ATMEL 529 atmel 228 atmel 334 atmel 438 AT40K AT40KAL mps16

    AN-3006

    Abstract: 017d 000D 001C MAXQ10 MAXQ20 MAXQ2000 APP300
    Text: Maxim > App Notes > MICROCONTROLLERS Keywords: MAXQ, MAXQ20, MAXQ10, multiplier, hardware multiplier , maxq microcontroller, micro Jan 23, 2004 APPLICATION NOTE 3006 Using MAXQ's Multiplier Module Abstract: A MAXQ-based microcontroller can be equipped with a 16x16 hardware multiplier peripheral module. This


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    PDF MAXQ20, MAXQ10, 16x16 com/an3006 MAXQ2000: AN3006, APP3006, Appnote3006, AN-3006 017d 000D 001C MAXQ10 MAXQ20 MAXQ2000 APP300

    Implementing a Single-coefficient Multiplier

    Abstract: vhdl code for ROM multiplier 16 bit Array multiplier code in VERILOG vhdl code for 8-bit adder vhdl for 8 bit lut multiplier ripple carry adder VHDL code for 16 bit ripple carry adder 8 bit Array multiplier code in VERILOG Atmel 710 verilog code pipeline ripple carry adder vhdl code for 4 bit ripple carry adder
    Text: Implementing a Single-coefficient Multiplier Features • • • • Theory of Developing a Single-coefficient Multiplier Implementation using an AT40K Series FPGA for an 8-bit Single-coefficient Multiplier Coefficient Look-Up Table is Easily Re-Configurable


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    PDF AT40K 16-bit Implementing a Single-coefficient Multiplier vhdl code for ROM multiplier 16 bit Array multiplier code in VERILOG vhdl code for 8-bit adder vhdl for 8 bit lut multiplier ripple carry adder VHDL code for 16 bit ripple carry adder 8 bit Array multiplier code in VERILOG Atmel 710 verilog code pipeline ripple carry adder vhdl code for 4 bit ripple carry adder

    CD4089BCN

    Abstract: 74LS AN-90 C1995 CD4089B CD4089BC CD4089BM CD4527B CD4527BC CD4527BM
    Text: CD4089BM CD4089BC Binary Rate Multiplier CD4527BM CD4527BC BCD Rate Multiplier General Description Features The CD4089B is a 4-bit binary rate multiplier that provides an output pulse rate which is the input clock pulse rate multiplied by times the binary input number For example if


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    PDF CD4089BM CD4089BC CD4527BM CD4527BC CD4089B CD4527B CD4089BCN 74LS AN-90 C1995

    IC to design 2 by 2 binary multiplier

    Abstract: MC14554B MC14XXXBCL MC14XXXBCP MC14XXXBD binary multiplier circuit binary multiplier
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14554B 2-Bit by 2-Bit Parallel Binary Multiplier The MC14554B 2 x 2–bit parallel binary multiplier is constructed with complementary MOS CMOS enhancement mode devices. The multiplier can perform the multiplication of two binary numbers and simultaneously add


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    PDF MC14554B MC14554B MC14554B/D* MC14554B/D IC to design 2 by 2 binary multiplier MC14XXXBCL MC14XXXBCP MC14XXXBD binary multiplier circuit binary multiplier

    Untitled

    Abstract: No abstract text available
    Text: LF2250 LF2250 DEVICES INCORPORATED 12 x 10-bit Matrix Multiplier 12 x 10-bit Matrix Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 50 MHz Data and Computation Rate ❑ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs ❑ Separate 16-bit Cascade Input and


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    PDF LF2250 10-bit 12-bit 16-bit TMC2250 120-pin LF2250

    KA5 capacitor

    Abstract: LF2250 TMC2250 ka2 DIODE K-A1N NKC3 matrix multiplier lf2250gc MSB2112 diode ka2 b4
    Text: LF2250 LF2250 DEVICES INCORPORATED 12 x 10-bit Matrix Multiplier 12 x 10-bit Matrix Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 50 MHz Data and Computation Rate ❑ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs ❑ Separate 16-bit Cascade Input and


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    PDF LF2250 10-bit 12-bit 16-bit TMC2250 120-pin KA5 capacitor LF2250 TMC2250 ka2 DIODE K-A1N NKC3 matrix multiplier lf2250gc MSB2112 diode ka2 b4

    ka4 smd capacitor

    Abstract: ka9 smd smd ka4 SMD ka1 LF2250 TMC2250 LF2250GC25 smd ka2 diode
    Text: LF2250 LF2250 DEVICES INCORPORATED 12 x 10-bit Matrix Multiplier 12 x 10-bit Matrix Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 50 MHz Data and Computation Rate ❑ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs ❑ Separate 16-bit Cascade Input and


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    PDF LF2250 10-bit 12-bit 16-bit TMC2250 MIL-STD-883, 120-pin ka4 smd capacitor ka9 smd smd ka4 SMD ka1 LF2250 TMC2250 LF2250GC25 smd ka2 diode

    LF2250

    Abstract: zc11 ka2 DIODE TMC2250 KA5 capacitor Ceramic CAPACITOR KA5 YC118
    Text: LF2250 LF2250 DEVICES INCORPORATED 12 x 10-bit Matrix Multiplier 12 x 10-bit Matrix Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 50 MHz Data and Computation Rate ❑ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs ❑ Separate 16-bit Cascade Input and


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    PDF LF2250 10-bit 12-bit 16-bit TMC2250 120-pin LF2250 zc11 ka2 DIODE TMC2250 KA5 capacitor Ceramic CAPACITOR KA5 YC118

    200H

    Abstract: MSP430 0134H 0138H 013AH 0132H 16x16-bit 16x16bit
    Text: MSP430 Family 6 Hardware Multiplier Hardware Multiplier The hardware multiplier is realized as each other 16 bit peripheral module, and not integrated into the CPU. The CPU is unchanged through all configurations, and the instruction set is not modified. It take no extra cycle for multiplication. Both operands are


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    PDF MSP430 MSP43bling 200H 0134H 0138H 013AH 0132H 16x16-bit 16x16bit

    "multiplier accumulator"

    Abstract: 7210l45 TDC-1010J CY7C510 TDC1010J binary multiplier datasheet p2103 7210L65 cypress TMA
    Text: IDT7210L 16 x 16 PARALLEL CMOS MULTIPLIER ACCUMULATOR COMMERCIAL TEMPERATURE RANGE 16-BIT PARALLEL CMOS MULTIPLIER-ACCUMULATOR IDT7210L FEATURES: featuring individual input and output registers with clocked D-type flip-flop, - 16 x 16 parallel multiplier-accumulator with selectable accumulation and a preload capability which enables input data to be preloaded into the output


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    PDF IDT7210L 16-BIT IDT7210 35-bit "multiplier accumulator" 7210l45 TDC-1010J CY7C510 TDC1010J binary multiplier datasheet p2103 7210L65 cypress TMA

    ICS2059-02

    Abstract: ICS2059GI-02 ICS2059GI-02T ICS252 ICS650-40A MAN05 10.368
    Text: DATA SHEET ICS2059-02 ICS2059-02 Clock Multiplier and Jitter Attenuator Clock Multiplier and Jitter Attenuator Description Features The ICS2059-02 is a VCXO Voltage Controlled Crystal Oscillator based clock multiplier and jitter attenuator designed for system clock distribution applications.


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    PDF ICS2059-02 ICS2059-02 199707558G ICS2059GI-02 ICS2059GI-02T ICS252 ICS650-40A MAN05 10.368

    IC 8898

    Abstract: ICD2032 IC DESIGNS clock multiplier TTL 60 duty cycle
    Text: Preliminary Data Sheet _ _ I C DESIGNS ICD2032 Frequency Multiplier Frequency Multiplier with Low-Skew Output for High-Performance System Designs • Single Fixed-Frequency Multiplier with Output Ranging


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    PDF ICD2032 Hz-60 ICD2032 113th IC 8898 IC DESIGNS clock multiplier TTL 60 duty cycle

    Untitled

    Abstract: No abstract text available
    Text: LMS12 LMS12 12-bit Cascadable Multiplier-Summer DEVICES INCORPORATED DESCRIPTION FEATURES □ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer □ Summer has 26-bit Input Port Fully Independent from Multiplier Inputs □ Cascadable to Form Video Rate FIR


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    PDF LMS12 12-bit 26-bit MIL-STD-883, 84-pin LMS12

    CD4089BD

    Abstract: Two Digit counter
    Text: CD4089BM/CD4089BC/CD4527BM/CD4527BC 4l A National Semiconductor CD4089BM/CD4089BC Binary Rate Multiplier CD4527BM/CD4527BC BCD Rate Multiplier General Description Features The CD4089B is a 4-bit binary rate multiplier that provides an output pulse rate which is the input clock pulse rate mul­


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    PDF CD4089BM/CD4089BC/CD4527BM/CD4527BC CD4089BM/CD4089BC CD4527BM/CD4527BC CD4089B CD4527B CD4089BD Two Digit counter

    CD4089

    Abstract: cd4527 CD40M
    Text: CD4089BM/CD4089BC, CD4527BM/CD4527BC W A National É jA Semiconductor CD4089BM/CD4089BC Binary Rate Multiplier CD4527BM/CD4527BC BCD Rate Multiplier General Descriptidn Features The CD4089B is a 4-bit binary rate multiplier that provides an output pulse rate which is the input clock pulse


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    PDF CD4089BM/CD4089BC, CD4527BM/CD4527BC CD4089BM/CD4089BC CD4527BM/CD4527BC CD4089B CD4527B 59ei-g CD4527B' CD4089 cd4527 CD40M

    112KJ4C

    Abstract: MPY112K 112kj4 trw mpy 16 MPY112 MPY012H MPY112KJ4A MPY112KJ4C TRW LSI Products 112kj
    Text: MPY112K r n Multiplier Features 12x12 Bit, 50ns • 50ns Multiply Time Worst Case The MPY112K is a video-speed 12x12 bit parallel multiplier which operates at a 50ns cycle time (20MHz multiplication rate). The multiplicand and the multiplier may be specified together as two's complement or


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    PDF MPY112K 12x12 MPY112K 20MHz 16-bit 112KJ4A 112KJ4C 112kj4 trw mpy 16 MPY112 MPY012H MPY112KJ4A MPY112KJ4C TRW LSI Products 112kj

    Untitled

    Abstract: No abstract text available
    Text: M MOTOROLA Military 10687 High Speed 2 x 1 Bit Array Multiplier Block ELECTRICALLY TESTED PER: MPG 10687 The 10687 is a dual high speed interactive multiplier. It is designed for use as an array multiplier block. Each device is a modified full adder/subtractor that


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    PDF

    M1412

    Abstract: No abstract text available
    Text: CFB2021A CFB2021A MPY GENERAL DESCRIPTION: 16 X 16 MIXED-MODE MULTIPLIER, RDING:2*15 CFB2021A is a mixed-mode multiplier that takes two 16-bit operands and produces a 32-bit product. The multiplier supports unsigned and signed two’s complement, and mixed mode multiply. Sign interpretation


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    PDF CFB2021A CFB2021A 16-bit 32-bit M1412

    modified booth circuit diagram

    Abstract: No abstract text available
    Text: CFB2400A CFB2400A MPY - 1PL GENERAL DESCRIPTION: 16 X 16 MIXED-MODE MULTIPLIER, 1-STAGE PIPELINE CFB2400A is a pipelined multiplier that takes two 16-bit operands at the beginning of each clock cycle and produces a 32-bit product at the end of the following clock cycle. The multiplier supports unsigned and


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    PDF CFB2400A CFB2400A 16-bit 32-bit CFBZ400A modified booth circuit diagram

    LMS12GM50

    Abstract: LMS12 LMS1250 cu k08 LMS12JC65 fir filter applications c2314 LMS12JC50
    Text: LMS12 12-bit Cascadable Multiplier-Summer Description Features The LM S12 is a high speed 12 x 12-bit combinatorial multiplier integrated with a 26-bit adder in a single 84-pin Summer has 26-bit input port fully package. It is an ideal building block independent from multiplier inputs for the implementation of very high


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    PDF 12-bit LMS12 26-bit 84-pin LMS12 A11-A0 LMS12GM50 LMS1250 cu k08 LMS12JC65 fir filter applications c2314 LMS12JC50