CY7C375
Abstract: FLASH370
Text: 7C375: Thursday, September 24, 1992 Revision: October 14, 1995 CY7C375 UltraLogict 128ĆMacrocell Flash CPLD Features Functional Description D D D The CY7C375 is a Flash erasable Complex Programmable Logic Device CPLD and is part of the FLASH370t family of highĆ
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7C375:
CY7C375
128Macrocell
CY7C375
FLASH370t
FLASH370
22V10
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CY7C375I
Abstract: cypress flash 370 O103
Text: PRELIMINARY CY7C375i UltraLogict 128ĆMacrocell Flash CPLD D D D 128 macrocells in eight logic blocks D InĆSystem Reprogrammable ISRt Flash technology 128 I/O pins 5 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs
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CY7C375i
128Macrocell
160pin
CY7C375i
I/O16-I/O31
I/O32-I/O47
I/O48-I/O63
FLASH370i
cypress flash 370
O103
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Untitled
Abstract: No abstract text available
Text: fax id: 6141 1CP LD Fa mily Ultra37000 ISR™ CPLD Family PRELIMINARY UltraLogic™ High-Performance CPLDs • Warp2 —Low-cost IEEE 1076/1164-compliant VHDL system —Available on PC, Sun, and HP platforms for $99 —Supports all Cypress Programmable Products
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Ultra37000TM
1076/1164-compliant
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CY3600
Abstract: 37128VP100
Text: fax id: 6147 1Ult ra371 28 V PRELIMINARY Ultra37128V UltraLogic 3.3V 128-Macrocell ISR™ CPLD Features • High speed — fMAX = 125 MHz • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable ISR™ — JTAG compliant on board programming
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ra371
Ultra37128V
128-Macrocell
CY3600
37128VP100
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CY37128P84-125JI
Abstract: Ultra37000TM CY3600 37128P100
Text: fax id: 6146 1Ult ra371 28 PRELIMINARY Ultra37128 UltraLogic 128-Macrocell ISR™ CPLD Features • High speed — fMAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogrammable ISR™ — JTAG compliant on board programming — tPD = 6.5 ns
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ra371
Ultra37128
128-Macrocell
84-pin
100-pin
160-pin
FLASH374i/5i
CY37128P84-125JI
Ultra37000TM
CY3600
37128P100
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MACH465
Abstract: MACH465-12 PAL22V10 mach 1 family amd
Text: FINAL COM’L: -12/15/20 Advanced Micro Devices MACH465-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 208 pins in PQFP ■ Up to 20 product terms per function, with XOR ■ JTAG, 5-V, in-circuit programmable ■ Flexible clocking
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MACH465-12/15/20
PAL34V16"
16-038-PQR-2
PQR208
MACH465
MACH465-12
PAL22V10
mach 1 family amd
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Untitled
Abstract: No abstract text available
Text: fax id: 6146 s? CYPRESS Ultra37128 PRELIMINARY UltraLogic 128-Macrocell ISR™ CPLD • High speed Features — f MAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogram mable ISR™ — t PD = 6.5 ns — ts = 3.5 ns — JTAG compliant on board programming
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Ultra37128
128-Macrocell
84-pin
100-pin
160-pin
FLASH374i/5i
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Untitled
Abstract: No abstract text available
Text: fax id: 6146 s? CYPRESS Ultra37128 PRELIMINARY UltraLogic 128-Macrocell ISR™ CPLD • High speed Features — f MAX = 167 MHz • 128 macrocells in eight logic blocks • In-System Reprogram mable ISR™ — t PD = 6.5 ns — ts = 3.5 ns — JTAG compliant on board programming
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Ultra37128
128-Macrocell
84-pin
100-pin
160-pin
FLASH374i/5i
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Untitled
Abstract: No abstract text available
Text: . „ n « Ultra37128V PRELIMINARY UltraLogic 3.3V 128-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns • • • • • • — JTAG-compliant on-board programming
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Ultra37128V
128-Macrocell
Ultra37128,
Itra37064/37064V,
Itra37192/37192V,
Ultra37256/37256Vi
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CY37128P84-125JI
Abstract: No abstract text available
Text: UltraLogic 128-Macrocell ISR™ CPLD Features • 128 macrocells in eight logic blocks • In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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128-Macrocell
CY37128P84-125JI
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY CY37128 UltraLogic 128-Macrocell ISR™ CPLD Features • 128 macrocells in eight logic blocks • In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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CY37128
128-Macrocell
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