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    Bimba Manufacturing Company K-B-FO-17-L

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    O17L Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    A12L

    Abstract: A14L IDT70V3579 IDT70V3579S
    Text: HIGH-SPEED 3.3V 32K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 5/6ns max. Pipelined output mode


    Original     		IDT70V3579S 100MHz 70V3579 36-Bit) A12L A14L IDT70V3579 IDT70V3579S PDF

    70v3319s133

    Abstract: 70V3319 A12L IDT70V3319 IDT70V3319S 70V3319S 70V3319PRF
    Text: HIGH-SPEED 3.3V 256K x 18 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PRELIMINARY IDT70V3319S Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access


    Original     		IDT70V3319S 166MHz 133MHz) 166MHz PK-128) 256-pin BC-256) 70V3319 70v3319s133 A12L IDT70V3319 IDT70V3319S 70V3319S 70V3319PRF PDF

    70V3569

    Abstract: A12L A13L IDT70V3569 IDT70V3569S
    Text: HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PRELIMINARY IDT70V3569S Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed clock to data access


    Original     		IDT70V3569S 133MHz 133MHz wri12/99: 133MHz, 70V3569 A12L A13L IDT70V3569 IDT70V3569S PDF

    Dynachip

    Abstract: SR flip flop using discrete gates T flip flop pin configuration DL-5000 i33b DL5000 DL5064 DL5256 DL5528 MUX24
    Text: DL5000 Family Fast Field Programmable Gate Array Features • Fast Field Programmable Gate Arrays™ Patented Active Repeater™ Architecture Data and Clock Rates up to 270 MHz Complex operations up to 200 MHz Input Block Register Setup Time 800 ps Output Block Register Clock-to-out 1.6 ns


    Original     		DL5000TM 100KH DL5000 DL5000, Dynachip SR flip flop using discrete gates T flip flop pin configuration DL-5000 i33b DL5064 DL5256 DL5528 MUX24 PDF

    A15L

    Abstract: A15R IDT70V9389 IDT70V9389L DSC-4856 4856
    Text: PRELIMINARY IDT70V9389L HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 7.5/9/12ns max.


    Original     		IDT70V9389L 5/9/12ns 500mW 70V9389 1152K 18-Bit) A15L A15R IDT70V9389 IDT70V9389L DSC-4856 4856 PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY IDT70V37L HIGH-SPEED 3.3V 32K x 18 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 15/20ns max. – Industrial: 20ns (max.)


    Original     		IDT70V37L 15/20ns 440mW IDT70V37 200mV PDF

    Untitled

    Abstract: No abstract text available
    Text: HIGH-SPEED 64K x 18 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial: 15/20ns max. Low-power operation – IDT7038L Active: 1W (typ.)


    Original     		15/20ns IDT7038L IDT7038 200mV PDF

    4844

    Abstract: No abstract text available
    Text: IDT709389L HIGH-SPEED 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 7.5/9/12ns max.


    Original     		IDT709389L 5/9/12ns 200mV 4844 PDF

    tdc 310

    Abstract: ba6l BA6R 10 35L U1
    Text: HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 256K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 4K x 36 banks – 9 megabits of memory on chip


    Original     		200MHz 166MHz 133MHz) 14Gbps SMEN-01-04 BF-208 tdc 310 ba6l BA6R 10 35L U1 PDF

    70T34

    Abstract: No abstract text available
    Text: HIGH-SPEED 2.5V 8/4K x 18 DUAL-PORT 8/4K x 16 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access IDT70T35/34L IDT70T25/24L – Commercial: 20/25ns (max.)


    Original     		IDT70T35/34L IDT70T25/24L) 20/25ns 200mW IDT70T25/24L 70T34 PDF

    ba6l

    Abstract: No abstract text available
    Text: HIGH-SPEED 3.3V 64K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 1K x 36 banks – 2 megabits of memory on chip


    Original     		200MHz 166MHz 133MHz) 14Gbps SMEN-01-05 SMEN-01-04 ba6l PDF

    9l reset

    Abstract: o14l 70V25 CY7C036V IDT70V24 CY7024
    Text: fax id: 5213 51 PRELIMINARY CY7C024V/025V/026V CY7C0241V/0251V/036V 3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM Features • Automatic power-down • Expandable data bus to 32/36 bits or more using Master/Slave chip select when using more than one device • On-chip arbitration logic


    Original     		CY7C024V/025V/026V CY7C0241V/0251V/036V 4K/8K/16K 100-pin IDT70V24, 70V25, 7V0261. 9l reset o14l 70V25 CY7C036V IDT70V24 CY7024 PDF

    CY7C024-55AC DATASHEET

    Abstract: CY7C024/0241 CY7C025/0251 a7l transistor 84 PLCC pin configuration A12L CY7C024 CY7C0241 CY7C025 CY7C0251
    Text: fax id: 5206 1CY 7C02 5/ 025 1 CY7C024/0241 CY7C025/0251 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int, Busy Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 4K x 16 organization CY7C024


    Original     		CY7C024/0241 CY7C025/0251 CY7C024) CY7C0241) CY7C025) CY7C0251) 65-micron 84-Lead CY7C024-55AC DATASHEET CY7C024/0241 CY7C025/0251 a7l transistor 84 PLCC pin configuration A12L CY7C024 CY7C0241 CY7C025 CY7C0251 PDF

    IDT70T659

    Abstract: No abstract text available
    Text: HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE Features ◆ ◆ ◆ ◆ ◆ ◆ Busy and Interrupt Flags On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port


    Original     		256/128K 100mV) 150mV 256-ball 208-pin 208-ball IDT70T659 PDF

    10 35L U4

    Abstract: 70V7589 IDT70V7589 IDT70V7589S BA5L
    Text: HIGH-SPEED 3.3V 64K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PRELIMINARY IDT70V7589S Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 1K x 36 banks


    Original     		IDT70V7589S 166MHz 133MHz) 12Gbps SMEN-01-05 SMEN-01-04 10 35L U4 70V7589 IDT70V7589 IDT70V7589S BA5L PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • ■ True dual-ported memory cells that allow simultaneous access of the same memory location


    Original     		CY7C09269V/79V/89V CY7C09369V/89V 100-pin PDF

    CE1X

    Abstract: 70V7339 A12L IDT70V7339 IDT70V7339S
    Text: HIGH-SPEED 3.3V 512K x 18 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PRELIMINARY IDT70V7339S Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 512K x 18 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 8K x 18 banks


    Original     		IDT70V7339S 166MHz 133MHz) 12Gbps SMEN-01-05 CE1X 70V7339 A12L IDT70V7339 IDT70V7339S PDF

    IDT7034

    Abstract: IDT7034S truth table for 7 inputs OR gate
    Text: IDT7034S/L HIGH-SPEED 4K x 18 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. FEATURES: • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • High-speed access — Commercial: 15/20ns max. • Low-power operation


    Original     		IDT7034S/L 15/20ns IDT7034S 750mW IDT7034L IDT7034 100-pin IDT7034S truth table for 7 inputs OR gate PDF

    3VR10

    Abstract: AL5DS9289V AL5DS9389V marking a0l
    Text: AL5DS9xx9V AL5DS9xx9V Data Sheets 3.3V Synchronous Dual-Port SRAM AL5DS9349V/59V/69V/79V 4K/8K/16K/32K x 18 bits AL5DS9269/79V 16K/32K x 16 bits AL5DS9149/59/69/79/89V 4K/8K/16K/32K/64K x 9 bits AL5DS9069/79/89V 16K/32K/64K x 8 bits Preliminary 2002-Copyright by AverLogic Technologies, Corp.


    Original     		AL5DS9349V/59V/69V/79V 4K/8K/16K/32K AL5DS9269/79V 16K/32K AL5DS9149/59/69/79/89V 4K/8K/16K/32K/64K AL5DS9069/79/89V 16K/32K/64K 2002-Copyright 3VR10 AL5DS9289V AL5DS9389V marking a0l PDF

    CY7C09349

    Abstract: CY7C09359
    Text: fax id: 5219 51 CY7C09349 CY7C09359 ADVANCED INFORMATION 4K/8K x 18 Synchronous Dual Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 2 Flow-Through/Pipelined devices — 4K x 18 organization CY7C09349


    Original     		CY7C09349 CY7C09359 CY7C09349) CY7C09359) 35-micor CY7C09349 CY7C09359 PDF

    IDT70V3399

    Abstract: No abstract text available
    Text: HIGH-SPEED 3.3V 256/128K x 18 IDT70V3319/99S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Š Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 3.6ns 166MHz /4.2ns (133MHz) (max.)


    Original     		256/128K IDT70V3319/99S 166MHz 133MHz) 128-pin IDT70V3399 PDF

    IDT70T659

    Abstract: 9S12 CAN 9S12
    Text: Š Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T651/9S HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port


    Original     		IDT70T651/9S 256/128K 100mV) 150mV 256-ball 208-pin 208-ball IDT70T659 9S12 CAN 9S12 PDF

    70V7519

    Abstract: IDT70V7519 IDT70V7519S ba6l
    Text: Š HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 256K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 4K x 36 banks – 9 megabits of memory on chip


    Original     		200MHz 166MHz 133MHz) 14Gbps BC-256 70V7519 IDT70V7519 IDT70V7519S ba6l PDF

    A17R-A0R

    Abstract: A17L-A0L 7144
    Text: HIGH-SPEED 1.8V 256/128K x 36 IDT70P3519/99 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V/2.5V/1.8V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location Low Power High-speed data access


    Original     		256/128K IDT70P3519/99 200MHz 166MHz) 14Gbps 200MHz 5T2010 5T9010 A17R-A0R A17L-A0L 7144 PDF