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    PECL LOGIC VOLTAGE LEVELS Search Results

    PECL LOGIC VOLTAGE LEVELS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    DCL541A01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable Visit Toshiba Electronic Devices & Storage Corporation
    DCL542H01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=2:2) / Default Output Logic: High / Output enable Visit Toshiba Electronic Devices & Storage Corporation
    DCL541B01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: High / Input disable Visit Toshiba Electronic Devices & Storage Corporation

    PECL LOGIC VOLTAGE LEVELS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    60-0005

    Abstract: No abstract text available
    Text: VCXO Page 1 of 3 VS9 SERIES: VCXO OSCILLATOR, PECL, +3.3 VDC DESCRIPTION: A crystal controlled, high frequency, highly stable, voltage controlled oscillator, adhering to Positive Emitter Coupled Logic PECL Standards. The output can be Tri-stated to facilitate testing or combined


    Original     		PDF 10GbE; 60-0005

    Untitled

    Abstract: No abstract text available
    Text: CLOCK Page 1 of 2 VS9 SERIES: VCXO OSCILLATOR, PECL, +3.3 VDC DESCRIPTION: A crystal controlled, high frequency, highly stable, voltage controlled oscillator, adhering to Positive Emitter Coupled Logic PECL Standards. The output can be Tri-stated to facilitate testing or combined multiple clocks.


    Original     		PDF 10GbE;

    ecl 806

    Abstract: CML ECL termination PLE 2 - 25va Vterm pecl logic voltage levels
    Text: Application Note 806 LVPECL, PECL, ECL Logic and Termination March 2009 by: Ken Johnson and Bob Gubser ABSTRACT This application note will highlight characteristics of Pletronics Low Voltage Positive Emitter Coupled Logic LVPECL frequency control products and provide guidance for


    Original     		PDF

    m2071

    Abstract: M2054 M2057 m2061 M2063 "Voltage Controlled Oscillators" M2051
    Text: FULL SIZE D.I.L. M2051 thru M2057 L2051 thru L2057 M2061 thru M2063 L2061 thru L2063 M2071 thru M2073 L2071 thru L2073 VOLTAGE CONTROLLED OSCILLATORS 10KH PECL Logic, 0° to 70°C Thru-Hole, 5V 1 MHz to 175 MHz PECL 10KH – Thru-Hole VCXOs, 5V These thru-hole VCXOs are designed for


    Original     		PDF M2051 M2057 L2051 L2057 M2061 M2063 L2061 L2063 M2071 M2073 M2054 M2057 M2063 "Voltage Controlled Oscillators"

    Untitled

    Abstract: No abstract text available
    Text: MAX3822 I/O Model SPICE I/O Macromodels aid in understanding signal integrity issues in electronic systems. Most of Maxim’s High Frequency/Fiber Communication ICs utilize input and output I/O circuits with Current Mode Logic (CML), Positive Emitter Coupled Logic (PECL), and Low Voltage Differential Signal (LVDS)


    Original     		PDF MAX3822 151E-017 444E-021 000E-030 540E-019 H11A05

    MCH12140

    Abstract: MCK12140 application note MAX9382 MAX9382ESA MAX9382EUA MAX9383 MAX9383ESA MAX9383EUA MCK12140
    Text: 19-2234; Rev 1; 11/02 ECL/PECL Phase-Frequency Detectors The MAX9382/MAX9383 feature low propagation and reset delay, making them ideal for high-frequency clock synchronization use. The MAX9382 uses 100K logic levels, has a supply voltage range of VCC - VEE = 4.2V


    Original     		PDF MAX9382/MAX9383 MAX9382 MCK12140. MAX9383 MCH12140. 450MHz MS012 MCH12140 MCK12140 application note MAX9382ESA MAX9382EUA MAX9383ESA MAX9383EUA MCK12140

    2FV transistor

    Abstract: MCH12140 MCK12140 application note
    Text: 19-2234; Rev 0; 10/01 ECL/PECL Phase-Frequency Detectors The MAX9382/MAX9383 feature low propagation and reset delay, making them ideal for high-frequency clock synchronization use. The MAX9382 uses 100K logic levels, has a supply voltage range of VCC - VEE = 4.2V


    Original     		PDF MAX9382/MAX9383 MAX9382/MAX9383 2FV transistor MCH12140 MCK12140 application note

    Untitled

    Abstract: No abstract text available
    Text: 19-2234; Rev 1; 11/02 ECL/PECL Phase-Frequency Detectors The MAX9382/MAX9383 feature low propagation and reset delay, making them ideal for high-frequency clock synchronization use. The MAX9382 uses 100K logic levels, has a supply voltage range of VCC - VEE = 4.2V


    Original     		PDF MAX9382/MAX9383 MAX9382 MCK12140. MAX9383 MCH12140. 450MHz MS012

    Datasheet MCH12140

    Abstract: MAX9383 MAX9382 MAX9382ESA MAX9382EUA MAX9383ESA MAX9383EUA MCH12140 MCK12140 F3070
    Text: 19-2234; Rev 0; 10/01 ECL/PECL Phase-Frequency Detectors The MAX9382/MAX9383 feature low propagation and reset delay, making them ideal for high-frequency clock synchronization use. The MAX9382 uses 100K logic levels, has a supply voltage range of VCC - VEE = 4.2V


    Original     		PDF MAX9382/MAX9383 MAX9382 MCK12140. MAX9383 MCH12140. 450MHz MAX9382/MAX9383 Datasheet MCH12140 MAX9382ESA MAX9382EUA MAX9383ESA MAX9383EUA MCH12140 MCK12140 F3070

    VCO-600A

    Abstract: L1005 vectron ECL
    Text: Product Data Sheet VCO-600A Voltage Controlled Saw Oscillator Features • Output Frequency @ 155 MHz to 1 GHz • Low jitter, 3pS for 622, 6pS for 155 typical • Ideal for clock smoothing, frequency translation, clock and data retiming applications • 10K ECL, PECL logic levels with fast


    Original     		PDF VCO-600A VCO600A SO-28, OC192/OC48/OC12 ope44 1-88-VECTRON-1 VCO-600A L1005 vectron ECL

    VS700LG

    Abstract: GR-253-CORE VS-700 VS700
    Text: VS-700 Voltage Controlled SAW Oscillator Features • Industry Standard Package, 5.0 x 7.5 x 2.5 mm • Output Frequencies from 500 MHz to 850 MHz • 3.3 V Operation • Low Jitter < 0.30 ps-rms across 50 kHz to 80 MHz • LV-PECL Logic Levels with Fast Transition Times


    Original     		PDF VS-700 10GbE OC-192 INCITS/T11 1413-D GR-253-CORE VS-700 1-888-FAX-VECTRON 1-88-VECTRON-1 12Sep03 VS700LG VS700

    VS700LG

    Abstract: 70 MHz SAW FILTER
    Text: VS-700 Voltage Controlled SAW Oscillator Features • Industry Standard Package, 5.0 x 7.5 x 2.5 mm • Output Frequencies from 500 MHz to 850 MHz • 3.3 V Operation • Low Jitter < 0.5 ps-rms across 50 kHz to 80 MHz • LV-PECL Logic Levels with Fast Transition Times


    Original     		PDF VS-700 GR-253-CORE VS-700 1-888-FAX-VECTRON 1-88-VECTRON-1 08May03 VS700LG 70 MHz SAW FILTER

    311040M

    Abstract: VCO-600A od3 tube
    Text: Product Data Sheet VCO-600A Voltage Controlled Saw Oscillator Features • Output Frequency @ 155 MHz to 1 GHz • Low jitter, 1.5pS for 622, 3pS for 155 typical • Ideal for clock smoothing, frequency translation, clock and data retiming applications • 10K ECL, PECL logic levels with fast transition times


    Original     		PDF VCO-600A SO-28, OC192/OC48/OC12/OC3 STS48/STS12/STS3/STS1 VCO600A 311040M VCO-600A od3 tube

    Untitled

    Abstract: No abstract text available
    Text: FS6058-01 LVPECL to HCSL/LVTTL Motherboard Clock Driver IC 1.0 • Figure 2: Pin Configuration Features Distributes one differential LVPECL reference clock to six differential HCSL clock pairs and two singleended LVTTL MREF clocks HCSL current levels controlled by IREF current


    Original     		PDF FS6058-01 48-pin ISO9001 QS9000

    Untitled

    Abstract: No abstract text available
    Text: LOW-POWER HEX TTL-TO-PECL TRANSLATOR FEATURES DESCRIPTION The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this translation using only one +5V supply. The differential outputs allow


    Original     		PDF SY100S391 SY100S391JC J28-1 SY100S391JCTR SY100S391 F24-1) J28-1)

    AZ100ELT23

    Abstract: No abstract text available
    Text: AZ100ELT23 Dual Differential PECL to CMOS/TTL Translator www.azmicrotek.com DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL Positive ECL levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate


    Original     		PDF AZ100ELT23 AZ100ELT23 MC100ELT23 500ps

    Untitled

    Abstract: No abstract text available
    Text: « 01/Iie n /« V LOW-POWER HEX PECL-TO-TTL TRANSLATOR SYNERGY SEMICONDUCTOR FEATURES PRELIMINARY SY100S390 DESCRIPTION The SY100S390 is a hex PECL-to-TTL translator for converting 100K logic levels to TTL logic levels. Unlike other level translators, the SY100S390 operates using only one


    OCR Scan     		PDF 01/Iie SY100S390 SY100S390 28-pin T0Q13fil

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual TTL to D ifferential PECL Translator M C10ELT22 M C100ELT22 The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual


    OCR Scan     		PDF MC10ELT22/MC100ELT22 ELT22 10ELT 100ELT C10ELT22 C100ELT22 BR1330

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator MC10ELT20 MC100ELT20 The MC1OELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of


    OCR Scan     		PDF MC10ELT20 MC100ELT20 MC1OELT/100ELT20 ELT20 10ELT 100ELT BR1330 b3b7255

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual TTL to Differential PECL Translator MC10ELT22 MC100ELT22 The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual


    OCR Scan     		PDF MC10ELT22 MC100ELT22 MC10ELT/100ELT22 ELT22 10ELT 100ELT DL140

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual TTL to Differential PECL Translator MC10ELT22 MC100ELT22 The M C 10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The sm all outline 8-lead SOIC package and the low skew, dual


    OCR Scan     		PDF MC10ELT/100ELT22 ELT22 10ELT 100ELT 300ps 100ELT1 DL140

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual TTL to D ifferential PECL Translator M C10ELT22 M C100ELT22 The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual


    OCR Scan     		PDF C10ELT22 C100ELT22 MC10ELT/100ELT22 ELT22 10ELT 100ELT BR1330 3b7252

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate


    OCR Scan     		PDF MC100ELT23 MC100ELT23 ELT23 200mV DL140â

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Differential PECL to TTL Translator MC100ELT23 The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the


    OCR Scan     		PDF MC100ELT23 MC100ELT23 ELT23 differenc85Â 200mV DL140 b72SS