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QuickLogic Corporation QL3012-2PF100I-5818
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Bristol Electronics	QL3012-2PF100I-5818		18			1 - 10 - 100 - 1000 - 10000 -	Get Quote
QuickLogic Corporation QL3012-0PF144C
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Bristol Electronics	QL3012-0PF144C		4			1 - 10 - 100 - 1000 - 10000 -	Get Quote
QuickLogic Corporation QL3012-0PL84C
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Bristol Electronics	QL3012-0PL84C		1			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Quest Components	QL3012-0PL84C		2			1 $62.4 10 $62.4 100 $62.4 1000 $62.4 10000 $62.4	Buy Now
	QL3012-0PL84C		1			1 $100 10 $100 100 $100 1000 $100 10000 $100	Buy Now
QuickLogic Corporation QL3012-1PL84C FPGA, 320 CLBS, 12000 GATES, 225MHZ, PQCC84
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Quest Components	QL3012-1PL84C		33			1 $13.5 10 $10.125 100 $8.775 1000 $8.775 10000 $8.775	Buy Now
QuickLogic Corporation QL3012-1PF100I FIELD PROGRAMMABLE GATE ARRAY, 320 CLBS, 12000 GATES, 225MHZ, 320-CELL, CMOS, PQFP100
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Quest Components	QL3012-1PF100I		6			1 $62.4 10 $62.4 100 $62.4 1000 $62.4 10000 $62.4	Buy Now

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QL3012 Datasheets (136)

Part	Manufacturer	Description	Datasheet Type	PDF
QL3012	Unknown	60,000 Usable PLD Gate pASIC3 FPGA Combining High Performance and High Density	Original	PDF
QL3012	QuickLogic	High Performance and High Density with Low Cost and Complete Flexibility	Original	PDF
QL3012	QuickLogic	High-Speed, Low Power, Instant-On, High Security FPGA	Original	PDF
QL3012-0PF100C	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF100C	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF100C	QuickLogic	12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.	Original	PDF
QL3012-0PF100I	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF100I	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF100I	QuickLogic	12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.	Original	PDF
QL3012-0PF100M	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF100M	QuickLogic	12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.	Original	PDF
QL3012-0PF100M	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF144C	QuickLogic	12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.	Original	PDF
QL3012-0PF144C	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF

QL3012-0PF144I	QuickLogic	12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.	Original	PDF
QL3012-0PF144I	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF144M	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PF144M	QuickLogic	12,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.	Original	PDF
QL3012-0PL84C	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF
QL3012-0PL84C	QuickLogic	12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density	Original	PDF

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QL3012 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
QL3012 Abstract: PF100 PF144 PL84 QL3012-1PF100C QL3012-1PQ144C Text: QL3012 - pASIC 3 FPGATM 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density QL3012 - pASIC 3 FPGA DEVICE HIGHLIGHTS Device Highlights High Performance & High Density • 12,000 Usable PLD Gates with 118 I/Os ■ 16-bit counter speeds over 300 MHz, data path speeds over	Original	QL3012 16-bit PF100 PF144 PL84 QL3012-1PF100C QL3012-1PQ144C	PDF
Untitled Abstract: No abstract text available Text: QL3012 - pASIC 3 FPGATM 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density last updated 5/17/2000 QL3012 - pASIC 3 FPGA DEVICE HIGHLIGHTS Device Highlights High Performance & High Density • 12,000 Usable PLD Gates with 118 I/Os	Original	QL3012 16-bit	PDF
QL3012 Abstract: No abstract text available Text: QL3012 pASIC 3 FPGA Data Sheet •••••• 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 12,000 Usable PLD Gates with 118 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths	Original	QL3012 16-bit	PDF
pf144 Abstract: No abstract text available Text: QL3012 / QL3012R 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density PRELIMINARY DATA March, 1998 2 … 12,000 usable PLD gates, 118 I/O pins 11,520 bit RAM Option High Performance and High Density -12,000 Usable PLD Gates with 118 I/Os	Original	QL3012 QL3012R -16-bit pf144	PDF
100-PIN Abstract: 84-PIN PF100 PF144 PL84 QL3012 QL3012-1PF100C QL3012-1PQ144C Text: QL3012 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density April, 1999 4 pASIC 3 HIGHLIGHTS … 12,000 usable PLD gates, 118 I/O pins High Performance and High Density -12,000 Usable PLD Gates with 118 I/Os -16-bit counter speeds over 300 MHz, data path speeds over 400 MHz	Original	QL3012 -16-bit QL3012-rev. 100-PIN 84-PIN PF100 PF144 PL84 QL3012 QL3012-1PF100C QL3012-1PQ144C	PDF
QL3012-1PF144C Abstract: QL3012 PF100 PF144 PL84 PQ208 QL3012-1PF100C IO21 Text: QL3012 pASIC 3 FPGA Data Sheet •••••• 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 12,000 Usable PLD Gates with 118 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths	Original	QL3012 16-bit QL3012-1PF144C PF100 PF144 PL84 PQ208 QL3012-1PF100C IO21	PDF
QL3012-1PF100C Abstract: QL3012-1PQ144C 100-PIN 84-PIN PF144 QL3012 Text: QL3012 / QL3012R 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density PRELIMINARY DATA February, 1998 2 … 12,000 usable PLD gates, 118 I/O pins 11,520 bit Ram Option High Performance and High Density -12,000 Usable PLD Gates with 118 I/Os	Original	QL3012 QL3012R -16-bit QL3012-1PF100C QL3012-1PQ144C 100-PIN 84-PIN PF144	PDF
QL3004 Abstract: PLCC-84 QL3060 QL2003 QL2005 QL2007 QL2009 QL3012 QL3025 QL3040 Text: QuickSheet#4 pASIC FPGA Families High-Speed, Low Power, Instant-On, High Security FPGAs pASIC Family Highlights High performance over 400 MHz 100% routability and pin stability Instant-On capability High security and reliability Low power	Original	400MHz QL1004-U1 1210JHGDA QL3004 PLCC-84 QL3060 QL2003 QL2005 QL2007 QL2009 QL3012 QL3025 QL3040	PDF
QL4090 Abstract: pASIC 1 Family 160CQFP 208-CQFP Text: QL16x24B pASIC 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS …4,000 usable ASIC gates, 122 I/O pins Very High Speed – ViaLink metal-to-metal programmable–via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.	Original	QL16x24B 16-by-24 84-pin 100-pin 144-pin 160-pin 16-bit V144-TQFP QL24x32B QL4090 pASIC 1 Family 160CQFP 208-CQFP	PDF
208CQFP Abstract: No abstract text available Text: QL2007  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. E pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2007 -16-bit l144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 208CQFP	PDF
Untitled Abstract: No abstract text available Text: QL3004 pASIC 3 FPGA Data Sheet •••••• 4,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 4,000 Usable PLD Gates with 82 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths	Original	QL3004 16-bit	PDF
asynchronous fifo vhdl Abstract: 8 BIT ALU design with verilog/vhdl code full subtractor using ic 74138 74139 for bcd to excess 3 code vhdl code for 8bit bcd to seven segment display 32 BIT ALU design with verilog/vhdl code 74594 16 BIT ALU design with verilog/vhdl code B1516 RAM1024 Text: QuickWorks User Manual with SpDE Reference Release 2009.2.1 Contact Information QuickLogic Corporation 1277 Orleans Drive Sunnyvale, CA 94089 Phone: (408) 990-4000 (US) (905) 940-4149 (Canada) +(44) 1932-57-9011 (Europe) +(852) 2567-5441 (Asia) E-mail: [email protected]	Original		PDF
QL3004 Abstract: QL3004-1PL68C PF100 PL84 PQ208 QL3012-1PF100C Text: QL3004 pASIC 3 FPGA Data Sheet •••••• 4,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 4,000 Usable PLD Gates with 74 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths	Original	QL3004 16-bit QL3004-1PL68C PF100 PL84 PQ208 QL3012-1PF100C	PDF
pasic 3 Abstract: QL3004-1PL68C QL3004 QL3004E QL3004-1PL84C QL3006 QL3012 QL3025 QL3040 QL3060 Text: pASIC 3 FPGA Family Data Sheet •••••• Up to 60,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • Up to 60,000 usable PLD gates with up to 316 I/Os • 300 MHz 16-bit counters, 400 MHz datapaths	Original	16-bit pasic 3 QL3004-1PL68C QL3004 QL3004E QL3004-1PL84C QL3006 QL3012 QL3025 QL3040 QL3060	PDF

pASIC 2 FPGA FAMILY Abstract: QL2003 QL2005 QL2007 QL2009 QL3012 QL3025 Text: pASIC 2 FPGA FAMILY Combining Speed, Density, Low Cost and Flexibility The Ultimate Verilog / VHDL Silicon Solution Rev. D FAMILY HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	-16-bit QL3012 QL3025. QL2009 QL2007 QL2005 QL2003 pASIC 2 FPGA FAMILY QL2003 QL2005 QL2007 QL2009 QL3025	PDF
84-PIN Abstract: 84-PLCC Text: QL2005  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2005 -16-bit 144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 84-PIN 84-PLCC	PDF
100TQFP Abstract: 344RAM QL3040 Text: QL2003  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2003 -16-bit l144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 100TQFP 344RAM QL3040	PDF
QL4090 Abstract: No abstract text available Text: QL12X16B pASIC 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS …2,000 usable ASIC gates, 88 I/O pins Very High Speed – ViaLink metal-to-metal programmable–via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.	Original	QL12X16B 12-by-16 68-pin 84-pin 100-pin 16-bit Synops144-TQFP QL24x32B 208-PQFP QL4090	PDF
Untitled Abstract: No abstract text available Text: QuickSheet#3 Military Plastic Families High Performance Guaranteed Over the Military Temperature Range Military Plastic Highlights pASIC 1, pASIC 2, pASIC 3, and QuickRAM families 200+MHz Up to 176,000 usable system gates Up to 25k bits dual-port embedded RAM	Original	QL1003-U2	PDF
QL3012 Abstract: QL3025 QL3040 QL3060 QL4016 QL4090 footprint pqfp 208 QuickLogic Military FPGA Introduction Text: QuickLogic Military FPGA Introduction Military FPGA Combining High Performance and High Density Military FPGA Introduction DEVICE HIGHLIGHTS Device Highlights Military FPGA • Mil Std 883 and Mil Temp Ceramic ■ Mil Temp Plastic Guaranteed -55 to +125oC	Original	125oC 152-bit 16-bit -55oC, QL3012 QL3025 QL3040 QL3060 QL4016 QL4090 footprint pqfp 208 QuickLogic Military FPGA Introduction	PDF
144-TQFP Abstract: 256PBGA CPGA QL3012 QL3025 QL3040 QL3060 144TQFP 100-TQFP Text: pASIC pASIC DEVELOPMENT TOOLS Part Number Product Name QS-QWK-PC QuickWorks QS-QTL-PC QuickTools-PC Plus QS-QTL-WS QuickTools for Workstations N/A QuickChip N/A QuickMap QT-DFP-PC-A 1 DeskFab Programmer Kit N/A Synosys Interface Kit N/A Viewlogic Interface Kit	Original	44-PLCC 68-PLCC 100-TQFP 84-PLCC 84-CPGA3 144-TQFP 144-TQFP 256PBGA CPGA QL3012 QL3025 QL3040 QL3060 144TQFP 100-TQFP	PDF
intel 4040 Abstract: QL3004 transistor equivalent table 557 cmos 4040 datasheet general cross references QL5064 QL4009 QL4016 QL4058 QL5030 Text: EMBEDDED STANDARD PRODUCT A GENERATION AHEAD ! The Vialink Antifuse in 0.35µ µm CMOS QuickLogic Corporation 1277 Orleans Dr. Sunnyvale, CA 94089-1138 General Information: Applications Hotline FAX: EMAIL: WEB SITE: 408 990-4000 (408) 990-4100 (408) 990-4040	Original		PDF
Untitled Abstract: No abstract text available Text: QL3012 / QL3 0 1 2 R 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density PRELIMINARY DATA . 12,000 usable PLD gates, 118 I/O pins 11,520 bit RAM Option E High Performance and High Density -12,000 Usable PLD Gates with 118 I/Os	OCR Scan	QL3012 -16-bit	PDF
Untitled Abstract: No abstract text available Text: QL3012 12,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density April, 1999 pASIC 3 HIGHLIGHTS . 12,000 usable PLD gates, 1181/0 pins S High Performance and High Density -12,000 Usable PLD Gates with 118 I/Os -16-bit counter speeds over 300 MHz, data path speeds over 400 MHz	OCR Scan	QL3012 -16-bit	PDF

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QuickLogic Corporation QL3012-2PF100I-5818

QuickLogic Corporation QL3012-0PF144C

QuickLogic Corporation QL3012-0PL84C

QuickLogic Corporation QL3012-1PL84C

QuickLogic Corporation QL3012-1PF100I

QL3012 Datasheets (136)

QL3012 Datasheets Context Search

QL3012

Untitled

QL3012

pf144

100-PIN

QL3012-1PF144C

QL3012-1PF100C

QL3004

QL4090

208CQFP

Untitled

asynchronous fifo vhdl

QL3004

pasic 3

pASIC 2 FPGA FAMILY

84-PIN

100TQFP

QL4090

Untitled

QL3012

144-TQFP

intel 4040

Untitled

Untitled