broadcom switch user manual
Abstract: 10G-XFP MPC8540 TME-2000 FE-1000 queuing theory
Text: METROBOX REFERENCE DESIGN METRO-ETHERNET SOLUTION SUMMARY OF BENEFITS FEATURES • The MetroBox™ is a complete reference design with 24 GbE ports and two 10 GbE ports. • It is based on Broadcom's programmable FE-1000 packet processor, and the high-end TME-2000 queuing engine, both
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FE-1000
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MetroBox-PB00-R
broadcom switch user manual
10G-XFP
MPC8540
queuing theory
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queuing theory
Abstract: LAN91C1111 LAN91C111
Text: AN 10.12 Performance Analysis and Software Optimization on Systems Using the LAN91C111 1 Introduction This application note describes one approach to analyzing the performance of a LAN91C111 implementation and fine-tuning the software to increase system throughput. Often, the user looks to the
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LAN91C111
queuing theory
LAN91C1111
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VSC7226
Abstract: VSC882 vsc7303 microprocess and microcontroller ics gvrp microprocess and microcontroller tool kit ic VSC3140 VSC2800 microprocess and microcontroller tool kit VSC7301
Text: 01_16190_mutiservice_cover 11/25/02 11:09 AM Page 4 Vitesse Semiconductor Corporation 741 Calle Plano, Camarillo, CA 93012 tel: 805.388.3700 fax: 805. 987.5896 www.vitesse.com M U LT I - S E R V I C E SWITCHING & ROUTING SOLUTIONS PRODUCT GUIDE Asynchronous Crosspoint Switching
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MXT3010EP-A
Abstract: CRC-10 CRC-32 MXT3010 MXT3010EP-A66 MXT3010EP-A80 MXT3010EP-A-100
Text: M X T 3 0 1 0 High-Performance Cell Processor Typical Applications Segmentation and Reassembly SAR • ATM/packet/TDM interworking • Service adaptation to cell-based backplanes at up to 800Mbps • Combined SARing and cell-switching in low port-density applications
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800Mbps
MXT3020
OC-12
MXT3010
MXT3010:
MXT3010EP-A
CRC-10
CRC-32
MXT3010EP-A66
MXT3010EP-A80
MXT3010EP-A-100
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atmega128 USART C code examples
Abstract: AVR317 atmega128 SPI code example atmega128 usart code example 2577a STK500
Text: AVR317: Using the Master SPI Mode of the USART module 8-bit Microcontrollers Features • • • • Enables Two SPI buses in one device Hardware buffered SPI communication Polled communication example Interrupt-controlled communication example Application Note
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AVR317:
Atmega48.
577A-AVR-09/04
atmega128 USART C code examples
AVR317
atmega128 SPI code example
atmega128 usart code example
2577a
STK500
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pacemaker
Abstract: digital pacemaker VSC2400-25UY VSC2400-25
Text: PaceMaker 2.5 VSC2400-25 OC-48 Traffic Management and SAR Engine Traffic Management Family Features: Overall • OC-48 throughput · Manages 256K input and output queues · 1M buffer shared memory Policer · GCRA-compliant dual leaky bucket Policer · Weighted Random Early
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OC-48
pacemaker
digital pacemaker
VSC2400-25UY
VSC2400-25
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pacemaker
Abstract: AAL5 SAR traffic heart rate monitor
Text: PaceMaker 2.4 OC-48 Traffic Management Engine Traffic Management Family Product Brief A New Level of Feature Integration and Performance The PaceMaker 2.4™ is a highly integrated cell and packet processing engine which integrates a number of common functions found inside today’s
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OC-48
OC-48c
pacemaker
AAL5 SAR
traffic
heart rate monitor
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DN2510
Abstract: DUST Networks dn2510 LTC5800 DN2511
Text: Application Note: Obtaining Accurate Timestamps Application Note: Obtaining Accurate Timestamps This document contains advance information of a product in development. All specifications are subject to change without notice. Consult LTC factory before using.
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MMC card with optional AES
Abstract: EVK1104 Kingston sdhc Sandisk Extreme III SanDisk ultra SanDisk SDHC sandisk sd protocol sandisk ultra ii mmc kingston SDHC
Text: AVR 32771: USB High speed Device Mass storage on SD/MMC card with optional AES Features • • • • High Speed USB for high read and write speed Modular code simplifies maintenance and extensions Widely supported USB MSC interface Encrypted data for increased safety optional
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32-bit
EVK1104
AT32UC3A3.
2132A-AVR32-02/10
MMC card with optional AES
Kingston sdhc
Sandisk Extreme III
SanDisk ultra
SanDisk SDHC
sandisk sd protocol
sandisk ultra ii
mmc kingston
SDHC
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Santricity
Abstract: lsi 1064 CTS2600 RAID-5 BB738 engenio
Text: Best Practices Best Practices for Microsoft Exchange Server 2007 with the LSI CTS2600 Storage System 2010 LSI Corporation August 17, 2010 Table of Contents Introduction 3 Basics of Performance Tuning 3 Understanding the Context for Performance Tuning . 3
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CTS2600
Santricity
lsi 1064
RAID-5
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engenio
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444 NDK
Abstract: 444 NDK 27 TL16C750 PI DSP ETHC6000 BIOS example source code SPRU401 TMS320C6711 DSK module SPRU189 SPRU190
Text: TMS320C6000 TCP/IP Network Developer’s Kit NDK Porting Guide Literature Number: SPRU030 October 2001 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at
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TMS320C6000
SPRU030
444 NDK
444 NDK 27
TL16C750
PI DSP
ETHC6000
BIOS example source code
SPRU401
TMS320C6711 DSK module
SPRU189
SPRU190
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J1850-PWM
Abstract: ADXL202 avr AVR135 ADXL202 Accelerometer ADXL202 servo type avr AVR motor servo sae protocol
Text: AVR135: Using Timer Capture to Measure PWM Duty Cycle 8-bit Microcontrollers Features • • • • Scaled Duty-Cycle output range set at compile time . Self-configuring and self-clocking via run-time PWM period computation. Requires 1 timer (with Input Capture): 2 interrupts, 1 external pin.
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ADXL202
J1850-PWM
014A-AVR-10/05
J1850-PWM
ADXL202 avr
AVR135
ADXL202 Accelerometer
ADXL202
servo type avr
AVR motor servo
sae protocol
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BOSCH 30022
Abstract: bosch can 2.0B PIC18FXX8 AN853 AN916 AN-916 processing text message ECAN 78/BOSCH 30022
Text: AN916 Comparing CAN and ECAN Modules Author: Caio Gübel Microchip Technology Inc. With the arrival of the PIC18FXX8X family of microcontrollers featuring the Enhanced Control Area Network ECAN module, designers can now choose between the original CAN module present in the PIC18FXX8
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PIC18FXX8
D-85737
NL-5152
DS00916A-page
BOSCH 30022
bosch can 2.0B
PIC18FXX8
AN853
AN916
AN-916
processing text message
ECAN
78/BOSCH 30022
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Packet Synchronization in Cellular Backhaul Networks
Abstract: 3g call flow IEEE1588v2 3g data call flow
Text: Packet Synchronization in Cellular Backhaul Networks By Patrick Diamond, PhD, Semtech Corporation Semtech White Paper October 2008 INTRODUCTION For carriers to leverage cost-effective IP networks to handle the increased bandwidth expected from 3G and 4G services they need to know the issues
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Packet Synchronization in Cellular Backhaul Networks
3g call flow
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MC68376
Abstract: 82C250 CAN Driver 82c250 motorola BCANPSV2.0 engine control module bosch hc12 82C250 AN1776 HC05 HC08 HC12
Text: Freescale Semiconductor, Inc. Order this document by AN1776/D Motorola Semiconductor Application Note Freescale Semiconductor, Inc. AN1776 Stereo Audio Transmission Over The CAN Bus Using The Motorola MC68376 With TouCAN Module By Allan Dobbin Transportation Systems Group
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AN1776
MC68376
82C250 CAN Driver
82c250 motorola
BCANPSV2.0
engine control module bosch hc12
82C250
AN1776
HC05
HC08
HC12
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service manual tv seg pacific
Abstract: MC68376 bosch 7.4.3 AN1776 HC05 HC08 HC12 82C250 engine control module bosch hc12 bosch microsecond
Text: Order this document by AN1776/D Motorola Semiconductor Application Note AN1776 Stereo Audio Transmission Over The CAN Bus Using The Motorola MC68376 With TouCAN Module By Allan Dobbin Transportation Systems Group East Kilbride, Scotland Rev 1.0, 10th July 1998
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service manual tv seg pacific
bosch 7.4.3
AN1776
HC05
HC08
HC12
82C250
engine control module bosch hc12
bosch microsecond
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service manual tv seg pacific
Abstract: MC68376 MC683 philips motor mb12 toucan freescale canbus BCANPSV2.0 ELEVATOR Motor Control Circuits sickle converter AN1776
Text: Freescale Semiconductor Order this document by AN1776/D Freescale Semiconductor, Inc. AN1776 Stereo Audio Transmission Over The CAN Bus Using The Motorola MC68376 With TouCAN Module By Allan Dobbin Transportation Systems Group East Kilbride, Scotland Rev 1.0, 10th July 1998
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AN1776
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service manual tv seg pacific
MC683
philips motor mb12
toucan freescale
canbus
BCANPSV2.0
ELEVATOR Motor Control Circuits
sickle converter
AN1776
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CTS2600
Abstract: Santricity lsi sas 1064 OOW2000 ppt on 14 segment display
Text: Best Practices Best Practices for VMware ESX 3.5 and the LSI CTS2600 Storage System 2010 LSI Corporation August 16, 2010 Table of Contents Chapter 1 . 4
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lsi sas 1064
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lr33300
Abstract: cw33300 LR33310 transistor m 9587 lsi lr33310 PCF 7900 L64360 hp 7540 J14028 atmizer
Text: L64360 and ATMizer Architecture Technical Manual This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using
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L64360
MN71-000101-99
D-102
lr33300
cw33300
LR33310
transistor m 9587
lsi lr33310
PCF 7900
hp 7540
J14028
atmizer
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pin configuration of intel 80386
Abstract: PC BIOS Source code A 9060 9060ES 9060SD FFA00100 FFA00104 FFA00108 FFA00110 FFA00128
Text: Go to next Section: EEPROM Load Instructions Return to Table of Contents PCI 9060 Theory of Operation PLX PCI9060 Theory of Operations Revision 2.0 February 9, 1996 PLX Technology, Inc. 390 Potrero Avenue, Sunnyvale, California 94086 WWW: http://www.plxtech.com/
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PCI9060
pin configuration of intel 80386
PC BIOS Source code
A 9060
9060ES
9060SD
FFA00100
FFA00104
FFA00108
FFA00110
FFA00128
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D100
Abstract: No abstract text available
Text: ASC Performance Terminology and Concepts Information in this document is provided in connection with Intel products. This report is provided “as is.” No license, express, implied, or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's
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Untitled
Abstract: No abstract text available
Text: THEORY OF OPERATION The concept of presenting the shared RAM as a FIFO of packets, w ith a memory management unit allocating memory on a per packet basis responds to the following needs: Multiple upper layer support - The SM C91C94 facilitates interfacing to multiple upper layer
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Untitled
Abstract: No abstract text available
Text: STANDARD MICROSYSTEMS CORPORATION, 90 Artoy Drive, Hauppauge, NY 11788 516 435-6000 Fax (516) 231-6004 SMC91C92 DIVISION Single-Chip Ethernet Controller with RAM FEATURES • • • • • • • • • • Single-Chip Ethernet Controller 4608 Bytes of On-Chip RAM
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SMC91C92
10BASE-T
16-Bit
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