DT3316-472
Abstract: 82450 CV-GX sanyo ML6552CS-4 ML6552CS-5
Text: July 1997 PRELIMINARY ML6552 Bus Termination Regulator GENERAL DESCRIPTION FEATURES The ML6552 switching regulator is designed to convert voltage supplies ranging from 2.5V to 6V into a desired output voltage or termination voltage for various applications. The ML6552 can be implemented to
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ML6552
ML6552
DT3316-472
82450
CV-GX sanyo
ML6552CS-4
ML6552CS-5
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a2431
Abstract: 506k SB-36110VX 296k VME resolver
Text: Make sure the next Card you purchase has. SB-36110VX VME Compatible Twelve Channel Synchro/Resolver-to-Digital Converter FEATURES • Up to 12 Independent Converter Channels • Accepts Synchro or Resolver Inputs • ±1 min Accuracy • Synthesized Reference
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SB-36110VX
32-Bit
SB-36110VX
1-800-DDC-5757
A5976
H-01/06-0
a2431
506k
296k
VME resolver
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zener diode a24
Abstract: ZENER A24 296k
Text: Make sure the next Card you purchase has. SB-36110VX VME Compatible Twelve Channel Synchro/Resolver-to-Digital Converter FEATURES • Up to 12 Independent Converter Channels • Accepts Synchro or Resolver Inputs • ±1 min Accuracy • Synthesized Reference
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SB-36110VX
32-Bit
SB-36110VX
1-800-DDC-5757
A5976
G-07/05-0
zener diode a24
ZENER A24
296k
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A 69157
Abstract: JW-32CV3 1485C-P1-C150 JW32CV3 RH -012C RELAY Power supply E2060 a 322j 1485C-P1-A DCA1-5C10 JW-100SP
Text: Version 1.1 Produced in Mar. 2003 R SVME Built-in Controller Model name JW-32CV3 Instruction Manual Applicable to software version 2.4 S2.4 Thank you for purchasing this VME built-in controller, the JW-32CV3. Please familiarize yourself with the module by reading this user’s manual thoroughly.
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JW-32CV3
JW-32CV3.
JW-32CV3
JW-32CV3,
JW30H
JW-32CUH1)
JW30H
A 69157
1485C-P1-C150
JW32CV3
RH -012C RELAY
Power supply E2060
a 322j
1485C-P1-A
DCA1-5C10
JW-100SP
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MVME162
Abstract: MVME323 MVME162 244LSE MVME162 debugger mvme 162 222 IEEE Standard 1014-1987 MVME162P-344E mvme374 MVME162 battery problem MVME162P-344
Text: MVME162P4 VME Embedded Controller Installation and Use V162PFXA/IH1 June 2000 Copyright 2000 Motorola, Inc. All rights reserved. Printed in the United States of America. Motorola and the Motorola logo are registered trademarks of Motorola, Inc. MC68040 and MC68060™ are trademarks of Motorola, Inc.
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MVME162P4
V162PFXA/IH1
MC68040TM
MC68060TM
Z85230
MVME162
MVME323
MVME162 244LSE
MVME162 debugger
mvme 162 222
IEEE Standard 1014-1987
MVME162P-344E
mvme374
MVME162 battery problem
MVME162P-344
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LVT16245
Abstract: No abstract text available
Text: Cover Story BUS TERMINATION Terminating buses in computer designs To maintain reliability in a typical computer system that is idle or being reconfigured, you must design system interconnects such that they maintain or transition to a valid logic level. You can use several
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1AM5
Abstract: No abstract text available
Text: TitlePage - 80A3010_MA001_01 Universe II VME-to-PCI Bus Bridge Manual User Manual Document Number: 80A3010_MA001_01 Document Status: Final Release Date: June 2002 This document discusses the features, capabilities, and configuration requirements of the Universe II. It is intended for
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80A3010
LD64EN
1AM5
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tsi148
Abstract: TSI148-133IL tsi148-133cl Tundra TSi148 tsi148 interrupt nokia 1280 circuit diagram free tsi148 driver TM1242 64BCL ASI 10443
Text: TitlePage - 80A3020_MA001_08 Tsi148 PCI/X-to-VME Bus Bridge User Manual Document Number: 80A3020_MA001_08 Document Status: Final Release Date: September 2006 This document discusses the features, capabilities, and configuration requirements of Tsi148. It is intended for hardware and software
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80A3020
Tsi148TM
Tsi148.
Tsi148,
REQ64_
Tsi148
TSI148-133IL
tsi148-133cl
Tundra TSi148
tsi148 interrupt
nokia 1280 circuit diagram free
tsi148 driver
TM1242
64BCL
ASI 10443
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VMEbus Handbook
Abstract: LEMO VME COnnector VME64X lemo 9 pin connector vme case VMEbus interface handbook SIS3400 0x22C LEMO 7 pin
Text: SIS Documentation SIS3400 CDMSII TDC/Time Stamper SIS3400 CDMS II VME TDC/Time Stamper User Manual SIS GmbH Harksheider Str. 102A 22399 Hamburg Germany Phone: +49 0 40 60 87 305 0 Fax: +49 (0) 40 60 87 305 20 email: [email protected] http://www.struck.de
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SIS3400
SIS3400
VME64x.
VME64xP
rs485
VMEbus Handbook
LEMO
VME COnnector
VME64X
lemo 9 pin connector
vme case
VMEbus interface handbook
0x22C
LEMO 7 pin
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VA22
Abstract: 68 pin pcb SCSI connector CPU-41 68c681 XICOR X24C16 VA23 CPU61 D-82054 RS232 8 pin MINI DIN 9 pole 82C503
Text: User’s Manual CPU61 / CPU41 4th edition Declaration of Conformity We, Manufacturer MicroSys Electronics GmbH Mühlweg 1 D-82054 Sauerlach Germany declare that the product CPU 61 / CPU 41 is in conformity with: EN 50081-1 Generic emission standard EN 50082-1 Generic immunity standard
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CPU61
CPU41
D-82054
EW178MA-01AG
CPU41AG
VA22
68 pin pcb SCSI connector
CPU-41
68c681
XICOR X24C16
VA23
RS232 8 pin MINI DIN 9 pole
82C503
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Untitled
Abstract: No abstract text available
Text: SN74GTLP1394 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SELECTABLE POLARITY SCES286A – OCTOBER 1999 – REVISED MAY 2000 D D D D D D D D D, DGV, OR PW PACKAGE TOP VIEW TI-OPC Overshoot Protection Circuitry Limits Ringing on Improperly Terminated
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SN74GTLP1394
SCES286A
TSB14C01A
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tlp817
Abstract: LT1083CP gm45 GTLPH16612 TLP817 c Level-37 CML ECL termination ec ubt GTL16612 GP394
Text: Application Report SCEA019 - January 2001 Texas Instruments GTLP Frequently Asked Questions Steve Blozis Standard Linear & Logic ABSTRACT Using a question-and-answer format, advantages of TI’s GTLP devices, particularly for backplane applications, are presented, as well as differences between GTLP and
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SCEA019
tlp817
LT1083CP
gm45
GTLPH16612
TLP817 c
Level-37
CML ECL termination
ec ubt
GTL16612
GP394
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signal path designer
Abstract: No abstract text available
Text: SN74GTLP1394 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES286D – OCTOBER 1999 – REVISED AUGUST 2001 D D D D D D D D D D D D D, DGV, OR PW PACKAGE TOP VIEW TI-OPC Circuitry Limits Ringing on
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SN74GTLP1394
SCES286D
signal path designer
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Untitled
Abstract: No abstract text available
Text: SCV64 User Manual http://www.silicon360.com The information in this document is subject to change without notice and should not be construed as a commitment by Silicon360. While reasonable precautions have been taken, Silicon360 assumes no responsibility for any errors that may appear in this document.
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SCV64â
silicon360
SCV64
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SAA55
Abstract: No abstract text available
Text: DesignCon 2003 TecForum I2C Bus Overview January 27 2003 Philips Semiconductors Jean Marc Irazabal –Technical Marketing Manager for I2C Devices Steve Blozis –International Product Manager for I2C Devices • 1st Hour Agenda • Serial Bus Overview • I2C Theory Of Operation
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AN10216
AN10126-01
SAA55
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signal path designer
Abstract: No abstract text available
Text: SN74GTLP21395 TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES350C – JUNE 2001 – REVISED NOVEMBER 2001 D D D D D D D D D D D D D TI-OPC Circuitry Limits Ringing on Unevenly Loaded Backplanes
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SN74GTLP21395
SCES350C
signal path designer
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GP139
Abstract: GP394 A115-A C101 SN74GTLP1394 SN74GTLP1394D SN74GTLP1394DR SN74GTLP1394RGYR SN74GTL Signal Path DESIGNER
Text: SN74GTLP1394 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES286F – OCTOBER 1999 – REVISED APRIL 2003 D D D D D RGY PACKAGE TOP VIEW D, DGV, OR PW PACKAGE (TOP VIEW) OEBY Y1 Y2
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SN74GTLP1394
SCES286F
000-V
A114-A)
A115-A)
GP139
GP394
A115-A
C101
SN74GTLP1394
SN74GTLP1394D
SN74GTLP1394DR
SN74GTLP1394RGYR
SN74GTL
Signal Path DESIGNER
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A115-A
Abstract: C101 SN74GTLP1394 SN74GTLP1394D SN74GTLP1394DR SN74GTLP1394RGYR signal path designer
Text: SN74GTLP1394 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES286F – OCTOBER 1999 – REVISED APRIL 2003 D D D D D RGY PACKAGE TOP VIEW D, DGV, OR PW PACKAGE (TOP VIEW) OEBY Y1 Y2
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SN74GTLP1394
SCES286F
000-V
A114-A)
A115-A)
A115-A
C101
SN74GTLP1394
SN74GTLP1394D
SN74GTLP1394DR
SN74GTLP1394RGYR
signal path designer
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signal path designer
Abstract: No abstract text available
Text: SN74GTLP1394 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES286E – OCTOBER 1999 – REVISED AUGUST 2001 D D D D D D D D D D D D D, DGV, OR PW PACKAGE TOP VIEW TI-OPC Circuitry Limits Ringing on
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SN74GTLP1394
SCES286E
signal path designer
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S39421
Abstract: CR injector driver DRIVER injector CR IRF7606 schematic P-channel power mosfet SO-8 30V 9.2A 20 MTD20P03HDL2 motorola application note an-1
Text: SUMMIT S39421 MICROELECTRONICS, Inc. Hot Swap Voltage Controller FEATURES • Full Voltage Control for Hot Swap Applications – Card Insertion Detection – Platform Voltage Detection – Card Voltage Sequencing – 5 Volt, 12 Volt and 3.3 Volt • 12 Volt FET Enable Outputs
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S39421
50V/Sec
S39421
CR injector driver
DRIVER injector CR
IRF7606 schematic
P-channel power mosfet SO-8 30V 9.2A 20
MTD20P03HDL2
motorola application note an-1
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S82378ZB
Abstract: MT48T18 mvme1600 motorola DSR 410 satellite receiver s82378 53C810 CSR 12j15 53c825 DECchip 21040 CL-GD5446 Technical Reference Manual
Text: MVME1603/MVME1604 Single Board Computer Installation and Use V1600-1A/IH4 Notice While reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this
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MVME1603/MVME1604
V1600-1A/IH4
EIA-232-D
EIA-530
MVME1603/MVME1604
S82378ZB
MT48T18
mvme1600
motorola DSR 410 satellite receiver
s82378
53C810
CSR 12j15
53c825
DECchip 21040
CL-GD5446 Technical Reference Manual
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Untitled
Abstract: No abstract text available
Text: July 1997 MÉL Micro Linear ML6552 Bus Termination Regulator GENERAL DESCRIPTION FEATURES The ML6552 switching regulator is designed to convert voltage supplies ranging from 2.5V to 6V into a desired output voltage or termination voltage for various applications. The ML6552 can be implemented to
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ML6552
ML6552
bD13ma
00Db702
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mitsubishi melcard
Abstract: melcard AM2 pinout 80486DX2 microprocessor 82c482 P4842 80486 ADDRESSING MODES EXAMPLES 16V8Q-25 RCPU40 intel 486 dx2 clock circuit 82c356
Text: •r Industrial Computers Memminger Str.14 D-86159 Augsburg Tel.: +49 821 5034-0 Fax: +49 821 5034-119 V4 8 6 V 2.x PC/AT compatible Processor Module with the 80486 Hardware Manual C 23 April 1996 by or Industrial Computers Product Note: V486, V2.x Functional Differences to Version 1.x
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D-86159
mitsubishi melcard
melcard AM2 pinout
80486DX2 microprocessor
82c482
P4842
80486 ADDRESSING MODES EXAMPLES
16V8Q-25
RCPU40
intel 486 dx2 clock circuit
82c356
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K-FC20
Abstract: No abstract text available
Text: Openbus Interface Components - SCV64 User Manual 3 Description of SCV64 Signals The following detailed description of the SCV64 signals is organized according to these functional groups: • VMEbus Signals • Local Signals 3.1 VMEbus Signals BBSY* ACTIVE LOW OPEN DRAIN HIGH CURRENT BIDIRECT
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SCV64
K-FC20
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PDF
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