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    ARM dual port SRAM compiler

    Abstract: designware i2c verilog code voltage regulator NEC-V850 ARM10 ARM946 TMS320C54X fastscan TI ASIC gs40 LogicVision
    Text: GS40 0.11-µm CMOS Standard Cell/Gate Array Version 1.0 January 29, 2001 Copyright  Texas Instruments Incorporated, 2001 The information and/or drawings set forth in this document and all rights in and to inventions disclosed herein and patents which might be granted thereon disclosing or employing the


    Original
    SRST143 ARM dual port SRAM compiler designware i2c verilog code voltage regulator NEC-V850 ARM10 ARM946 TMS320C54X fastscan TI ASIC gs40 LogicVision PDF