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    TAC 2J 105 Search Results

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    8002K

    Abstract: TACB2J224 TACB2G824 TACB2E226 FTACB631V105 f 630 TACB2K563 3152F
    Text: 高周波・大電流用(低圧用) RoHS指令 適合品 (標準品) ◆特 長 ● 弊社独自の円筒構造のため性能が優れております。 ● 通電時の発音が微小です。 (静音対応) ● 体積比で従来の TAC に比べ、平均 50%の小形化達成。


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    PDF 250Vdc315Vdc400Vdc630Vdc800Vdc 033F22F 1100kHz 2100kHzFig 3100kHz 50Ao-p 8515K1057 12K6K 9095RH 1003O 8002K TACB2J224 TACB2G824 TACB2E226 FTACB631V105 f 630 TACB2K563 3152F

    Untitled

    Abstract: No abstract text available
    Text: Nov 2006 HYB18M512160BF-6 HYE18M512160BF-6 HYB18M512160BF-7.5 HYE18M512160BF-7.5 DRAMs for Mobile Applications 512-Mbit DDR Mobile-RAM RoHS compliant Data S heet Rev.1.80 HY[B/E]18M512160BF 512-Mbit DDR Mobile-RAM HYB18M512160BF-6; HYE18M512160BF-6 HYE18M512160BF-7.5


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    PDF HYB18M512160BF-6 HYE18M512160BF-6 HYB18M512160BF-7 HYE18M512160BF-7 512-Mbit 18M512160BF HYB18M512160BF-6;

    tl 0741

    Abstract: No abstract text available
    Text: GM71C4800A/AL GM71CS4800A/AL LG S em icon Co.,Ltd. 524,288 W ORDS x 8 BIT CMOS DYNAM IC RAM Description Features The G M 71C4800A/AL is the new generation dynamic RAM organized 524,288 x 8 bit. GM71C4800A/AL has realized higher density, higher performance and various functions by utilizing


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    PDF GM71C4800A/AL GM71CS4800A/AL 71C4800A/AL GM71CS4800A/AL tl 0741

    TAC 2J 105

    Abstract: TAC 2J 3A1250V
    Text: FILM CAPACITORS FOR USE IN HIGH FREQUENCY AND HIGH VOLTAGE EQUIPMENT • Standaid Ratings W x H x T mm (M e ta lliz e d P o ly p ro p y le n e F ilm C a p a c ito r s ) T A C -S E R IE S \ (H ig h F req u e n cy U se, R esin D ip p e d T ype) • Specifications


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    PDF 33juF) 000hrs. TAC 2J 105 TAC 2J 3A1250V

    TM4SN64EPN10

    Abstract: TM2SN64EPN-10 TM48N64EPN TM4SN64EPN-10 TMS626812
    Text: TM2SN64EPN 2097152 BY 64-BIT TM4SN64EPN 4194304 BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULES _ SYNCHRONOUS CLOCK CYCLE TIME *CK3 , {CL = 3 t ACCESS TIME CLOCK TO OUTPUT >CK2 CL = 2) *CK3 (CL = 3) *CK2 (CL = 2) • • • • • • • •


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    PDF TM2SN64EPN 64-BIT TM4SN64EPN SMMS696 TM2SN64EPN. TM4SN64EPN 66-MHz 168-Pin TM4SN64EPN10 TM2SN64EPN-10 TM48N64EPN TM4SN64EPN-10 TMS626812

    active suspension

    Abstract: 3tr5 ujt transistor MSM56V16800E MSM56V16800E-10 MSM56V16800E-8 transistor mark BA
    Text: E2G1053-18-54 O K I Sem iconductor MSM56V16800E Thisversion:,ul 1998 2-Bank x 1,048,576-Word x 8-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MSM56V16800E is a 2-bank x 1,048,576-word x 8-bit synchronous dynamic RAM, fabricated in Oki’s CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and


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    PDF E2G1053-18-54 MSM56V16800E 576-Word MSM56V16800E cycles/64 active suspension 3tr5 ujt transistor MSM56V16800E-10 MSM56V16800E-8 transistor mark BA

    LS7261/LS7262

    Abstract: No abstract text available
    Text: _ LSI COMPUTER SYSTEMS 54E D LSI/CSI sis- 53D4b0b Q00CH32 blO LSC T 'S X - /J’-02s- LS7260/LS7261 LS7262 Manufacturers of Custom and Standard L S I Circuits 1235 Walt Whitman Road, Melville, N Y 11747-3086 • Tel.: 516 271-0400 • Fax: (516) 271-0405


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    PDF 53D4b0b Q00CH32 LS7260/LS7261 LS7262 LS7260) LS7261/LS7262) LS7260/61/62 LS726Q/61/62 S304b0b LS7261 LS7261/LS7262

    M27256-2F1

    Abstract: M27256 30F1 M27256F1 27256-2 m27256 sgs 27256 eprom M27256-3F1 M27256-4F1 Z8000
    Text: o z> 0 ù > 0 / o SVI2 7 2 5 6 — QQ2Q42- S 6 r S> 256K 32K x 8 c ASABLE PROM FAST ACCESS TIME: 200ns 250ns 300ns 450ns MAX MAX MAX MAX M27256-2F1 M27256F1/M27256F6/M27256-25F1 ' M27256-3F1/M27256-30F1 M27256-4F1/M27256-4F6/M27256-45F1 0 to 70°C STANDARD TEMPERATURE RANGE


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    PDF M27256 200ns M27256-2F1 250ns M27256F1/M27256F6/M27256-25F1 300ns M27256-3F1/M27256-30F1 450ns M27256-4F1/M27256-4F6/M27256-45F1 M27256 M27256-2F1 30F1 M27256F1 27256-2 m27256 sgs 27256 eprom M27256-3F1 M27256-4F1 Z8000

    D56V62160

    Abstract: BA RX transistor d56v621 3tr5
    Text: O K I Semiconductor MD56V62160/H 4-Bank x 1,048,576-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM D E SCRIPTIO N T he M D 5 6 V 6 2 1 6 0 /H is a 4 -b a n k x 1,048,576-w ord x 16-bit sy n c h ro n o u s d y n a m ic R A M , fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs


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    PDF MP56V62160/H_ 576-Word 16-Bit MD56V62160/H cycles/64 D56V62160 BA RX transistor d56v621 3tr5

    FOR5J

    Abstract: GTO thyristor 100A, 400V TO-220AH TSZ25G 5F13 TSS1G41 s6565g GTO thyristor 5A, 400V MSG100L41 TSS2G41S
    Text: [ Thyristors P h a s e Control T h yristo rs : * i'eak off state v<>!t,tK<‘ and tewrse voilage Average "n-state current 50V 0. IA 0.3A 0.5A IA 2A S F 0 K ÎA 4 2 3A 100V SF0 R 1 H 4 2 SF0 R 3 H 4 2 SFOH5H43 SM H12 S F2 B 4 1 SF3 H 1 4 SF3H41 SF3 H 4 2 SF5 H 1 3


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    PDF SFOH5H43 SF3H41 SF5H41 1000A I500A SF1500C SF1500J27 SF500H27 SF600H27 SF500D27 FOR5J GTO thyristor 100A, 400V TO-220AH TSZ25G 5F13 TSS1G41 s6565g GTO thyristor 5A, 400V MSG100L41 TSS2G41S

    736T

    Abstract: No abstract text available
    Text: HYM72V32C736T8 , 32Mx72, 32Mx8 based PC133 DESCRIPTION T he H Y M 72V 32 C 736T 8 S e ries are 32M x72bits EC C S ynchro nous DR AM M odules. T he m odules are com posed o f nine 32M x8bits CM O S S ynchronous D R AM s in 400 m il 54pin TS O P -II package, one 2K bit E E PR O M in 8pin TS S O P package on a 168pin glass-e poxy


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    PDF HYM72V32C736T8 32Mx72, 32Mx8 PC133 x72bits 54pin 168pin 0022uF 736T

    Untitled

    Abstract: No abstract text available
    Text: irrte1* M51C256H HIGH PERFORMANCE RIPPLEMODETm 256K x 1 CHMOS DYNAMIC RAM M ilita ry M51C256H-15 M51C256H-20 Maximum Access Time ns 150 200 Maximum Column Address Access Time (ns) 70 90 High Reliability Ceramic— 16 Pin DIP Ripplem ode Operation — Continuous Data Rate over 12 MHz


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    PDF M51C256H M51C256H-15 M51C256H-20 M51C256H

    Untitled

    Abstract: No abstract text available
    Text: O K I Semiconductor E2G1052-17-X1 M D 5 6 V 6 2 1 6 0 /H 4-Bank x 1,048,576-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The M D 56V 62160/H is a 4-bank x 1,048,576-w ord x 16-bit synchronous dynam ic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs


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    PDF E2G1052-17-X1 576-Word 16-Bit 62160/H 576-w

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs O ’d ' MH16S72VJB-6 r 1,207,959,552-BIT 16,777,216-WORD BY 72-BIT Synchronous DYNAMIC RAM ^ -PRELIMINARY Some of contents are subject to change without notice. DESCRIPTION The MH16S72VJB is 16777216 - word x 72-bit Synchronous


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    PDF MH16S72VJB-6 552-BIT 216-WORD 72-BIT MH16S72VJB 72-bit 85pin 94pin 10pin 95pin

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Speo. M it s u b is h i lsis Some contents are subject to change w ithout notice. MH8S64FFC-10,10L 536870912-BIT 8388608 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH8S64FFC is 8388608 - word by 64-bit Synchronous DRAM module. This consists of four


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    PDF MH8S64FFC-10 536870912-BIT 64-BIT MH8S64FFC 64-bit 144-pin MIT-DS-0281

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs MH16S72BDFA-7, -8 1,207,959,552-BIT 16,777,216-W O RD BY 72-BIT Synchronous DYNAMIC RAM PRELIMINARY Some of contents are su bject to change w ith o u t notice. DESCRIPTION The MH16S72BDFA is 16777216 - word x 72-bit Synchronous DRAM module. This consist of eighteen


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    PDF MH16S72BDFA-7, 552-BIT 72-BIT MH16S72BDFA 16S72BD 100MHz MIT-DS-0329-0

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs MH32S72QJA-7, -8 2415919104-BIT 33554432-W O RD BY 72-BIT Synchronous DYNAMIC RAM PRELIMINARY Some of contents are su bject to change w ith o u t notice. DESCRIPTION The MH32S72QJA is 33554432 - word x 72-bit S ynch ron ous DRAM module. This consist of eighteen


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    PDF MH32S72QJA-7, 2415919104-BIT 3554432-W 72-BIT MH32S72QJA 32S72Q 100MHz 100MHz

    68681

    Abstract: No abstract text available
    Text: Signetics 68681 Dual Asynchronous Receiver/Transmitter DUART Product Specification Military Microprocessor Products DESCRIPTION The S ignetics 68681 D ual U niversal A syn ch ro n o us R eceiverH Vansm itter (D U AR T) is a sing le -ch ip M O S -LS I co m ­


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    PDF

    814400

    Abstract: marking CEZ MAS 10 RCD mb814400 MB814400-10 MB814400-12 MB814400-80 ZIP-20P-M02 marking Z1p
    Text: Novem ber 1991 Edition3.0 :• , .-y,-.:. FUJITSU . DATASHEET M B 8 1 4400-80/-10/-12 CMOS 1 M X 4 B I T FAST PAGE MODE DRAM CM O S 1,048,576 x 4 bit Fast Page Mode Dynamic RAM The Fujitsu MB814400 is a fully decoded CMOS Dynamic RAM DRAM that contains 4,194,304


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    PDF MB814400-80/-1o/-12 MB814400 MB614400 024-bits 814400 marking CEZ MAS 10 RCD MB814400-10 MB814400-12 MB814400-80 ZIP-20P-M02 marking Z1p

    Untitled

    Abstract: No abstract text available
    Text: I = =• = IBM13N8644HCC IBM13N8734HCC P relim inary 8M x 64/72 O n e-B an k U nbuffered S D R A M M odule Features • 168-Pin Unbuffered 8-Byte Dual In-Line Memory Module • 8Mx64/72 Synchronous DRAM DIMM • Three speed sorts: • -260 and -360 for PC100 applications


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    PDF 168-Pin 8Mx64/72 PC100 66MHz IBM13N8644HCC IBM13N8734HCC

    JASO d 605-74

    Abstract: JIS D 5500 JIS C-3406 LT 7220 JASO 7002 JASO d605 tensile strength crimping pull test AMP connector Mark VII
    Text: AMP Product Specification 108-5165 19 OCT 99 « ¿ w s » Rev. B1 Multi-Interlock Mark II Connector for wire to board termination v —£11 MIC C o n ten ts First 16 pages following this top sheet English version Next 17 pages Japanese version When only one of above versions is supplied to customers, this top sheet shall be


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    PDF FJOO-1742-99 J-002-1 D605-74 MIL-STD-20 JASO d 605-74 JIS D 5500 JIS C-3406 LT 7220 JASO 7002 JASO d605 tensile strength crimping pull test AMP connector Mark VII

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Speo. M it s u b is h i lsis Some contents are subject to change w ithout notice. MH4S64BKG -7,-8,-10 268435456-BIT 4194304 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH4S64BKG is 4194304 - word by 64-bit Synchronous DRAM module. This consists of four


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    PDF MH4S64BKG 268435456-BIT 64-BIT 64-bit 144-pinnts MIT-DS-0245-0

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Speo. M it s u b is h i lsis Some contents are subject to change w ithout notice. MH8S64AKD -8,-10,-8L,-10L 536870912-BIT 8388608 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH8S64AKD is 8388608 - word by 64-bit Synchronous DRAM module. This consists of eight


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    PDF MH8S64AKD 536870912-BIT 64-BIT 64-bit MIT-DS-0131-1

    HD63803

    Abstract: 63b03 AS3922 W9600 63a03 HD63B03XP HD6303RP mc 1513 HD63B03YP HD63A03RP
    Text: HD6303R,HD63A03R,-HD63B03R CMOS MPU Micro Processing Unit The H D 6303R is an 8-bit CMOS m icro processing u n it which has th e com pletely com patible instruction set w ith th e HD6301V 1, 128 bytes RAM, Serial C om m unication Interface (SCI), parallel I/O po rts and m ulti function tim er are incorpora­


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    PDF HD6303R HD63A03R HD63B03R HD6301V1. HD6303R. HMCS6800 HD63803 63b03 AS3922 W9600 63a03 HD63B03XP HD6303RP mc 1513 HD63B03YP HD63A03RP