Untitled
Abstract: No abstract text available
Text: LC7537AN 1/3 IL08 * C-MOS ELECTRONIC VOLUME CONTROL - TOP VIEW 43 37 36 V 1 40 NC NC 46 DD1 48 34 NC 4 31 7 NC NC NC V DD 1 (NC) GND 12 13 8 LIN 1 LC. T1 48 LC. T2 5 L. C2 13 L. T1 11 L. B1 47 L. FIN 29 RIN 36 RCT1 37 RCT2 32 19 L. C1 L OUT R. C2
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LC7537AN
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20AWGx2C
Abstract: 16AWGx2C 18AWGx2C IEC320-C14 230VAC to 24VDC POWER SUPPLY 18AWGx3C
Text: SP80P Series Date: 1/28/10 Desk-Top, Switchmode Power Supply RoHS Compliant, CEC Efficiency Level V Rev: 010810 Page: 1 of 2 Features: • • • • • • • • • Input Universal Input 100 – 240 VAC IEC320-C14 Input Socket 11 VDC to 48 VDC Over-Current Protection
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SP80P
IEC320-C14
115VAC
230VAC
SP80P924
24VDC
18AWGx3C
20AWGx2C)
16AWGx2C)
20AWGx2C
16AWGx2C
18AWGx2C
230VAC to 24VDC POWER SUPPLY
18AWGx3C
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82S167A
Abstract: D2896 TIB82S167BC
Text: TIB82S167BC 14 x 48 × 6 FIELD-PROGRAMMABLE LOGIC SEQUENCER WITH 3-STATE OUTPUTS OR PRESET SRPS026A – D2896, JANUARY 1985 – REVISED NOVEMBER 1995 • • • • • NT PACKAGE TOP VIEW Programmable Asynchronous Preset or Output Control CLK I6 I5 I4
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TIB82S167BC
SRPS026A
D2896,
82S167A
TIB82S167BC
82S167A
D2896
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Untitled
Abstract: No abstract text available
Text: TIB82S167BC 14 x 48 × 6 FIELD-PROGRAMMABLE LOGIC SEQUENCER WITH 3-STATE OUTPUTS OR PRESET SRPS026A – D2896, JANUARY 1985 – REVISED NOVEMBER 1995 • • • • • NT PACKAGE TOP VIEW Programmable Asynchronous Preset or Output Control CLK I6 I5 I4
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TIB82S167BC
SRPS026A
D2896,
82S167Aâ
TIB82S167BC
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Pseudo SRAM
Abstract: EM567168
Text: EtronTech EM567168 2M x 16 Pseudo SRAM Rev 1.3 Dec./2007 Pin Assignment 48-Ball BGA, Top View Features • Organized as 2M words by 16 bits • Fast Cycle Time : 70ns • Standby Current : 160uA • Deep power-down Current : 10uA Memory cell data invalid
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EM567168
48-Ball
160uA
12MAX
Pseudo SRAM
EM567168
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Untitled
Abstract: No abstract text available
Text: EtronTech EM565168 512K x 16 Pseudo SRAM Rev 1.0 Features Sep. 2003 Pin Assignment 48-Ball BGA, Top View • Organized as 512K words by 16 bits • Fast Cycle Time : 55ns, 70ns • Standby Current : 100uA •Deep power-down Current : 10uA Memory cell data invalid
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EM565168
48-Ball
100uA
EM565168BC-XXG,
12MAX
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EM566168
Abstract: No abstract text available
Text: EtronTech EM566168 1M x 16 Pseudo SRAM Preliminary, Rev 0.2 Apr. 2002 Pin Assignment 48-Ball BGA, Top View Features • Organized as 1M words by 16 bits • Fast Cycle Time : 70ns • Standby Current : 100uA • Deep power-down Current : 10uA Memory cell data
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EM566168
48-Ball
100uA
EM566168
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TIB82S105BC
Abstract: 82s105a 1681s
Text: TIB82S105BC 16 x 48 × 8 FIELD-PROGRAMMABLE LOGIC SEQUENCER WITH 3-STATE OUTPUTS OR PRESET SRPS025A – D2897, SEPTEMBER 1985 – REVISED NOVEMBER 1995 • • • • • • N PACKAGE 50-MHz Clock Rate TOP VIEW Power-On Preset of All Flip-Flops CLK I7
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TIB82S105BC
SRPS025A
D2897,
50-MHz
82S105A
TIB82S105BC
82s105a
1681s
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TIB82S105BC
Abstract: No abstract text available
Text: TIB82S105BC 16 x 48 × 8 FIELD-PROGRAMMABLE LOGIC SEQUENCER WITH 3-STATE OUTPUTS OR PRESET SRPS025A – D2897, SEPTEMBER 1985 – REVISED NOVEMBER 1995 • • • • • • N PACKAGE 50-MHz Clock Rate TOP VIEW Power-On Preset of All Flip-Flops CLK I7
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TIB82S105BC
SRPS025A
D2897,
50-MHz
82S105Aâ
TIB82S105BC
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Untitled
Abstract: No abstract text available
Text: MAX1978/MAX1979 LE AVAILAB Integrated Temperature Controllers for Peltier Modules General Description ATE Typical Operating Circuit appears at end of data sheet. MAXIP COMP ITEC 37 38 39 40 41 GND GND MAXV MAXIN 43 42 CTLI VDD 45 44 CS REF 47 46 OS1 48 TOP VIEW
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MAX1978/MAX1979
MAX1978
MAX1979
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TIB82S105BC
Abstract: TIB82S105BCFN TIB82S105BCN MS-011
Text: TIB82S105BC 16 x 48 × 8 FIELD-PROGRAMMABLE LOGIC SEQUENCER WITH 3-STATE OUTPUTS OR PRESET SRPS025A – D2897, SEPTEMBER 1985 – REVISED NOVEMBER 1995 • • • • • • N PACKAGE 50-MHz Clock Rate TOP VIEW Power-On Preset of All Flip-Flops CLK I7
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TIB82S105BC
SRPS025A
D2897,
50-MHz
82S105A
TIB82S105BC
TIB82S105BCFN
TIB82S105BCN
MS-011
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CQ31
Abstract: Polar 585 schematic 470nF STG719 TQFP48 TSA1005 TSA1005-40IF TSA1005-40IFT idc32 IDC 32
Text: TSA1005-40 DUAL-CHANNEL, 10-BIT, 40MSPS, 150mW A/D CONVERTER Preliminary Data • 10-bit, dual-channel A/D converter in deep PIN CONNECTIONS top view submicron CMOS technology NC NC VCCBE GNDBE VCCBI VCCBI OEB 48 47 46 45 AVCC AVCC INCMI ■ ■ ■ ■
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TSA1005-40
10-BIT,
40MSPS,
150mW
10MHz
10MHz.
40Msps
CQ31
Polar 585 schematic
470nF
STG719
TQFP48
TSA1005
TSA1005-40IF
TSA1005-40IFT
idc32
IDC 32
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Untitled
Abstract: No abstract text available
Text: CD74FCT373 BiCMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS738 – JULY 2000 D D D D D D D D D E, M, OR SM PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC 48-mA Output Sink Current
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CD74FCT373
SCBS738
48-mA
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Untitled
Abstract: No abstract text available
Text: CD74FCT373 BiCMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS738 – JULY 2000 D D D D D D D D D E, M, OR SM PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC 48-mA Output Sink Current
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CD74FCT373
SCBS738
48-mA
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Untitled
Abstract: No abstract text available
Text: CD74FCT373 BiCMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS738 – JULY 2000 D D D D D D D D D E, M, OR SM PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC 48-mA Output Sink Current
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CD74FCT373
SCBS738
48-mA
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Untitled
Abstract: No abstract text available
Text: CD74FCT373 BiCMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS738 – JULY 2000 D D D D D D D D D E, M, OR SM PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC 48-mA Output Sink Current
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CD74FCT373
SCBS738
48-mA
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Untitled
Abstract: No abstract text available
Text: CD74FCT373 BiCMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS738 – JULY 2000 D D D D D D D D D E, M, OR SM PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC 48-mA Output Sink Current
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CD74FCT373
SCBS738
48-mA
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top 48 C1
Abstract: relay vde 0435 VDE 0110 off delay timer multirange timers tag C2 255 600 vde 0435 timer 88 886 006 88 886 005 48C1 relay vde 0435 vde 0110 timer
Text: TOP 48 panel-mounted electronic timers with analogue setting Relay output • ■ ■ ■ ■ ■ ■ Multi-function or mono-function Multi-range Multi-voltage or mono-voltage 1 or 2 changeover relays Display of output states by 2 LEDs Connection by 8-pin base or 11-pin base
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11-pin
top 48 C1
relay vde 0435 VDE 0110 off delay timer
multirange timers
tag C2 255 600
vde 0435 timer
88 886 006
88 886 005
48C1
relay vde 0435
vde 0110 timer
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CD74FCT373
Abstract: CD74FCT373E CD74FCT373M CD74FCT373M96 CD74FCT373SM MO-150
Text: CD74FCT373 BiCMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS738 – JULY 2000 D D D D D D D D D E, M, OR SM PACKAGE TOP VIEW BiCMOS Technology With Low Quiescent Power Buffered Inputs Noninverted Outputs Input/Output Isolation From VCC 48-mA Output Sink Current
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CD74FCT373
SCBS738
48-mA
CD74FCT373
CD74FCT373E
CD74FCT373M
CD74FCT373M96
CD74FCT373SM
MO-150
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MS-026
Abstract: No abstract text available
Text: Package Outline 48-Lead LQFP Package Outline FG 7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch D D1 E E1 Note 1 (Index Area D1/4 x E1/4) L2 Gauge Plane 48 L 1 e b θ L1 Top View Seating Plane View B View B A A2 Seating Plane A1 Side View Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
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48-Lead
DSPD-48LQFPFG
C101708
MS-026
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Untitled
Abstract: No abstract text available
Text: SP16P Series Date: 1/13/10 Desk-Top, Switchmode Power Supply RoHS Compliant, CEC Efficiency Level IV & V Rev: 010710 Page: 1 of 3 Features: • • • • • • • • • Input Universal Input 100 – 240 VAC 3 VDC to 48 VDC 12 to 15 Watts Over-Current Protection
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SP16P
115VAC
230VAC
240VAC,
5x11mm
SP16P9_
SP16P8_
SP16P6_
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H 4242
Abstract: No abstract text available
Text: SP25P Series Date: 1/20/10 Desk-Top, Switchmode Power Supply RoHS Compliant, CEC Efficiency Level IV & V Rev: 010710 Page: 1 of 2 Features: • • • • • • • • • Universal Input 100 – 240 VAC 5 VDC to 48 VDC 16.5 to 25 Watts Over-Current Protection
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SP25P
115VAC
230VAC
SP25P=
12VDC
48VDC
SP25P624
24VDC
SP25P9
SP25P6
H 4242
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TIB82S105BC
Abstract: No abstract text available
Text: TIB82S105BC 16 x 48 x 8 FIELD-PROGRAMMABLE LOGIC SEQUENCER WITH 3-STATE OUTPUTS OR PRESET SRPS025A - D2097, SEPTEMBER 1985-REVISED NOVEMBER 1995 N PACKAGE 50-MHz Clock Rate TOP VIEW Power-On Preset of All Flip-Flops ! 6-Bit Internal State Register With 8-Bit
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PDF
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TIB82S105BC
SRPS025A
D2097,
1985-REVISED
50-MHz
82S105At
82S105B
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Untitled
Abstract: No abstract text available
Text: c D -ifn n c c R ic c HIGH-PERFORMANCE 48-MACROCELL ONE-TIME PROGRAMMABLE LOGIC DEVICES S R E S 003-D 3880, NOVEMBER 1991 FN PACKAGE User-Configurable LSI Circuit Capable of Implementing 2100 Equivalent Gates of Conventional and Custom Logic TOP VIEW High-Performance CMOS Process Allows:
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48-MACROCELL
003-D
SRES003-D3880.
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